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| www..com SSM9960M/GM DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Simple drive requirement Lower gate charge Fast switching characteristics D2 D1 D1 D2 BV DSS R DS(ON) G2 S2 40V 20m 7.8A ID SO-8 S1 G1 Description D1 D2 Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SSM9960M is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. G1 S1 G2 S2 This device is available with Pb-free lead finish (second-level interconnect) as SSM9960GM. Absolute Maximum Ratings Symbol VDS VGS ID @ TA=25C ID @ TA=100C IDM PD @ TA=25C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating 40 20 7.8 6.2 20 2 0.016 -55 to 150 -55 to 150 Units V V A A A W W/C C C Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit C/W 8/21/2004 Rev.2.01 www.SiliconStandard.com 1 of 6 www..com SSM9960M/GM Electrical Characteristics @ T j=25oC (unless otherwise specified) Symbol BVDSS Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 40 1 - Typ. 0.032 Max. Units 20 32 3 1 25 100 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF BV DSS/Tj RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA Static Drain-Source On-Resistance VGS=10V, ID=7A VGS=4.5V, ID=5A VDS=VGS, ID=250uA VDS=10V, ID=7A 25 14.7 7.1 6.8 11.5 6.3 28.2 12.6 1725 235 145 Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70oC) o VDS=40V, VGS=0V VDS=32V ,VGS=0V VGS= 20V ID=7A VDS=20V VGS=4.5V VDS=20V ID=1A RG=3.3 ,VGS=10V RD=20 VGS=0V VDS=25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol IS VSD Parameter Continuous Source Current ( Body Diode ) Test Conditions VD=VG=0V , VS=1.3V Tj=25C,IS=2.3A, VGS=0V Min. - Typ. - Max. Units 1.54 1.3 A V Forward On Voltage 2 Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 135C/W when mounted on min. copper pad. 8/21/2004 Rev.2.01 www.SiliconStandard.com 2 of 6 www..com SSM9960M/GM 36 T C =25 C o 10V 6.0V 5.0V 4.5V ID , Drain Current (A) 32 T C =150 o C 10V 6.0V 5.0V 4.5V 24 ID , Drain Current (A) 24 V GS =4.0V 16 V GS =4.0V 12 8 0 0 1 2 3 4 0 0 1 2 3 4 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 80 2 I D =7.0A T C =25C 60 I D =7.0A V GS =10V 40 Normalized RDS(ON) 2 4 6 8 10 12 1.4 RDS(ON) (m ) 0.8 20 0 0.2 -50 0 50 100 150 V GS (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 8/21/2004 Rev.2.01 www.SiliconStandard.com 3 of 6 www..com SSM9960M/GM 10 2.4 8 ID , Drain Current (A) 1.6 6 4 0.8 2 0 25 50 75 100 125 150 PD (W) 0 0 50 100 150 T c , Case Temperature ( o C) T c , Case Temperature ( o C) Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature 100 1 Duty Factor = 0.5 Normalized Thermal Response (R thja) 10 0.2 1ms ID (A) 1 0.1 0.1 0.05 10ms 100ms 1s 0.02 0.01 PDM 0.01 Single Pulse t T 0.1 10s T C =25 o C Single Pulse 0.01 0.1 1 10 100 Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=135 oC/W DC 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 8/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 6 www..com SSM9960M/GM 12 f=1.0MHz 10000 I D =7.0A VGS , Gate to Source Voltage (V) 9 Ciss V DS =12V V DS =16V VDS =20V 1000 6 C (pF) Coss Crss 100 3 0 0 5 10 15 20 25 10 1 7 13 19 25 31 Q G , Total Gate Charge (nC) V DS (V) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 100 3.5 3 10 2.5 VGS(th) (V) Tj=150 C o Tj=25 C o IS(A) 1 2 1.5 0.1 1 0.01 0 0.4 0.8 1.2 0.5 -50 0 50 100 150 V SD (V) T j , Junction Temperature ( o C ) Fig 11. Forward Characteristic of Reverse Diode Fig 12. Gate Threshold Voltage vs. Junction Temperature 8/21/2004 Rev.2.01 www.SiliconStandard.com 5 of 6 SSM9960M/GM VDS RD 90% D VDS TO THE OSCILLOSCOPE 0.5 x RATED V DS RG G + 10 v - S VGS 10% VGS td(on) tr td(off) tf Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform VG VDS TO THE OSCILLOSCOPE QG 4.5V D 0.5 x RATED V DS G S + QGS QGD VGS 1~ 3 mA IG I D Charge Q Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 8/21/2004 Rev.2.01 www.SiliconStandard.com 6 of 6 |
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