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TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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DOCUMENT REVISION HISTORY 1: DOCUMENT DATE DESCRIPTION REVISION FROM TO A 2004.12.10 First Release. A B 2006.03.10 Items 1 to 2 were updated. 1)(Page 5, Figure 1) The module specification was updated. 2)(Page 16, Point 6) The Quality Units was updated.
CHANGED BY ZHU LING JUN ZHU LING JUN
CHECKED BY LI HUA MING LI HUA MING
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TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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CONTENTS
Page No. 1. 2. 3. 4. 4.1 4.2 5. 5.1 5.2 5.3 6. GENERAL DESCRIPTION MECHANICAL SPECIFICATIONS INTERFACE SIGNALS ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25C) ENVIRONMENTAL CONDITION ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS INSTRUCTUION TABLE QUALITY UNITS 4 4 7 9 9 10 10 10 11 15 16
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TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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Specification of LCD Module Type Item No.: TM0027-Z-LED
1. General Description * * * * * * * * 2. 128 x 64 Dots FSTN Positive Transflective Dot Matrix LCD Module. Viewing Angle: 6 O'clock direction. Driving duty: 1/65 Duty, 1/9 bias. `SITRONIX' ST7565V-G LCD Controller &Driver or equivalent. Chip-On-Glass (COG). High-speed 8-bit MPU interface or Serial interface. Power Supply: +3.0V. FPC. Mechanical Specifications
The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 www..com Parameter Specifications Outline dimensions 39.1(W) x 33.0(H) x 2.0(D)(Exclude FPC, Include LCD end seal) 39.1(W) x 53.0(H) x 2.0(D)(Include FPC, Include LCD end seal) Viewing area 33.8(W) x 22.2(H) Display format 128 x 64 dots Dot size 0.225(W) x 0.285(H) Dot spacing 0.015(W) x 0.015(H) Dot pitch 0.240 (W) x 0.300(H) Weight: TBD
Unit mm
mm mm mm mm grams
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ISSUE MODIFY DESCRIPTION DATE 04.10.27 06.03.10
A B
First Issue Add Black Tape,Silk
B
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
NC IRS P/S C86 VR V5 V4 V3 V2 V1 CAP4CAP2+ CAP2CAP1CAP1+ CAP3-
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
VOUT VSS VDD D7 D6 D5 D4 D3 D2 D1 D0 /RD(E) /WR(R/W) A0 /RES /CS1
SEG0
SEG127
COM0
COM31
COM32
COM63
Figure 1: Module Specification
TITLE:
C0 C32 C63 S0 S127 C31
Module Speciality
128*64 (LCD)
ITEM NO: PROJECT NO:
M0763(REV:C) JCG12864A09-01 DESCRIPTION: FFPNNHEG-06-ST-NSC X.X0.3 TOLERANCE UNLESS: OTHERWISE SPECIFIED: X.XX0.2 THIRD ANGLE PROJECTION
NAME SIGN DATE
MAR/2006
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Display Type Display Resolution Viewing Angle Max.Ratio and Bias Level LCD Controller/Driver Logic Voltage LCD Driving Voltage Operation Temperature Storage Temperature
FSTN / TRANSFLECTIVE / POSITIVE 128*64 6:00 1/65 DUTY,1/9 BIAS ST7565V-G 3.0V TBD -20C TO 70C -30C TO 80C
ST7565V-G
DRAWN
LIHUAMING CHECKED Wang zhao cai APPROVED Wang zhao cai REV: B UNIT: mm SCALE:1/1
06.03.10
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC)
Backlight Speciality
No
Remark
Print customer silk
SHEET: 1 OF 1
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TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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1
2
3
4
D
D
JCG12864A09-01 CS1B RESETB A0 RW-WRB E_RDB D0 D1 D2 D3 D4 D5 D6 D7 VDD VSS VOUT CAP3CAP1+ CAP1CAP2+ CAP2+ CAP4V1 V2 V3 V4 V5 VR C68/80 P/S IRS NC ST7565V-G VDD 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 /CS1 RES A0 WR /RD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 VDD GND C1 C2 C3
C
C
V1 V2 V3 V4 V5 VDD VDD VDD
C4 V1 V2 V3 V4 V5
V
B
C5
C6
C7
C8
C9
B
Parellel 6800 serial internal Resistor C1,C2,C3,C4,C5,C6,C7,C8,C9 : 1UF
A
A
1
2
3
4
Figure 2: Recommend Outer circuit
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TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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3.
Interface signals Table 2(a) Pin No. 1 2 Symbol NC Description No connection. This terminal selects the resistors for the V5 voltage level adjustment. IRS = "H": Use the internal resistors IRS = "L": Do not use the internal resistors. The V5 voltage level is regulated by an external resistive voltage divider attached to the VR terminal. This is the parallel data input/serial data input switch terminal. P/S = "H": Parallel data input. P/S = "L": Serial data input. This is the MPU interface switch terminal. C86 = "H": 6800 Series MPU interface. C86 = "L": 8080 MPU interface. Output voltage regulator terminal. Provides the voltage between VDD and V5 through a resistive voltage divider. IRS = "L": the V5 voltage regulator internal resistors are not used . IRS = "H": the V5 voltage regulator internal resistors are used . This is a multi-level power supply for the liquid crystal drive. The voltage Supply applied is determined by the liquid crystal cell, and is changed through the use of a resistive voltage divided or through changing the impedance using an op.amp. Voltage levels are determined based on VDD, and must maintain the relative magnitudes shown below. VDD (= V0) V1 V2 V3 V4 V5 When the power supply turns ON, the internal power supply circuits produce theV1 to V4 voltages shown below. The voltage settings are selected using the LCD bias set command.
LCD bias 1/9 bias V1 (1/9) x V5 V2 (2/9) x V5 V3 (7/9) x V5 V4 (8/9) x V5
IRS
3
P/S
4 C86 5 VR 6 7 8 9 10
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V5 V4 V3 V2 V1
11 12 13 14 15 16
CAP4CAP2+ CAP2CAP1CAP1+ CAP3-
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2+ terminal. DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal. DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2+ terminal. DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1+ terminal. DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1- terminal. DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1+ terminal.
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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Table 2(b) Pin No. 17 18 19 20 21 22 23 24 25 26 27 28 Symbol VOUT VSS VDD D7 D6 D5 D4 D3 D2 D1 D0 Description Voltage converter input / output pin. Ground (0V). Power supply for logic. This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit standard MPU data bus. When the serial interface is selected (P/S = "L") : D7: serial data input (SI); D6 : the serial clock input (SCL). D0 to D5 are set to high impedance. When the chip select is not active, D0 to D7 are set to high impedance. When connected to an 8080 MPU, this is active LOW. (E) This pin is connected to the /RD signal of the 8080 MPU, and the ST7565V series data bus is in an output status when this signal is "L". When connected to a 6800 Series MPU, this is active HIGH. This is the 6800 Series MPU enable clock input terminal. When connected to an 8080 MPU, this is active LOW. (R/W) This terminal connects to the 8080 MPU /WR signal. The signals on the data bus are latched at the rising edge of the /WR signal. When connected to a 6800 Series MPU: This is the read/write control signal input terminal. When R/W = "H": Read. When R/W = "L": Write. This is connect to the least significant bit of the normal MPU address bus, and it determines whether the data bits are data or a command. A0 = "H": Indicates that D0 to D7 are display data. A0 = "L": Indicates that D0 to D7 are control data. When /RES is set to "L," the settings are initialized. The reset operation is performed by the /RES signal level. This is the chip select signal.
/RD(E)
29
/WR(R/W)
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30 A0 31 32
/RES /CS1
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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4. 4.1
Absolute Maximum Ratings Electrical Maximum Ratings (Ta = 25 C) Table 3 Parameter Power Supply voltage (Logic) Power Supply voltage Power Supply voltage Power Supply voltage Input voltage range Output voltage Symbol VDD -VSS VSS2 V5, VOUT V1, V2, V3, V4 VIN VO Min. -0.3 -4.0 -18.0 V5 -0.3 -0.3 Max. Unit +5.0 V -1.8 V +0.3 V +0.3 VDD+0.3 V VDD+0.3 V
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Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. 1. All voltage values are referenced to VSS = 0V. 2. Insure that the voltage levels of V1, V2, V3, and V4 are always such that VDD V1 V2 V3 V4 V5.
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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4.2
Environmental Condition Table 4 Operating Temperature (Topr) Min. Max. -20C +70C Storage Temperature (Tstg) Min. Max. -30C +80C Dry
Item
Remark
Ambient Temperature
5. Electrical Specifications 5.1 Typical Electrical Characteristics At Ta = 25 C, VDD = 3.0V0.1V, VSS=0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Input signal voltage For A0, D0 to D5, D6 www..com (SCL), D7 (SI), /RD (E), /WR (R/W), /CS1, C86, /RES, IRS, P/Spins. Supply Current (Logic & LCD) Note 1: Symbol VDD-VSS VLCD = VDD-V5 VIH VIL Conditions VDD =+3.0V, Note 1 "H" level "L" level Min. 2.9 8.8 0.8VDD VSS Typ. 3.0 9.0 Max. 3.1 9.2 VDD 0.2VDD Unit V V V V
IDD
Note 1
-
0.3
0.45
mA
There is tolerance in optimum LCD driving voltage during production and it will be within the specified range.
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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5.2
Timing Specifications At Ta = -20 C To +70 C, VDD = +3.0V0.1V, VSS = 0V. Refer to Fig. 3, the bus timing diagram for Read / write timing chart (8080-series MPU). Table 6
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Figure 3: Read / write timing chart (8080-series MPU)
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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At Ta = -20 C To +70 C, VDD = +3.0V0.1V, VSS = 0V. Refer to Fig. 4, the bus timing diagram for Read / write timing chart (6800-series MPU). Table 7
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Figure 4: Read / write timing chart (6800-series MPU) At Ta = -20 C To +70 C, VDD = +3.0V0.1V, VSS = 0V.
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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Refer to Fig. 5, the bus timing diagram for Serial Interface. Table 8
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Figure 5: Read/Write timing for Serial Interface
TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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At Ta = -20 C To +70 C, VDD = +3.0V0.1V, VSS = 0V. Refer to Fig. 6, the bus timing diagram for reset timing. Table 9
Figure 6: Reset Timing
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TM0027-Z-LED ( REV.B) (FFPNNHEG-06-ST-NSC) MAR/2006
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5.3 Instruction Table Table 10
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