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 LT3070 5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator FeAtures
Output Current: 5A n Dropout Voltage: 85mV Typical n Digitally Programmable V OUT : 0.8V to 1.8V n Digital Output Margining: 1%, 3% or 5% n Low Output Noise: 25V RMS (10Hz to 100kHz) n Parallel Multiple Devices for 10A or More n Precision Current Limit: 20% n 1%AccuracyOverLine,LoadandTemperature n StablewithLowESRCeramicOutputCapacitors (15FMinimum) n HighFrequencyPSRR:30dBat1MHz n EnableFunctionTurnsOutputOn/Off n VIOCPinControlsBuckConvertertoMaintainLow PowerDissipationandOptimizeEfficiency n PWRGD/UVLO/ThermalShutdownFlag n CurrentLimitwithFoldbackProtection n ThermalShutdown n 28-Lead(4mmx5mmx0.75mm)QFNPackage
n
Description
The LT(R)3070 is a low voltage, UltraFastTM transient responselinearregulator.Thedevicesuppliesupto5Aof output current with a typical dropout voltage of 85mV. A 0.01F reference bypass capacitor decreases output voltagenoiseto25VRMS.TheLT3070'shighbandwidth permitstheuseoflowESRceramiccapacitors,saving bulkcapacitanceandcost.TheLT3070'sfeaturesmake itidealforhighperformanceFPGAs,microprocessorsor sensitivecommunicationsupplyapplications. Outputvoltageisdigitallyselectablein50mVincrements overa0.8Vto1.8Vrange.Amarginingfunctionallows theusertoadjustsystemoutputvoltageinincrementsof 1%,3%or5%.TheICincorporatesauniquetracking functiontocontrolabuckregulatorpoweringtheLT3070's input.Thistrackingfunctiondrivesthebuckregulatorto maintain the LT3070's input voltage to VOUT + 300mV, minimizingpowerdissipation. InternalprotectionincludesUVLO,reverse-currentprotection,precisioncurrentlimitingwithpowerfoldbackand thermalshutdown.TheLT3070regulatorisavailableina thermallyenhanced28-lead,4mmx5mmQFNpackage.
L,LT,LTC,LTM,LinearTechnologyandtheLinearlogoareregisteredtrademarksand UltraFastandVLDOaretrademarksofLinearTechnologyCorporation.Allothertrademarksare thepropertyoftheirrespectiveowners.Patentspending.
ApplicAtions
n n
n n
FPGAandDSPSupplies ASICandMicroprocessorSupplies ServersandStorageDevices PostBuckRegulationandSupplyIsolation
typicAl ApplicAtion
0.9V, 5A Regulator
VBIAS 2.2V TO 3.6V VIN 1.2V 50k 2.2F IN 330F EN VO0 VO1 VO2 MARGSEL MARGTOL VIOC 1nF REF/BYP GND 0.01F
3070 TA01a
Dropout Voltage
150
PWRGD
VIN = VOUT(NOMINAL)
BIAS
PWRGD SENSE OUT VOUT 0.9V 5A 10F*
DROPOUT VOLTAGE (mV)
120
90
LT3070
2.2F*
4.7F*
VOUT = 1.8V VBIAS = 3.3V VOUT = 0.8V VBIAS = 2.5V
60 30
*X5R OR X7R CAPACITORS
0
0
1
3 4 2 OUTPUT CURRENT (A)
5
3070 TA01b
3070fa
LT3070 Absolute mAximum rAtings
(Note 1)
pin conFigurAtion
TOP VIEW BIAS GND VO2 VO1 GND VO0 22 MARGTOL 21 MARGSEL 20 GND 29 GND 19 SENSE 18 OUT 17 OUT 16 OUT 15 OUT 9 10 11 12 13 14 GND GND GND GND GND EN VIOC 1 PWRGD 2 REF/BYP 3 GND 4 IN 5 IN 6 IN 7 IN 8 28 27 26 25 24 23
IN,OUT..................................................... -0.3Vto3.3V BIAS............................................................. -0.3Vto4V VO2,VO1,VO0Inputs.................................... -0.3Vto4V MARGSEL,MARGTOLInput........................ -0.3Vto4V ENInput....................................................... -0.3Vto4V SENSEInput................................................. -0.3Vto4V VIOC,PWRGDOutputs................................ -0.3Vto4V REF/BYPOutput........................................... -0.3Vto4V OutputShort-CircuitDuration.........................Indefinite OperatingJunctionTemperature(Note2) LT3070E/LT3070I............................. -40Cto125C LT3070MP......................................... -55Cto125C StorageTemperatureRange.................. -65Cto150C
TJMAX=125C,JA=30C/WTO35C/W EXPOSEDPAD(PIN29)ISGND,MUSTBESOLDEREDTOPCB
UFD PACKAGE 28-LEAD (4mm 5mm) PLASTIC QFN
orDer inFormAtion
LEAD FREE FINISH LT3070EUFD#PBF LT3070IUFD#PBF LT3070MPUFD#PBF LEAD BASED FINISH LT3070EUFD LT3070IUFD LT3070MPUFD TAPE AND REEL LT3070EUFD#TRPBF LT3070IUFD#TRPBF LT3070MPUFD#TRPBF TAPE AND REEL LT3070EUFD#TR LT3070IUFD#TR LT3070MPUFD#TR PART MARKING* 3070 3070 3070 PART MARKING* 3070 3070 3070 PACKAGE DESCRIPTION 28-Lead(4mmx5mm)PlasticQFN 28-Lead(4mmx5mm)PlasticQFN 28-Lead(4mmx5mm)PlasticQFN PACKAGE DESCRIPTION 28-Lead(4mmx5mm)PlasticQFN 28-Lead(4mmx5mm)PlasticQFN 28-Lead(4mmx5mm)PlasticQFN TEMPERATURE RANGE -40Cto125C -40Cto125C -55Cto125C TEMPERATURE RANGE -40Cto125C -40Cto125C -55Cto125C
ConsultLTCMarketingforpartsspecifiedwithwideroperatingtemperatureranges.*Thetemperaturegradeisidentifiedbyalabelontheshippingcontainer. Formoreinformationonleadfreepartmarking,goto:http://www.linear.com/leadfree/ Formoreinformationontapeandreelspecifications,goto:http://www.linear.com/tapeandreel/
3070fa
LT3070 electricAl chArActeristics
PARAMETER INPinVoltageRange BIASPinVoltageRange(Note3) RegulatedOutputVoltage VOUT=0.8V,10mAIOUT5A,1.05VVIN1.25V VOUT=0.9V,10mAIOUT5A,1.15VVIN1.35V VOUT=1V,10mAIOUT5A,1.25VVIN1.45V VOUT=1.1V,10mAIOUT5A,1.35VVIN1.55V VOUT=1.2V,10mAIOUT5A,1.45VVIN1.65V,VBIAS=3.3V VOUT=1.5V,10mAIOUT5A,1.75VVIN1.95V,VBIAS=3.3V VOUT=1.8V,10mAIOUT5A,2.05VVIN2.25V,VBIAS=3.3V MARGTOL=0V,MARGSEL=VBIAS MARGTOL=0V,MARGSEL=0V,IOUT=10mA MARGTOL=FLOAT,MARGSEL=VBIAS MARGTOL=FLOAT,MARGSEL=0V,IOUT=10mA MARGTOL=VBIAS,MARGSEL=VBIAS MARGTOL=VBIAS,MARGSEL=0V,IOUT=10mA LineRegulationtoVIN LineRegulationtoVBIAS LoadRegulation, IOUT=10mAto5A VOUT=0.8V,VIN=1.05Vto2.7V,VBIAS=3.3V,IOUT=10mA VOUT=1.8V,VIN=2.05Vto2.7V,VBIAS=3.3V,IOUT=10mA VOUT=0.8V,VBIAS=2.2Vto3.6V,VIN=1.1V,IOUT=10mA VOUT=1.8V,VBIAS=3.25Vto3.6V,VIN=2.1V,IOUT=10mA VBIAS=2.5V,VIN=1.05V,VOUT=0.8V
l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. COUT = 15F (Note 9), VIN = VOUT + 0.3V (Note 5), VBIAS = 2.5V unless otherwise noted.
CONDITIONS VINVOUT+150mV,IOUT=5A
l l l l l l l l l l l l l l l l l l l
MIN 0.95 2.2 0.792 0.891 0.990 1.089 1.188 1.485 1.782 0.8 -1.2 2.7 -3.3 4.6 -5.4
TYP
MAX 3.0 3.6
UNITS V V V V V V V V V % % % % % % mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV A A mA mA
0.800 0.900 1.000 1.100 1.200 1.500 1.800 1 -1 3 -3 5 -5
0.808 0.909 1.010 1.111 1.212 1.515 1.818 1.2 -0.8 3.3 -2.7 5.4 -4.6 1.0 1.0 2.0 1.0
RegulatedOutputVoltageMargining (Note3)
-1.5 -2
l
-3.0 -5.5 -4.0 -7.5 -4.0 -7.5 -5.0 -9.0 -7.0 -13 35 65 85 120 150 65 400 1.8 2.3
VBIAS=2.5V,VIN=1.25V,VOUT=1.0V VBIAS=3.3V,VIN=1.45V,VOUT=1.2V
l
-2 -2.5
l
VBIAS=3.3V,VIN=1.75V,VOUT=1.5V VBIAS=3.3V,VIN=2.05V,VOUT=1.8V
l
-3
l l
DropoutVoltage, VIN=VOUT(NOMINAL)(Note6)
IOUT=1A,VOUT=1V IOUT=2.5A,VOUT=1V IOUT=5A,VOUT=1V
20 50 85
l
SENSEPinCurrent GroundPinCurrent, VIN=1.3V,VOUT=1V
VIN=1.1V,VSENSE=0.8V VBIAS=3.3V,VIN=2.1V,VSENSE=1.8V IOUT=10mA IOUT=5A
l l l l
35 200 0.65 0.9
50 300 1.1 1.35
3070fa
LT3070 electricAl chArActeristics
PARAMETER BIASPinCurrentinNapMode BIASPinCurrent, VIN=1.3V,VOUT=1V CONDITIONS EN=Low(AfterPORCompleted) IOUT=10mA IOUT=100mA IOUT=500mA IOUT=1A IOUT=2.5A IOUT=5A VIN-VOUT<0.3V,VBIAS=3.3V VIN-VOUT=1.0V,VBIAS=3.3V VIN-VOUT=1.7V,VBIAS=3.3V VIN=0V,VOUT=1.8V PercentageofVOUT(NOMINAL),VOUTRising PercentageofVOUT(NOMINAL),VOUTFalling IPWRGD=200A(FaultCondition) VBIASRising VBIASFalling VIN=VOUT(NOMINAL)+150mV,SourcingOutofthePin VIN=VOUT(NOMINAL)+450mV,SinkingIntothePin InputFalling
l l l l l l l l l l l l l l l l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. COUT = 15F (Note 9), VIN = VOUT + 0.3V (Note 5), VBIAS = 2.5V unless otherwise noted.
MIN 120 0.75 1.25 2.0 2.6 3.5 4.5 5.1 3.2 1.2 87 82 1.1 0.9 250 160 170 TYP 200 1.08 1.8 3.0 3.8 5.2 6.9 6.4 4.5 2.5 300 90 85 50 1.55 1.4 300 235 255 MAX 320 1.5 2.4 4.0 5.0 7.0 10.0 7.7 5.8 4.3 450 93 88 150 2.1 1.7 350 310 340 0.25 0.75 VBIAS-0.25 60
l l l l l l
UNITS A mA mA mA mA mA mA A A A A % % mV V V mV A A V V V mV
CurrentLimit(Note5)
ReverseOutputCurrent(Note8) PWRGDVOUTThreshold PWRGDVOL VBIASUndervoltageLockout VIN-VOUTServoVoltagebyVIOC VIOCOutputCurrent VILInputThreshold(Logic-0State), VO2,VO1,VO0,MARGSEL,MARGTOL VIZInputRange(Logic-ZState), VO2,VO1,VO0,MARGSEL,MARGTOL VIHInputThreshold(Logic-1State), VO2,VO1,VO0,MARGSEL,MARGTOL InputHysteresis(BothThresholds), VO2,VO1,VO0,MARGSEL,MARGTOL
VBIAS-0.9
InputRising
l
VIH=VBIAS=2.5V,CurrentFlowsIntoPin InputCurrentHigh, VO2,VO1,VO0,MARGSEL,MARGTOL InputCurrentLow, VIL=0V,VBIAS=2.5V,CurrentFlowsOutofPin VO2,VO1,VO0,MARGSEL,MARGTOL ENPinThreshold ENPinLogicHighCurrent ENPinLogicLowCurrent VOUT=OfftoOn VOUT=OntoOff VEN=VBIAS=2.5V VEN=0V
25 25 0.9 2.5 4.0
40 40 1.4 6.5 0.1
A A V V A A
3070fa
LT3070 electricAl chArActeristics
PARAMETER VBIASRippleRejection VINRippleRejection (Notes3,4,5) ReferenceVoltageNoise (REF/BYPPin) OutputVoltageNoise CONDITIONS VBIAS=VOUT+1.5VAVG,VRIPPLE=0.5VP-P,fRIPPLE=120Hz, VIN-VOUT=300mV,IOUT=2.5A VBIAS=2.5V,VRIPPLE=50mVP-P,fRIPPLE=120Hz, VIN-VOUT=300mV,IOUT=2.5A CREF/BYP=10nF ,BW=10Hzto100kHz VOUT=1V,IOUT=5A,CREF/BYP=10nF OUT=15F ,C , BW=10Hzto100kHz
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. COUT = 15F (Note 9), VIN = VOUT + 0.3V (Note 5), VBIAS = 2.5V unless otherwise noted.
MIN TYP 75 66 10 25 MAX UNITS dB dB VRMS VRMS
Note 1:StressesbeyondthoselistedunderAbsoluteMaximumRatings maycausepermanentdamagetothedevice.ExposuretoanyAbsolute MaximumRatingconditionforextendedperiodsmayaffectdevice reliabilityandlifetime. Note 2:TheLT3070regulatorsaretestedandspecifiedunderpulseload conditionssuchthatTJTA.TheLT3070Eis100%testedatTA=25C. Performanceat-40Cand125Cisassuredbydesign,characterization andcorrelationwithstatisticalprocesscontrols.TheLT3070Iis guaranteedoverthe-40Cto125Coperatingjunctiontemperaturerange. TheLT3070MPis100%testedandguaranteedoverthe-55Cto125C operatingjunctiontemperaturerange. Note 3:Tomaintainproperperformanceandregulation,theBIASsupply voltagemustbehigherthantheINsupplyvoltage.ForagivenVOUT,the BIASvoltagemustsatisfythefollowingconditions:2.2VVBIAS3.6V andVBIAS(1.25*VOUT+1V).ForVOUT0.95V,theminimumBIAS voltageislimitedto2.2V. Note 4:Operatingconditionsarelimitedbymaximumjunction temperature.Theregulatedoutputvoltagespecificationdoesnotapply forallpossiblecombinationsofinputvoltageandoutputcurrent.When operatingatmaximumoutputcurrent,limittheinputvoltagerangeto VINNote 5:TheLT3070incorporatessafeoperatingareaprotectioncircuitry. CurrentlimitdecreasesastheVIN-VOUTvoltageincreases.Currentlimit foldbackstartsatVIN-VOUT>500mV.SeetheTypicalPerformance CharacteristicsforagraphofCurrentLimitvsVIN-VOUTvoltage.The currentlimitfoldbackfeatureisindependentofthethermalshutdown circuity. Note 6:Dropoutvoltage,VDO,istheminimuminputtooutputvoltage differentialataspecifiedoutputcurrent.Indropout,theoutputvoltage equalsVIN-VDO. Note 7:GNDpincurrentistestedwithVIN=VOUT(NOMINAL)+300mVanda currentsourceload.VIOCisabufferedoutputdeterminedbythevalueof VOUTasprogrammedbytheVO2-VO0pins.VIOC'soutputisindependentof themarginingfunction. Note 8:ReverseoutputcurrentistestedwiththeINpinsgroundedandthe OUT+SENSEpinsforcedtotheratedoutputvoltage.Thisismeasuredas currentintotheOUT+SENSEpins. Note 9:FrequencyCompensation:TheLT3070mustbefrequency compensatedatitsOUTpinswithaminimumCOUTof15Fconfigured asaclusterof(15x)1Fceramiccapacitorsorasagraduatedcluster of10F/4.7F/2.2Fceramiccapacitorsofthesamecasesize.Linear TechnologyonlyrecommendsX5RorX7Rdielectriccapacitors.
3070fa
LT3070 typicAl perFormAnce chArActeristics
150
Dropout Voltage vs IOUT
VIN = VOUT(NOMINAL) TJ = 25C DROPOUT VOLTAGE (mV)
Dropout Voltage vs Temperature
30 25 20 15 10 5 VOUT = 1.8V, VBIAS = 3.3V VOUT = 0.8V, VBIAS = 2.5V VOUT = 1.2V, VBIAS = 3.3V VIN = VOUT(NOMINAL) IOUT = 1A DROPOUT VOLTAGE (mV) 100 90 80 70 60 50 40 30 20 10
Dropout Voltage vs Temperature
VIN = VOUT(NOMINAL) IOUT = 2.5A
DROPOUT VOLTAGE (mV)
120 90
VOUT = 1.8V VBIAS = 3.3V VOUT = 0.8V VBIAS = 2.5V
60 30
0
0
1
3 4 2 OUTPUT CURRENT (A)
5
3070 G01
0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G02
0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G03
VOUT = 1.8V, VBIAS = 3.3V VOUT = 0.8V, VBIAS = 2.5V VOUT = 1.2V, VBIAS = 3.3V
Dropout Voltage vs Temperature
150 VIN = VOUT(NOMINAL) IOUT = 5A DROPOUT VOLTAGE (mV) 200
Dropout Voltage vs VBIAS
Output Voltage (0.8V) vs Temperature
0.808 0.806 OUTPUT VOLTAGE (V) 0.804 0.802 0.800 0.798 0.796 0.794 0.792 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G06
IOUT = 5A 180 TJ = 25C 160 140 120 100 80 60 40 20 0 2.2 2.4 OUT = 1.8V OUT = 1.5V OUT = 0.8V 2.6 2.8 3.0 3.2 BIAS VOLTAGE (V) 3.4 3.6
ILOAD = 10mA
DROPOUT VOLTAGE (mV)
120 90
60 30
0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G04
VOUT = 1.8V, VBIAS = 3.3V VOUT = 0.8V, VBIAS = 2.5V VOUT = 1.2V, VBIAS = 3.3V
3070 G05
Output Voltage (1V) vs Temperature
1.010 1.008 1.006 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.004 1.002 1.000 0.998 0.996 0.994 0.992 0.990 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G07
Output Voltage (1.2V) vs Temperature
1.212 1.208 1.204 1.200 1.196 1.192 1.188 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G08
Output Voltage (1.5V) vs Temperature
1.515 1.510 OUTPUT VOLTAGE (V) 1.505 1.500 1.495 1.490 1.485 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G09
ILOAD = 10mA
ILOAD = 10mA
ILOAD = 10mA
3070fa
LT3070 typicAl perFormAnce chArActeristics
Output Voltage (1.8V) vs Temperature
1.818 1.814 1.810 OUTPUT VOLTAGE (V) 1.806 1.802 1.798 1.794 1.790 1.786 1.782 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G10
GND Pin Current vs IOUT
3.0 2.5 GND PIN CURRENT (mA) 2.0 1.5 1.0 0.5 0 VOUT = 1.8V, VBIAS = 3.3V VOUT = 1.2V, VBIAS = 3.3V VOUT = 0.8V, VBIAS = 2.5V 0 1 2 3 4 OUTPUT CURRENT (A) 5
3070 G11
REF/BYP Pin Voltage vs Temperature
606 604 REF/BYP VOLTAGE (mV) 602 600 598 596 594 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G12
ILOAD = 10mA
VIN = VOUT + 300mV TJ = 25C
CREF/BYP = 0.01F
BIAS Pin Current in Nap Mode
400 VBIAS = 2.5V 350 VEN = 0V BIAS PIN CURRENT (mA) BIAS PIN CURRENT (A) 300 250 200 150 100 50 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G13
BIAS Pin Current vs IOUT
10 9 8 7 6 5 4 3 2 1 0 0 1 3 4 2 OUTPUT CURRENT (A) 5
3070 G14
BIAS Pin Undervoltage Lockout Threshold
2.5 UVLO THRESHOLD VOLTAGE (V)
VIN = VOUT + 300mV TJ = 25C
2.0 1.5 VBIAS RISING VBIAS FALLING
VOUT = 1.8V VBIAS = 3.3V
VOUT = 0.8V VBIAS = 2.5V
1.0 0.5
0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G15
EN Pin Thresholds
2.0 1.8 ENABLE PIN THRESHOLD (V) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G16
PWRGD Threshold Voltage
1.00 PWRGD TRESHOLD VOLTAGE (V) VBIAS = 2.5V VOUT = 1V PWRGD VOL VOLTAGE (mV) 100
PWRGD VOL vs Temperature
VBIAS = 2.5V IPWRGD = 200A
VBIAS = 2.5V
0.95 VOUT RISING 0.90 VOUT FALLING
80 60
EN PIN RISING
EN PIN FALLING
40 20
0.85
0.80 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G17
0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
3070 G50
3070fa
LT3070 typicAl perFormAnce chArActeristics
Logic Input Threshold Voltages Logic Low to Hi-Z State Transitions
0.8 LOGIC INPUT THRESHOLD VOLTAGE (V) LOGIC INPUT THRESHOLD VOLTAGE (V) SEE APPLICATIONS INFORMATION FOR MORE DETAILS INPUT RISING LOGIC LOW TO Hi-Z 3.0
Logic Input Threshold Voltages Logic Hi-Z to High State Transitions
EN PIN LOGIC HIGH CURRENT (A) VBIAS = 3.3V LOGIC Hi-Z TO HIGH THRESHOLD IS RELATIVE TO VBIAS VOLTAGE SEE APPLICATIONS INFORMATION FOR MORE DETAILS INPUT RISING LOGIC Hi-Z TO HIGH 2.7 2.6 INPUT FALLING LOGIC HIGH TO Hi-Z 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5
EN Pin Logic High Current
VEN = VBIAS = 2.5V
0.7 0.6
2.9 2.8
0.5 0.4
INPUT FALLING LOGIC Hi-Z TO LOW
0.3 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G18
2.5 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G19
1.0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G16
Logic Pin Input Current, High State
40 LOGIC PIN INPUT CURRENT (A) 35 30 25 20 15 10 5 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G21
Logic Pin Input Current, Low State
40 LOGIC PIN INPUT CURRENT (A) VBIAS = 2.5V 35 VLOGIC = 0V CURRENT FLOWS OUT OF THE PIN 30 25 20 15 10 5 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G22
SENSE Pin Current
65 VBIAS = 2.5V 60 VOUT = 0.8V CURRENT FLOWS INTO SENSE 55 50 45 40 35 30 25 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G23
VLOGIC = VBIAS = 2.5V CURRENT FLOWS INTO THE PIN
SENSE Pin Current
400 VBIAS = 3.3V 375 VOUT = 1.8V CURRENT FLOWS INTO SENSE 350 325 300 275 250 225 200 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G24
Current Limit vs Temperature
7.50 7.25 7.00 CURRENT LIMIT (A) CURRENT LIMIT (A) 6.75 6.50 6.25 6.00 5.75 5.50 5.25 VOUT = 1.8V, VBIAS = 3.3V VOUT = 1.2V, VBIAS = 3.3V VOUT = 0.8V, VBIAS = 2.5V VIN - VOUT(NOMINAL) = 300mV 8 7 6 5 4 3 2 1 0
SENSE PIN CURRENT (A)
Current Limit vs VIN - VOUT
VBIAS = 3.3V TJ = 25C
SENSE PIN CURRENT (A)
5.00 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G25
VOUT = 1.8V VOUT = 1.2V VOUT = 0.8V 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 IN-TO-OUT VOLTAGE DIFFERENTIAL (V)
3070 G26
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LT3070 typicAl perFormAnce chArActeristics
BIAS Pin Ripple Rejection
100 90 BIAS PIN RIPPLE REJECTION (dB) 80 70 60 50 40 30 20 10 0 10 VBIAS = 2.5V + 500mVP-P VBIAS = 2.7V + 500mVP-P VBIAS = 3.3V + 500mVP-P 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
3070 G27
IN Pin Ripple Rejection
80 70 IN PIN RIPPLE REJECTION (dB) 60 50 40 30 20 10 0 10 COUT = 117F COUT = 16.9F VOUT = 1V VIN = 1.3V + 50mVP-P RIPPLE VBIAS = 2.5V IOUT = 1A 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
3070 G28
IN Pin Ripple Rejection
80 70 IN PIN RIPPLE REJECTION (dB) 60 50 40 30 20 10 0 10 COUT = 117F COUT = 16.9F VOUT = 1V VIN = 1.3V + 50mVP-P RIPPLE VBIAS = 2.5V IOUT = 5A 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
3070 G29
VIN = 1.3V VOUT = 1V IOUT = 5A COUT = 10F + 4.7F + 2.2F
Minimum BIAS Voltage vs Temperature
4.0 3.8 MINIMUM BIAS VOLTAGE (V) 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G30
Minimum BIAS Voltage vs IOUT
VOUT = 1.8V VOUT = 1.2V VOUT = 0.8V 3.6 3.4 MINIMUM BIAS VOLTAGE (V) 3.2 3.0 2.8 2.6 2.4 2.2 2.0 0 1 4 3 OUTPUT CURRENT (A) 2 5
3070 G31
Minimum BIAS Voltage vs VOUT
3.4 3.2 MINIMUM BIAS VOLTAGE (V) 3.0 2.8 2.6 2.4 2.2 2.0 1.8 0.7 0.9 1.5 1.1 1.3 OUTPUT VOLTAGE (V) 1.7 1.9
3070 G51
IOUT = 5A
VIN = VOUT(NOMINAL) + 300mV VOUT = -1%, TJ = 25C VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V TO 1V
IOUT = 5A TJ = 25C
Load Regulation
0 BIAS VOLTAGE LINE REGULATION (V) 800
Bias Voltage Line Regulation
BIAS VOLTAGE LINE REGULATION (V) VBIAS = 2.2V TO 3.6V 700 VIN = 1.1V VOUT = 0.8V 600 IOUT = 10mA 500 400 300 200 100 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G33
Bias Voltage Line Regulation
400 VBIAS = 3.25V TO 3.6V 300 VIN = 2.1V VOUT = 1.8V 200 IOUT = 10mA 100 0 -100 -200 -300 -400 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G34
LOAD REGULATION (mV)
-2 -4
-6 -8
VIN = VOUT(NOMINAL) + 300mV VBIAS = 3.3V IOUT = 100mA TO 5A VOUT = 0.8V VOUT = 1.2V VOUT = 1.8V
-10 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G32
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LT3070 typicAl perFormAnce chArActeristics
Input Voltage Line Regulation
300 INPUT VOLTAGE LINE REGULATION (V) 250 200 150 100 50 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G35
Input Voltage Line Regulation
300 INPUT VOLTAGE LINE REGULATION (V) 250 200 150 100 50 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G36
Output Voltage Start-Up Time vs CREF/BYP
20 OUTPUT VOLTAGE START-UP TIME (ms) 18 16 14 12 10 8 6 4 2 0 0 0.1 0.3 0.4 0.2 REF/BYP CAPACITANCE (F) 0.5
3070 G37
VBIAS = 3.3V VIN = 1.05V TO 2.7V VOUT = 0.8V IOUT = 10mA
VBIAS = 3.3V VIN = 2.05V TO 2.7V VOUT = 1.8V IOUT = 10mA
VBIAS = 2.5V TO 3.3V IOUT = 10mA COUT = 10F + 4.7F + 2.2F TJ = 25C SEE APPLICATIONS INFORMATION FOR START-UP DETAILS
Nap Mode Recovery Time vs IOUT
400 NAP MODE RECOVERY TIME (s) 350 300 250 200 150 100 50 0 0 1 4 3 OUTPUT CURRENT (A) 2 5
3070 G38
Output Noise Spectral Density
1.0 NOISE SPECTRAL DENSITY (V/Hz) VBIAS = 2.5V VOUT = 1V IOUT = 5A COUT = 16.9F CREF/BYP = 0.01F 80 70 OUTPUT NOISE (VRMS) 60 50 40 30 20 10 10 100 1k 10k FREQUENCY (Hz) 100k
3070 G39
RMS Output Noise vs Output Current
VIN = VOUT(NOMINAL) + 300mV VBIAS = 3.3V COUT = 16.9F
VBIAS = 3.3V VIN = VOUT(NOM) + 300mV EN = LOW TO HIGH IOUT = 5A (SET BY A RESISTOR LOAD) TJ = 25C VOUT = 1.8V, COUT = 117F VOUT = 1.2V, COUT = 117F VOUT = 0.8V, COUT = 117F
0.1
0.01
0.001
0 0.01
VOUT = 1.8V VOUT = 1.2V VOUT = 0.8V 0.1 1 OUTPUT CURRENT (A) 10
3070 G40
Output Noise (10Hz to 100kHz)
Input Voltage Line Transient Response
VOUT 1mV/DIV VOUT 100V/DIV VIN 50mV/DIV
VOUT = 1V IOUT = 5A COUT = 16.9F
1ms/DIV
3070 G41
VIN = 1.3V VOUT = 1V IOUT = 5A COUT = 16.9F
20s/DIV
3070 G42
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0
LT3070 typicAl perFormAnce chArActeristics
Bias Voltage Line Transient Response
350 VOUT 10mV/DIV VIOC IN-TO-OUT SERVO VOLTAGE (mV) 340 330 320 310 300 290 280 270 260 250 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G44
VIOC Amplifier IN-to-OUT Servo Voltage
VIOC AMPLIFIER OUTPUT CURRENT (A) VBIAS = 2.5V 300 275
VIOC Amplifier Output Current vs Temperature
IVIOC SOURCING 250 IVIOC SINKING 225 200 175 150 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
3070 G45
VBIAS 200mV/DIV
3070 G43
VIN = 1.3V VBIAS = 2.5V VOUT = 1V IOUT = 5A COUT = 16.9F
20s/DIV
Transient Load Response
Transient Load Response
VOUT 50mV/DIV AC-COUPLED
VOUT 50mV/DIV AC-COUPLED
IOUT 2A/DIV I = 500mA TO 5A VOUT = 1V 20s/DIV COUT = 10F + 4.7F + 2.2F IOUT tRISE/tFALL = 100ns
3070 G46
IOUT 2A/DIV I = 500mA TO 5A VOUT = 1V 20s/DIV COUT = 117F IOUT tRISE/tFALL = 100ns
3070 G47
Transient Load Response
Transient Load Response
VOUT 50mV/DIV AC-COUPLED
VOUT 50mV/DIV AC-COUPLED
IOUT 2A/DIV I = 500mA TO 5A
VOUT = 1V 20s/DIV COUT = 10F + 4.7F + 2.2F IOUT tRISE/tFALL = 1s
3070 G48
IOUT 2A/DIV I = 500mA TO 5A VOUT = 1V 20s/DIV COUT = 117F IOUT tRISE/tFALL = 1s
3070 G49
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LT3070 pin Functions
VIOC (Pin 1): Voltage for In-to-Out Control. The IC incorporatesauniquetrackingfunctiontocontrolabuck regulatorpoweringtheLT3070'sinput.TheVIOCpinis theoutputofthistrackingfunctionthatdrivesthebuck regulatortomaintaintheLT3070'sinputvoltageatVOUT+ 300mV.Thisfunctionmaximizesefficiencyandminimizes powerdissipation.SeetheApplicationsInformationsectionformoreinformationonpropercontrolofthebuck regulator. PWRGD (Pin 2):PowerGood.ThePWRGDpinisanopendrainNMOSoutputthatactivelypullslowifanyoneof thesefaultmodesisdetected: * VOUTislessthan90%ofVOUT(NOMINAL)ontherising edgeofVOUT. * VOUTdropsbelow85%ofVOUT(NOMINAL)formorethan 25s. * Junctiontemperaturetypicallyexceeds145C. * VBIASislessthanitsundervoltagelockoutthreshold. * TheOUT-to-INreverse-currentdetectoractivates. SeetheApplicationsInformationsectionformoreinformationonPWRGDfaultmodes. REF/BYP (Pin 3):ReferenceFilter.Thepinistheoutput ofthebandgapreferenceandhasanimpedanceofapproximately19k.Thispinmustnotbeexternallyloaded. BypassingtheREF/BYPpintoGNDwitha10nFcapacitor decreasesoutputvoltagenoiseandprovidesasoft-start functiontothereference.LTCrecommendstheuseofa highquality,lowleakagecapacitor.SeetheApplications Informationsectionformoreinformationonnoiseand outputvoltagemarginingconsiderations. GND (Pins 4, 9-14, 20, 26, 29):Ground.Theexposedpad (Pin29)oftheQFNpackageisanelectricalconnectionto GND.Toensureproperelectricalandthermalperformance, solderPin29tothePCBgroundandtietoallGNDpins ofthepackage.TheseGNDpinsarefusedtotheinternal dieattachpaddleandtheexposedpadtooptimizeheat sinkingandthermalresistancecharacteristics.SeetheApplicationsInformationsectionforthermalconsiderations andcalculatingjunctiontemperature. IN (Pins 5, 6, 7, 8): Input Supply. These pins supply powertothehighcurrentpasstransistor.TieallINpins togetherforproperperformance.TheLT3070requiresa bypasscapacitoratINtomaintainstabilityandlowinput impedanceoverfrequency.A47Finputbypasscapacitor sufficesformostbatteryandpowerplaneimpedances. Minimizinginputtraceinductanceoptimizesperformance. ApplicationsthatoperatewithlowVIN-VOUTdifferential voltagesandthathavelarge,fastloadtransientsmayrequire muchhigherinputcapacitorrequirementstopreventthe inputsupplyfromdroopingandallowingtheregulatorto enterdropout.SeetheApplicationsInformationsection formoreinformationoninputcapacitorrequirements. OUT (Pins 15, 16, 17, 18):Output.Thesepinssupply powertotheload.TieallOUTpinstogetherforproper performance.Aminimumoutputcapacitanceof15Fis requiredforstability.LTCrecommendslowESR,X5Ror X7Rdielectricceramiccapacitorsforbestperformance. Aparallelceramiccapacitorcombinationof10F+4.7F +2.2For151Fceramiccapacitorsinparallelprovide excellentstabilityandloadtransientresponse.Largeload transientapplicationsrequirelargeroutputcapacitorsto limitpeakvoltagetransients.SeetheApplicationsInformationsectionformoreinformationonoutputcapacitor requirements. SENSE (Pin 19):KelvinSenseforOUT.TheSENSEpinis theinvertinginputtotheerroramplifier.Optimumregulation isobtainedwhentheSENSEpinisconnectedtotheOUT pinsoftheregulator.Incriticalapplications,theresistance (RP)ofPCBtracesbetweentheregulatorandtheloadcause smallvoltagedrops,creatingaloadregulationerroratthe pointofload.ConnectingtheSENSEpinattheloadinstead ofdirectlytoOUTeliminatesthisvoltageerror.Figure1 illustratesthisKelvin-Senseconnectionmethod.Notethat thevoltagedropacrosstheexternalPCBtracesaddstothe dropoutvoltageoftheregulator.TheSENSEpininputbias currentdependsontheselectedoutputvoltage.SENSE pininputcurrentvariesfrom50AtypicallyatVOUT=0.8V to300AtypicallyatVOUT=1.8V.
3070fa
LT3070 pin Functions
+
VBIAS EN IN VO2 LT3070 PWRGD LOAD VO1 VIN VO0 MARGSEL MARGTOL VIOC REF/BYP GND RP BIAS SENSE OUT RP
+
3070 F01
VO0, VO1 and VO2 (Pins 23, 24, 25):OutputVoltageSelect.Thesethree-statepinscombinetoselectanominal outputvoltagefrom0.8Vto1.8Vinincrementsof50mV. Outputvoltageislimitedto1.8Vmaximumbyaninternal override of VO1 when VO2 = high. The input logic low thresholdislessthan250mVreferencedtoGNDandthe logichighthresholdisgreaterthanVBIAS-250mV.The rangebetweenthesetwothresholdsassetbyawindow comparatordefinesthelogicHi-Zstate.SeeTable1inthe ApplicationsInformationsectionthatdefinestheVO2,VO1 andVO0settingsversusVOUT. BIAS (Pin 27):BiasSupply.Thispinsuppliescurrentto theinternalcontrolcircuitryandtheoutputstagedriving thepasstransistor.TheLT3070requiresaminimum2.2F bypass capacitor for stability and proper operation. To ensureproperoperation,theBIASvoltagemustsatisfy thefollowingconditions:2.2VVBIAS3.6VandVBIAS (1.25*VOUT+1V).ForVOUT0.95V,theminimumBIAS voltageislimitedto2.2V. EN (Pin 28):Enable.Thispinenables/disablestheoutput deviceonly.Theinternalreferenceandallsupportfunctions areactiveifVBIASisaboveitsUVLOthreshold.Pulling EN low keeps the reference circuit active, but disables theoutputpasstransistorandputstheLT3070intoalow powernapmode.DrivetheENpinwitheitheradigitallogic portoranopen-collectorNPNoranopen-drainNMOS terminatedwithapull-upresistortoVBIAS.Thepull-up resistormustbelessthan35ktomeettheVIHcondition oftheENpin.Ifunused,connectENtoBIAS.
Figure 1. Kelvin Sense Connection
MARGSEL (Pin 21):MarginingEnableandPolaritySelection.Thisthree-statepindeterminesboththepolarityand theactivestateofthemarginingfunction.Thelogiclow thresholdislessthan250mVreferencedtoGNDandenablesnegativevoltagemargining.Thelogichighthreshold isgreaterthanVBIAS-250mVandenablespositivevoltage margining. The voltage range between these two logic thresholdsassetbyawindowcomparatordefinesthe logicHi-Zstateanddisablesthemarginingfunction. MARGTOL (Pin 22): Margining Tolerance. This threestate pin selects the absolute value of margining (1%, 3%or5%)ifenabledbytheMARGSELinput.Thelogic lowthresholdislessthan250mVreferencedtoGNDand enableseither1%changeinVOUTdependingonthestate oftheMARGSELpin.Thelogichighthresholdisgreater thanVBIAS-250mVandenableseither5%changein VOUTdependingonthestateoftheMARGSELpin.The voltagerangebetweenthesetwologicthresholdsasset byawindowcomparatordefinesthelogicHi-Zstateand enableseither3%changeinVOUTdependingonthestate oftheMARGSELpin.
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LT3070 block DiAgrAm
27 BIAS IN 5-8 UVLO AND THERMAL SHUTDOWN
+
ISENSE REF/BYP
+
EAMP
-
BUF LDO CORE DETECT OUT 15-18 SENSE PWRGD 19 2
-
1
VIOC
GND 4,9-14,20,26,29 PROGRAM CONTROL EN 28
VBIAS - 0.25V
VBIAS VO2, VO1, VO0 MARGSEL OR MARGTOL 100k 100k VBIAS - 0.9V 0.75V
LOGIC Hi-Z STATE
+ - + -
LOGIC LOW STATE
0.25V
+
+
-
-
+ -
VOUT(NOM) + 300mV VREF REF/BYP 600mV 3
VO2 VO1 VO0 MARGSEL MARGTOL 25 24 23 21 22
3070 BD
LOGIC HIGH STATE
HIGH IF IN > VBIAS - 0.25V HIGH IF IN < VBIAS - 0.9V AND IN > 0.75V HIGH IF IN < 0.25V TO LOGIC
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LT3070 ApplicAtions inFormAtion
Introduction Current generation FPGA and ASIC processors place stringentdemandsonthepowersuppliesthatpowerthe core,I/Oandtransceiverchannels.Thesemicroprocessors maycycleloadcurrentfromnearzerotoampsintensof nanoseconds.Outputvoltagespecifications,especiallyin the1Vrange,requiretighttolerancesincludingtransient responseaspartoftherequirement.SomeASICprocessors requireonlyasingleoutputvoltagefromwhichthecore andI/Ocircuitryoperate.SomehighperformanceFPGA processorsrequireseparatepowersupplyvoltagesforthe processorcore,theI/O,andthetransceivers.Often,these supplyvoltagesmustbelownoiseandhighbandwidth toachievethelowestbit-errorrates.Theserequirements mandatetheneedforveryaccurate,lownoise,highcurrent,veryhighspeedregulatorcircuitsthatoperateatlow inputandoutputvoltages. TheLT3070isalowvoltage,UltraFasttransientresponse linearregulator.Thedevicesuppliesupto5Aofoutput currentwithatypicaldropoutvoltageof85mV.A0.01F referencebypasscapacitordecreasesoutputvoltagenoise to25VRMS(BW=10Hzto100kHz).TheLT3070'shigh bandwidthprovidesUltraFasttransientresponseusinglow ESRceramicoutputcapacitors(15Fminimum),saving bulkcapacitance,PCBareaandcost. TheLT3070'sfeaturespermitstate-of-the-artlinearregulatorperformance.TheLT3070isidealforhighperformance FPGAs,microprocessors,sensitivecommunicationsupplies,andhighcurrentlogicapplicationsthatalsooperate overlowinputandoutputvoltages. Output voltage for the LT3070 is digitally selectable in 50mVincrementsovera0.8Vto1.8Vrange.Amargining functionallowstheusertoadjustsystemoutputvoltage inincrementsof1%,3%or5%. TheICincorporatesauniquetrackingfunction,whichif enabledbytheuser,controlsanupsteamregulatorpoweringtheLT3070'sinput(seeFigure8).Thistrackingfunction drivesthebuckregulatortomaintaintheLT3070'sinput voltage to VOUT + 300mV. This input-to-output voltage control allows the user to change the regulator output voltage,andhavetheswitchingregulatorpoweringthe LT3070'sinputtotracktotheoptimuminputvoltagewith nocomponentchanges. This combines the efficiency of a switching regulator withsuperiorlinearregulatorresponse.Italsopermits thermalmanagementofthesystemevenwithamaximum 5Aoutputload. LT3070 internal protection includes input undervoltage lockout(UVLO),reverse-currentprotection,precisioncurrentlimitingwithpowerfoldbackandthermalshutdown. TheLT3070regulatorisavailableinathermallyenhanced 28-lead,4mmx5mmQFNpackage. The LT3070's architecture drives an internal N-channel powerMOSFETasasourcefollower.Thisconfiguration permitsausertoobtainanextremelylowdropout,UltraFasttransientresponseregulatorwithexcellenthighfrequencyPSRRperformance.TheLT3070achievessuperior regulatorbandwidthandtransientloadperformanceby eliminatingexpensivebulktantalumorelectrolyticcapacitorsinthemostmodernanddemandingmicroprocessor applications.Usersrealizesignificantcostsavingsasall additional bulk capacitance is removed. The additional savingsofinsertioncost,purchasing/inventorycostand boardspacearereadilyapparent.Precisionincremental outputvoltagecontrolaccommodateslegacyandfuture microprocessorpowersupplyvoltages. Outputcapacitornetworkssimplifytodirectparallelcombinationsofceramiccapacitors.Often,thehighfrequency ceramicdecouplingcapacitorsrequiredbythesevarious FPGAandASICprocessorsaresufficienttostabilizethe system(seeStabilityandOutputCapacitancesection).This regulatordesignprovidesamplebandwidthandresponds totransientloadchangesinafewhundrednanoseconds versusregulatorsthatrespondinmanymicroseconds. TheLT3070alsoincorporatesprecisioncurrentlimiting, enable/disable control of output voltage and integrated overvoltage and thermal shutdown protection. The LT3070's unique design combines the benefits of low dropout voltage, high functional integration, precision performanceandUltraFasttransientresponse,aswellas providingsignificantcostsavingsontheoutputcapacitance neededinfastloadtransientapplications. Aslowervoltageapplicationsbecomeincreasinglyprevalentwithhigherfrequencyswitchingpowersupplies,the LT3070 offers superior regulation and an appreciable
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LT3070 ApplicAtions inFormAtion
componentcostsavings.TheLT3070stepstothenext levelofperformanceforthelatestgenerationFPGAs,DSPs andmicroprocessors.Thesimpleversatilityandbenefits derivedfromthesecircuitsexceedthepowersupplyneeds oftoday'shighperformancemicroprocessors. Programming Output Voltage Three tri-level input pins, VO2, VO1 and VO0, select the valueofoutputvoltage.Table1illustratesthe3-bitdigital wordtooutputvoltageresultingfromsettingthesepins high,loworallowingthemtofloat. Thesepinsmaybetiedhighorlowbyeitherpin-strapping themtoVBIASordrivingthemwithdigitalports.Pinsthat float may either actually float or require logic that has Hi-Zoutputcapability.Thisallowsoutputvoltagetobe dynamicallychangedifnecessary. Outputvoltageisselectablefromaminimumof0.8Vto a maximum of 1.8V in increments of 50mV. The MSB, VO2, sets the pedestal voltage, and the LSB's, VO1 and VO0incrementVOUT. Outputvoltageislimitedto1.8Vmaximumbyaninternal overrideofVO1(defaulttolow)whenVO2=high.
Table 1: VO2 to VO0 Settings vs Output Voltage
VO2 0 0 0 0 0 0 0 0 0 Z Z VO1 0 0 0 Z Z Z 1 1 1 0 0 VO0 0 Z 1 0 Z 1 0 Z 1 0 Z VOUT(NOM) 0.80V 0.85V 0.90V 0.95V 1.00V 1.05V 1.10V 1.15V 1.20V 1.25V 1.30V VO2 Z Z Z Z Z Z Z 1 1 1 VO1 0 Z Z Z 1 1 1 X X X VO0 1 0 Z 1 0 Z 1 0 Z 1 VOUT(NOM) 1.35V 1.40V 1.45V 1.50V 1.55V 1.60V 1.65V 1.70V 1.75V 1.80V
REF/BYP--Voltage Reference Thispinisthebufferedoutputoftheinternalbandgap referenceandhasanoutputimpedanceof19k.The designincludesaninternalcompensationpoleatfC=4kHz. A10nFREF/BYPcapacitortoGNDcreatesalowpasspole atfLP=840Hz.The10nFcapacitordecreasesreference voltagenoisetoabout10VRMSandsoft-startsthereference.TheLT3070onlysoft-startsthereferencevoltage duringaninitialturn-onsequence.IftheENpinistoggled lowafterinitialturn-on,thereferenceremainspowered-up. Therefore,togglingtheENpinfromlowtohighdoesnot soft-startthereference.OnlybyturningtheBIASsupply voltageonandoffwillthereferencebesoft-started.Output voltagenoiseistheRMSsumofthereferencevoltage noiseinadditiontotheamplifiernoise. TheREF/BYPpinmustnotbeDCloadedbyanythingexcept forapplicationsthatparallelotherLT3070regulatorsfor higheroutputcurrents.ConsulttheApplicationsSection onParallelingforfurtherdetails. Output Voltage Margining Twotri-levelinputpins,MARGSEL(polarity)andMARGTOL (scale),selectthepolarityandamountofoutputvoltage margining.Marginingisprogrammableinincrementsof 1%,3%and5%.Marginingisinternallyimplemented asascalingofthereferencevoltage. Table2illustratesthe2-bitdigitalwordtooutputvoltage marginingresultingfromsettingthesepinshigh,lowor allowingthemtofloat. Thesepinsmaybesethighorlowbyeitherpin-strapping themtoVBIASordrivingthemwithdigitalports.Pinsthat float may either actually float or require logic that has "Hi-Z"outputcapability.Thisallowsoutputvoltagetobe dynamicallymarginedifnecessary. TheMARGSELpindeterminesboththepolarityandtheactivestateofthemarginingfunction.Thelogiclowthreshold islessthan250mVreferencedtoGNDandenablesnegative voltagemargining.Thelogichighthresholdisgreaterthan VBIAS-250mVandenablespositivevoltagemargining. Thevoltagerangebetweenthesetwologicthresholdsas setbyawindowcomparatordefinesthelogicHi-Zstate anddisablesthemarginingfunction.
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X=Don'tCare,0=Low,Z=Float,1=High
Theinputlogiclowthresholdislessthan250mVrefer encedtoGNDandthelogichighthresholdisgreaterthan VBIAS-250mV.Therangebetweenthesetwothresholds as set by a window comparator defines the logic Hi-Z state.
LT3070 ApplicAtions inFormAtion
TheMARGTOLpinselectstheabsolutevalueofmargining(1%,3%or5%)ifenabledbytheMARGSELinput. Thelogiclowthresholdislessthan250mVreferencedto GNDandenableseither1%changeinVOUTdepending onthestateoftheMARGSELpin.Thelogichighthreshold isgreaterthanVBIAS-250mVandenableseither5% changeinVOUTdependingonthestateoftheMARGSEL pin.Thevoltagerangebetweenthesetwologicthresholds assetbyawindowcomparatordefinesthelogicHi-Zstate andenableseither3%changeinVOUTdependingonthe stateoftheMARGSELpin.
Table 2: Programming Margining
MARGSEL 0 0 0 Z Z Z 1 1 1 MARGTOL 0 Z 1 0 Z 1 0 Z 1 % OF VOUT(NOM) -1 -3 -5 0 0 0 1 3 5
typicalBIASpinUVLOthresholdis1.55Vontherising edgeofVBIAS.TheUVLOcircuitincorporatesabout150mV ofhysteresisonthefallingedgeofVBIAS. High Efficiency Linear Regulator--Input-to-Output Voltage Control TheVIOC(voltageinput-to-outputcontrol)pinisafunction tocontrolaswitchingregulatorandfacilitateadesignsolutionthatmaximizessystemefficiencyathighloadcurrents andstillprovideslowdropoutvoltageperformance. The VIOC pin is the output of an integrated transconductanceamplifierthatsourcesandsinksabout250A ofcurrent.IttypicallyregulatestheoutputofmostLTC(R) switchingregulatorsorLTM(R)powermodules,bysinking currentfromtheITHcompensationnode.TheVIOCfunction controlsabuckregulatorpoweringtheLT3070'sinputby maintainingtheLT3070'sinputvoltagetoVOUT+300mV. This 300mV VIN-VOUT differential voltage is chosen to providefasttransientresponseandgoodhighfrequency PSRRwhileminimizingpowerdissipationandmaximizing efficiency.Forexample,1.5Vto1.2Vconversionand1.3V to1Vconversionyield1.5Wmaximumpowerdissipation at5Afulloutputcurrent. Figure2depictsthattheswitcher'sfeedbackresistornetworksetsthemaximumswitchingregulatoroutputvoltage ifthelinearregulatorisdisabled.However,oncetheLT3070 isenabled,theVIOCfeedbackloopdecreasestheswitching regulatoroutputvoltagebacktoVOUT+300mV. UsingtheVIOCfunctioncreatesafeedbackloopbetween theLT3070andtheswitchingregulator.Assuch,thefeedbackloopmustbefrequencycompensatedforstability. Fortunately,theconnectionofVIOCtomanyLTCswitching regulatorITHpinsrepresentsahighimpedancecharacteristicwhichistheoptimumcircuitnodetofrequency compensate the feedback loop. Figure 2 illustrates the typicalfrequencycompensationnetworkusedattheVIOC nodetoGND. TheVIOCamplifiercharacteristicsare: gm=3.2mS,IOUT=250A,BW=10MHz. IftheVIOCfunctionisnotused,terminatetheVIOCpintoGND withasmallcapacitor(1000pF)topreventoscillations.
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Enable Function--Turning On and Off TheENpinenables/disablestheoutputdeviceonly.The LT3070referenceandallsupportfunctionsremainactive ifVBIASisaboveitsUVLOthreshold.PullingtheENpin low puts the LT3070 into nap mode. In nap mode, the referencecircuitisactive,buttheoutputisdisabledand quiescentcurrentdecreases. DrivetheENpinwitheitheradigitallogicportoranopencollectorNPNoranopen-drainNMOSterminatedwith apull-upresistortoVBIAS.Thepull-upresistormustbe lessthan35ktomeettheVIHconditionoftheENpin.If unused,connectENtoBIAS. Input Undervoltage Lockout on BIAS Pin An internal undervoltage lockout (UVLO) comparator monitorstheBIASsupplyvoltage.IfVBIASdropsbelow the UVLO threshold, all functions shut down, the pass transistorisgatedoffandoutputcurrentfallstozero.The
LT3070 ApplicAtions inFormAtion
IN SWITCHING REGULATOR LT3070 OUT LOAD REF
FB
VOUT + VREF 300mV REFERENCE ITH
Figure 2. VIOC Control Block Diagram
PWRGD--Power Good PWRGDpinisanopen-drainNMOSdigitaloutputthat activelypullslowifanyoneofthesefaultmodesisdetected: * VOUTislessthan90%ofVOUT(NOMINAL)ontherising edgeofVOUT. * VOUTdropsbelow85%ofVOUT(NOMINAL)formorethan 25s. * VBIASislessthanitsundervoltagelockoutthreshold. * TheOUT-to-INreverse-currentdetectoractivates. * Junctiontemperatureexceeds145Ctypically.* *Thejunctiontemperaturedetectorisanearlywarning indicatorthattripsapproximately20Cbeforethermal shutdownengages. Stability and Output Capacitance TheLT3070'sfeedbacklooprequiresanoutputcapacitor forstability.ChooseCOUTcarefullyandmountitinclose proximitytotheLT3070'sOUTandGNDpins.Includewide routingplanesforOUTandGNDtominimizeinductance. Ifpossible,mounttheregulatorimmediatelyadjacentto theapplicationloadtominimizedistributedinductance for optimal load transient performance. Point-of-Load applications present the best case layout scenario for extractingfullLT3070performance.
LowESR,X5RorX7Rceramicchipcapacitorsarethe LTCrecommendedchoiceforstabilizingtheLT3070.Additionalbulkcapacitorsdistributedbeyondtheimmediate decouplingcapacitorsareacceptableastheirparasiticESL andESR,combinedwiththedistributedPCBinductance isolatesthemfromtheprimarycompensationpoleprovided bythelocalsurfacemountceramiccapacitors. TheLT3070requiresaminimumoutputcapacitanceof 15Fforstability.LTCstronglyrecommendsthattheoutput capacitornetworkconsistofseverallowvalueceramic capacitorsinparallel. Why Do Multiple, Small-Value Output Capacitors Connected in Parallel Work Better? TheLT3070'sunity-gainbandwidthwithCOUTof15Fis about1MHzatitsfull-loadcurrentof5A.Surfacemounted MLCC capacitors have a self-resonance frequency of fR=1/(2LC),whichmustbepushedtoafrequencyhigher thantheregulatorbandwidth.StandardMLCCcapacitors areacceptable.Tokeeptheresonantfrequencygreater than1MHz,theproduct1/(2LC)mustbegreaterthan 1MHz.Atthisbandwidth,PCBviascanaddsignificant inductance,thusthefundamentaldecouplingcapacitors mustbemountedonthesameplaneastheLT3070. Typical0603or0805case-sizecapacitorshaveanESLof ~800pHandPCBmountingcancontributeupto~200pH. Thus, it becomes necessary to reduce the parasitic
+ -
VIOC
3070 F02
+ -
PWM
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LT3070 ApplicAtions inFormAtion
inductance by using a parallel capacitor combination. Asuitablemethodologymustcontrolthisparallelingas capacitorswiththesameself-resonantfrequency,fR,will formatankcircuitthatcaninduceringingoftheirown accord.SmallamountsofESR(5mto20m)havesome benefitindampeningtheresonantloop,buthigherESRs degradethecapacitorresponsetotransientloadsteps withrise/falltimeslessthan1s.Themostareaefficient parallelcapacitorcombinationisagraduated4/2/1scale offRofthesamecasesize.Undertheseconditions,the individualESLsarerelativelyuniform,andtheresonance peaksaredeconstructivelyspreadbeyondtheregulator bandwidth.Therecommendedparallelcombinationthat approximates15Fis10F+4.7F+2.2F .Capacitors withcasesizeslargerthan0805havehigherESLand lower ESR (<5m). Therefore, more capacitors with smallervalues(<10F)mustbechosen.Usersshould considernewgeneration,lowinductancecapacitorsto pushoutfRandmaximizestability.Refertothesurface mountceramiccapacitormanufacturer'sdatasheetsfor capacitorspecifications.Figure3illustratesanoptimum PCBlayoutfortheparalleloutputcapacitorcombination, butalsoillustratestheGNDconnectionbetweentheIN capacitor and the OUT capacitors to minimize the AC GNDloopforfastloadtransients.Thistightbypassing connectionminimizesEMIandoptimizesbypassing. Many of the applications in which the LT3070 excels, suchasFPGA,ASICprocessororDSPsupplies,typically requireahighfrequencydecouplingcapacitornetworkfor thedevicebeingpowered.Thisnetworkgenerallyconsists ofmanylowvalueceramiccapacitorsinparallel.Insome applications,thistotalvalueofcapacitancemaybeclose totheLT3070'sminimum15Fcapacitancerequirement. Thismayreducetherequiredvalueofcapacitancedirectly attheLT3070'soutput.Multiplelowvaluecapacitorsin parallelpresentafavorablefrequencycharacteristicthat pushes many of the parasitic poles/zeroes beyond the LT3070'sunity-gaincrossoverfrequency.Thistechnique illustrates the method that extracts the full bandwidth performanceoftheLT3070. Giveadditionalconsiderationtotheuseofceramiccapacitors.Ceramiccapacitorsaremanufacturedwithavarietyof dielectrics,eachwithdifferentbehavioracrosstemperature andappliedvoltage.Themostcommondielectricsused arespecifiedwithEIAtemperaturecharacteristiccodesof Z5U,Y5V,X5RandX7R.TheZ5UandY5Vdielectricsare goodforprovidinghighcapacitancesinasmallpackage, but they tend to have strong voltage and temperature coefficientsasshowninFigures4and5.Whenusedwith a5Vregulator,a16V10FY5Vcapacitorcanexhibitan effectivevalueaslowas1Fto2FfortheDCbiasvoltage appliedandovertheoperatingtemperaturerange.TheX5R andX7Rdielectricsresultinmorestablecharacteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, whiletheX5Rislessexpensiveandisavailableinhigher values.CarestillmustbeexercisedwhenusingX5Rand X7R capacitors; the X5R and X7R codes only specify operatingtemperaturerangeandmaximumcapacitance change over temperature. Capacitance change due to DCbiaswithX5RandX7RcapacitorsisbetterthanY5V andZ5Ucapacitors,butcanstillbesignificantenoughto dropcapacitorvaluesbelowappropriatelevels.Capacitor DCbiascharacteristicstendtoimproveascomponent casesizeincreases,butexpectedcapacitanceatoperatingvoltageshouldbeverified.Voltageandtemperature coefficientsarenottheonlysourcesofproblems.Some ceramiccapacitorshaveapiezoelectricresponse.Apiezoelectricdevicegeneratesvoltageacrossitsterminalsdue tomechanicalstress,similartothewayapiezoelectric microphoneworks.Foraceramiccapacitorthestress canbeinducedbyvibrationsinthesystemorthermal transients.
Lo-Z INPUT 47F
LT3070 SENSE IN OUT GND 2.2F 4.7F 10F LOAD PLANE
3070 F03
Figure 3. Example PCB Layout
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LT3070 ApplicAtions inFormAtion
20 0 CHANGE IN VALUE (%) -20 -40 -60 -80 -100 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F X5R
theLT3070backtothepowersupplyground),largeinput capacitorsarerequiredtoavoidanunstableapplication. ThisisduetotheinductanceofthewireforminganLC tankcircuitwiththeinputcapacitorandnotaresultofthe LT3070beingunstable.Theselfinductance,orisolated inductance,ofawireisdirectlyproportionaltoitslength. However,thediameterofawiredoesnothaveamajor influenceonitsselfinductance.Forexample,oneinchof 18-AWG,0.04inchdiameterwirehas28nHofselfinductance.Theselfinductanceofa2-AWGisolatedwirewith adiameterof0.26inchisabouthalftheinductanceofa 18-AWGwire.Theoverallselfinductanceofawirecan bereducedintwoways.OneistodividethecurrentflowingtowardstheLT3070betweentwoparallelconductors whichflowsinthesamedirectionineach.Inthiscase, thefartherthewiresareplacedapartfromeachother,the moreinductancewillbereduced,uptoa50%reduction whenplacedafewinchesapart.Splittingthewiresbasicallyconnectstwoequalinductorsinparallel.However, whenplacedincloseproximityfromeachother,mutual inductanceisaddedtotheoverallselfinductanceofthe wires.Themosteffectivewaytoreduceoverallinductance istoplacetheforwardandreturn-currentconductors(the wirefortheinputandthewireforthereturnground)in very close proximity. Two 18-AWG wires separated by 0.05inchreducetheoverallselfinductancetoaboutonefourthofasingleisolatedwire.IftheLT3070ispowered byabatterymountedincloseproximitywithgroundand power planes on the same circuit board, a 47F input capacitorissufficientforstability.However,iftheLT3070 ispoweredbyadistantsupply,usealowESR,largevalue inputcapacitorontheorderof330F .Aspowersupply outputimpedancevaries,theminimuminputcapacitance neededforapplicationstabilityalsovaries. Bias Pin Capacitance Requirements The BIAS pin supplies current to most of the internal controlcircuitryandtheoutputstagedrivingthepass transistor. The LT3070 requires a minimum 2.2F bypass capacitor for stability and proper operation. To ensure proper operation, the BIAS voltage must satisfythefollowingconditions:2.2VVBIAS3.6Vand VBIAS (1.25 * VOUT + 1V). For VOUT 0.95V, the minimumBIASvoltageislimitedto2.2V.
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Y5V
0
2
10 12 4 8 6 DC BIAS VOLTAGE (V)
14
16
3070 F04
Figure 4. Ceramic Capacitor DC Bias Characteristics
40 20 CHANGE IN VALUE (%) 0 -20 -40 -60 -80 -100 -50 -25 Y5V BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F X5R
50 25 75 0 TEMPERATURE (C)
100
125
3070 F05
Figure 5. Ceramic Capacitor Temperature Characteristics
Stability and Input Capacitance The LT3070 is stable with a minimum capacitance of 47FconnectedtoitsINpins.UselowESRcapacitorsto minimizeinstantaneousvoltagedropsunderlargeload transientconditions.LargeVINdroopsduringlargeload transientsmaycausetheregulatortoenterdropoutwith corresponding degradation in load transient response. Increasedvaluesofinputandoutputcapacitancemaybe necessarydependingonanapplication'srequirements. Sufficient input capacitance is critical as the circuit is intentionallyoperatedclosetodropouttominimizepower. Ideally,theoutputimpedanceofthesupplythatpowers INshouldbelessthan10mtosupporta5Aloadwith largetransients. Incaseswherewireisusedtoconnectapowersupply totheinputoftheLT3070(andalsofromthegroundof
0
LT3070 ApplicAtions inFormAtion
Load Regulation TheLT3070providesaKelvinsensepinforVOUT,allowing theapplicationtocorrectforparasiticpackageandPCB I-Rdrops.However,LTCrecommendsthattheSENSEpin terminateincloseproximitytotheLT3070'sOUTpins. Thisminimizesparasiticinductanceandoptimizesregulation.TheLT3070handlesmoderatelevelsofoutputline impedance,butexcessiveimpedancebetweenVOUTand COUTcausesexcessivephaseshiftinthefeedbackloop andadverselyaffectsstability. Figure1inthePinFunctionssectionillustratestheKelvinSenseconnectionmethodthateliminatesvoltagedrops duetoPCBtraceresistance.However,notethatthevoltage dropacrosstheexternalPCBtracesaddstothedropout voltageoftheregulator.TheSENSEpininputbiascurrent dependsontheselectedoutputvoltage.SENSEpininput currentvariesfrom50AtypicallyatVOUT=0.8Vto300A typicallyatVOUT=1.8V. Short-Circuit and Overload Recovery LikemanyICpowerregulators,theLT3070hassafeoperatingarea(SOA)protection.Thesafeareaprotection decreasescurrentlimitasinput-to-outputvoltageincreases andkeepsthepowertransistorinsideasafeoperating regionforallvaluesofinput-to-outputvoltageuptothe absolutemaximumvoltagerating.VBIASmustbeabove theUVLOthresholdforanyfunction.TheLT3070hasa precisioncurrentlimitspecifiedat20%thatisactiveif VBIASisaboveUVLO. Under conditions of maximum ILOAD and maximum VIN-VOUTthedevice'spowerdissipationpeaksatabout 3W.Ifambienttemperatureishighenough,diejunction temperaturewillexceedthe125Cmaximumoperating temperature. If this occurs, the LT3070 relies on two additional thermal safety features. At about 145C, the PWRGDoutputpullslowprovidinganearlywarningofan impendingthermalshutdowncondition.At165Ctypically, theLT3070'sthermalshutdownengagesandtheoutputis shutdownuntiltheICtemperaturefallsbelowthethermal hysteresislimit.TheSOAprotectiondecreasescurrentlimit astheIN-to-OUTvoltageincreasesandkeepsthepower dissipationatsafelevelsforallvaluesofinput-to-output voltage.TheLT3070providessomeoutputcurrentatall valuesofinput-to-outputvoltageuptotheabsolutemaximumvoltagerating.SeetheCurrentLimitvsVINcurvein theTypicalPerformanceCharacteristics. Duringstart-up,aftertheBIASvoltagehascleareditsUVLO thresholdandVINisincreasing,outputvoltageincreases attherateofcurrentlimitchargingCOUT. Withahighinputvoltage,aproblemcanoccurwherethe removalofanoutputshortwillnotallowtheoutputvoltagetorecover.Otherregulatorswithcurrentlimitfoldback alsoexhibitthisphenomenon,soitisnotuniquetothe LT3070.Theloadlineforsuchaloadmayintersectthe outputcurrentcurveattwopoints:normaloperationand theSOArestrictedloadcurrentsettings.Acommonsituationisimmediatelyaftertheremovalofashortcircuit, butwithastaticload1A.Inthissituation,removalofthe loadorreductionofIOUTto<1Awillclearthiscondition andallowVOUTtoreturntonormalregulation. Reverse Voltage TheLT3070incorporatesacircuitthatdetectsifVINdecreases below VOUT. This reverse-voltage detector has atypicalthresholdofabout(VIN-VOUT)=-6mV.Ifthe thresholdisexceeded,thisdetectorcircuitturnsoffthe drivetotheinternalNMOSpasstransistor,therebyturning offtheoutput.Theoutputpullslowwiththeloadcurrent dischargingtheoutputcapacitance.Thiscircuit'sintent istolimitandpreventback-feedcurrentfromOUTtoIN iftheinputvoltagecollapsesduetoafaultoroverload condition. Thermal Considerations The LT3070's maximum rated junction temperature of 125Climitsitspowerhandlingcapabilityandisdominatedbytheoutputcurrentmultipliedbytheinput/output voltagedifferential: IOUT*(VIN-VOUT) TheLT3070'sinternalpowerandthermallimitingcircuitry protectitunderoverloadconditions.Forcontinuousnormalloadconditions,donotexceedthemaximumjunction temperatureof125C.Givecarefulconsiderationtoall sourcesofthermalresistancefromjunctiontoambient. Thisincludesjunctiontocase,case-to-heatsinkinterface,
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LT3070 ApplicAtions inFormAtion
heat sink resistance or circuit board to ambient as the applicationdictates.Also,consideradditionalheatsources mountedinproximitytotheLT3070.TheLT3070isasurface mountdeviceandassuch,heatsinkingisaccomplished byusingtheheatspreadingcapabilitiesofthePCboard and its copper traces. Surface mount heat sinks and platedthrough-holescanalsobeusedtospreadtheheat generated by power devices. Junction-to-case thermal resistanceisspecifiedfromtheICjunctiontothebottom ofthecasedirectlybelowthedie.Thisisthelowestresistancepathforheatflow.Propermountingisrequiredto ensurethebestpossiblethermalflowfromthisareaofthe packagetotheheatsinkingmaterial.Notethattheexposed padiselectricallyconnectedtoGND. Table3liststhermalresistanceasafunctionofcopper areainafixedboardsize.Allmeasurementsweretaken instillairona4-layerFR-4boardwith1ozsolidinternal planesand2oztop/bottomexternaltraceplaneswitha totalboardthicknessof1.6mm.PCBlayers,copperweight, boardlayoutandthermalviasaffecttheresultantthermal resistance.Forfurtherinformationonthermalresistance andhighthermalconductivitytestboards,refertoJEDEC standard JESD51, notably JESD51-12 and JESD51-7. Achievinglowthermalresistancenecessitatesattention todetailandcarefulPCBlayout.
Table 3, UFD Plastic Package, 28-Lead QFN
COPPER AREA TOPSIDE* 2500mm2 1000mm2 225mm2 100mm2 BACK SIDE 2500mm2 2500mm2 2500mm2 2500mm2 BOARD AREA 2500mm2 2500mm2 2500mm2 2500mm2 THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 30C/W 32C/W 33C/W 35C/W
where: IOUT(MAX)=4A VIN(MAX)=1.26V IBIASat(IOUT=4A,VBIAS=2.5V)=6.91mA IGNDat(IOUT=4A,VBIAS=2.5V)=0.87mA thus: P = 4A(1.26V - 0.9V) + (6.91mA - 0.87mA)0.9V + 0.87mA(2.5V)=1.448W With the QFN package soldered to maximum copper area,thethermalresistanceis30C/W.Sothejunction temperatureriseaboveambientequals: 1.448Wat30C/W=43.44C Themaximumjunctiontemperatureequalsthemaximum ambienttemperatureplusthemaximumjunctiontemperatureriseaboveambientor: TJMAX=50C+43.44C=93.44C Applications that cannot support extensive PCB space forheatsinkingtheLT3070requireaderatingofoutput currentorincreasedairflow. Paralleling Devices for Higher IOUT MultipleLT3070smaybeparalleledtoobtainhigheroutput current.Thisparallelingconceptborrowsfromthescheme employedbytheLT3080. Toaccomplishthisparalleling,tietheREF/BYPpinsof theparalleledregulatorstogether.Thiseffectivelygives anaveragedvalueofmultiple600mVreferencevoltage sources.TietheOUTpinsoftheparalleledregulatorsto thecommonloadplanethroughasmallpieceofPCtrace ballastoranactualsurfacemountsenseresistorbeyond theprimaryoutputcapacitorsofeachregulator.Therequiredballastisdependentupontheapplicationoutput voltageandpeakloadcurrent.Therecommendedballast isthatvaluewhichcontributes1%toloadregulation.For example,twoLT3070regulatorsconfiguredtooutput1V, sharinga10Aloadrequire2mofballastateachoutput. TheKelvinSENSEpinsconnecttotheregulatorsideof theballastresistorstokeeptheindividualcontrolloops fromconflictingwitheachother(seeFigures8and9).
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*Deviceismountedontopside
Calculating Junction Temperature Example:Givenanoutputvoltageof0.9V,aninputvoltage rangeof1.2V5%,aBIASvoltageof2.5V,amaximumoutputcurrentof4Aandamaximumambienttemperatureof 50C,whatwillthemaximumjunctiontemperaturebe? Thepowerdissipatedbythedeviceequals: IOUT(MAX)*(VIN(MAX)-VOUT)+(IBIAS -IGND)*VOUT +IGND*VBIAS
LT3070 ApplicAtions inFormAtion
Keepthisballasttraceareafreeofsoldertomaintaina controlledresistance. Table4showsasimpleguidelineforPCBtraceresistance asafunctionofweightandtracewidth.
Table 4. PC Board Trace Resistance
WEIGHT (Oz) 1 2 100 MIL WIDTH* 5.43 2.71 200 MIL WIDTH* 2.71 1.36
*Traceresistanceismeasuredinmilliohms/in
noisereductionofreferencenoise.TheLT3070deviates from the traditional voltage reference by generating a lowvoltageVREFfromareferencecurrentintoaninter nal resistor 19k. This intermediate impedance node (REF/BYP)facilitatesexternalfilteringdirectly.A10nFfilter capacitorminimizesreferencenoiseto10VRMSatthe 600mVREF/BYPpin,equivalentlya17Vcontributionto outputnoiseatVOUT=1V.SeetheTypicalPerformance CharacteristicsforNoisevsOutputVoltageperformance asafunctionofCREF/BYP. This approach also accommodates reference sharing betweenLT3070regulatorsthatarehookedupincurrentsharingapplications.TheREF/BYPfiltercapacitor delaystheinitialpower-uptimebyafactoroftheRCtime constant.VREFremainsactiveinnapmode,thusstart-up timeissignificantlyreducedandwellcontrolledcoming outofnapmode(EN:LOHI).
Quieting the Noise TheLT3070offersnumerousnoiseperformanceadvantages.EachLDOhasseveralsourcesofnoise.AnLDO's mostcriticalnoisesourceisthereference,followedby theLDOerroramplifier.Traditionallownoiseregulators bufferthevoltagereferenceouttoanexternalpin(usually throughalargevalueresistor)toallowforbypassingand
VBIAS 2.5V TO 3.6V 50k 2.2F BIAS
PWRGD
VIN 1.5V
IN 330F EN VO0 VO1 VO2 NC NC 1nF
PWRGD SENSE LT3070 OUT 2.2F* 4.7F* 10F*
VOUT 1.2V 5A
MARGSEL MARGTOL VIOC REF/BYP GND
*X5R OR X7R CAPACITORS
0.01F
3070 F06
Figure 6. 1.5V to 1.2V Linear Regulator
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LT3070 ApplicAtions inFormAtion
VBIAS 3.3V 47F 6.3V 3 0.1F PGOOD RUN SGND PVIN PVIN PLLLPF LTC3415EUHF NC CLKOUT PHMODE NC CLKIN MODE PGND PGND PGND PGND PGND PVIN PVIN SVIN TRACK SW SW SW SW ITH MGN BSEL VFB ITHM SGND PGND PGND
3070 F07
1 NC
SVIN 2.2F 0.2H 1.3V/5A 47F NC 20k NC NC NC NC SVIN 100F 6.3V 2 EN IN VO0 VO1 VO2 MARGTOL MARGSEL VIOC 10k 2k 4.7nF 1nF BIAS
50k
PWRGD
PWRGD SENSE OUT 2.2F* 4.7F*
LT3070
VOUT 1V 5A 10F*
*X5R OR X7R CAPACITORS
REF/BYP GND 0.01F
NOTE: LTC3415 SWITCHER, 2MHz INTERNAL OSCILLATOR LTC3415 AND LT3070 ON SAME PCB POWER PLANE
Figure 7. Regulator with VIOC Buck Control
VBIAS 3.3V
47F 6.3V 3 0.1F
50k 1 NC PGOOD RUN SGND PVIN PVIN PLLLPF PVIN PVIN SVIN TRACK SW SW SW SW ITH NC CLKOUT PHMODE PGND LTC3415EUHF MGN BSEL VFB ITHM SGND PGND PGND 47F NC NC NC NC 1nF EN IN VO0 VO1 VO2 MARGTOL MARGSEL VIOC REF/BYP GND NC 17.5k 1% 15k 1% 100F 6.3V 2 1nF 0.2H EN 47F NC NC NC NC IN VO0 VO1 VO2 MARGTOL MARGSEL VIOC REF/BYP GND BIAS PWRGD SENSE OUT SVIN 2.2F
PWRGD
1.3V/7A
LT3070
2.2F*
4.7F*
10F*
VOUT 1V 3.5A RTRACE 3m CONTROLLED P .O.L. 1
*X5R OR X7R CAPACITORS
0.01F
POWER PLANE 1V/8A P .O.L. 2 RTRACE 3m CONTROLLED VOUT 1V 3.5A
NC
CLKIN MODE PGND PGND PGND PGND
2.2F BIAS
PWRGD SENSE OUT 2.2F* 4.7F* 10F*
NOTE: LTC3415 SWITCHER, 2MHz INTERNAL OSCILLATOR LTC3415 AND LT3070 2 ON SAME PCB POWER PLANE
LT3070
*X5R OR X7R CAPACITORS
0.01F
3070 F08
Figure 8. 1V, 7A Point-of-Load Current Sharing Regulators
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LT3070 typicAl ApplicAtions
VIN 3.3V 50k 2.2F EN 47F IN NC NC NC NC 1nF VIN 3.3V VO0 VO1 VO2 BIAS PWRGD SENSE OUT 2.2F* 4.7F* 10F* PWRGD
LT3070
VOUT 1V 4A RTRACE 2.5m CONTROLLED P .O.L. 1
MARGTOL MARGSEL VIOC REF/BYP GND
*X5R OR X7R CAPACITORS
0.01F
POWER PLANE 1V/7A P .O.L. 2
VIN 3.3V
NC
NC
NC
NC
NC VBUCK1 1.3V/8A 20k 100F 6.3V X5R 10k 2k
2.2F EN BIAS PWRGD SENSE OUT 2.2F* 4.7F* 10F*
10F
10F
SW1 CLKIN1 CLKOUT1 CLKIN2 CLKOUT2 VIN1 VOUT1 SVIN1 MGN1 RUN1 FB1 PLLLPF1 ITH1 MODE1 ITHM1 PHMODE1 BSEL1 TRACK1 PGOOD1 LTM4616 VIN2 VOUT2 SVIN2 MGN2 RUN2 FB2 PLLLPF2 ITH2 MODE2 ITHM2 PHMODE2 BSEL2 TRACK2 PGOOD2 SW2 NC SGND1 GND1 SGND2 GND2
RTRACE 2.5m CONTROLLED VOUT 1V 4A
47F
IN NC NC NC NC 1nF VO0 VO1 VO2
LT3070
NC NC
MARGTOL MARGSEL VIOC REF/BYP GND
*X5R OR X7R CAPACITORS
4.7nF VBUCK2 2.1V/8A 100F 6.3V X5R
0.01F
VIN 3.3V
2.2F EN IN BIAS PWRGD SENSE OUT 2.2F* 4.7F* 10F*
NC NC 47F NC NC NC 2k 4.7nF 1nF VIN 3.3V
VO0 VO1 VO2
LT3070
VOUT 1.8V 5A
NOTE: THE TWO LTM4616 MODULE CHANNELS ARE INDEPENDENTLY CONTROLLED BY THE VIOC CONTROLS FROM THE LINEAR REGULATORS
20k
MARGTOL MARGSEL VIOC REF/BYP GND
*X5R OR X7R CAPACITORS
10k
0.01F
2.2F EN IN BIAS PWRGD SENSE OUT 2.2F* 4.7F* 10F*
47F NC NC NC NC 1nF
VO0 VO1 VO2
LT3070
VOUT 1.5V 3A
MARGTOL MARGSEL VIOC REF/BYP GND
*X5R OR X7R CAPACITORS
0.01F
3070 F09
Figure 9. Triple Output Supply Providing 1V, 8A and 1.8V, 5A and 1.5V, 3A
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LT3070 pAckAge Description
(ReferenceLTCDWG#05-08-1712RevB)
UFD Package 28-Lead Plastic QFN (4mm x 5mm)
0.70 0.05
4.50
0.05 3.10
0.05 2.50 REF 2.65 0.05 3.65 0.05
PACKAGE OUTLINE
0.25 0.05 0.50 BSC 3.50 REF 4.10 0.05 5.50 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) 0.75 0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 45 CHAMFER 27 28 0.40 1 2 5.00 0.10 (2 SIDES) 0.10
2.50 REF R = 0.115 TYP
3.50 REF 3.65 0.10 2.65 0.10
(UFD28) QFN 0506 REV B
0.200 REF 0.00 - 0.05
0.25 BOTTOM VIEW--EXPOSED PAD
0.05
0.50 BSC
NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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LT3070 revision history
REV A DATE 5/10 DESCRIPTION Entiredatasheetrevised PAGE NUMBER 1to28
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresentationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
LT3070 typicAl ApplicAtion
VBIAS 2.5V TO 3.6V 50k 2.2F BIAS PWRGD
VIN 1.5V
IN 330F EN VO0 VO1 VO2 NC NC 1nF
PWRGD SENSE LT3070 OUT 2.2F* 4.7F* 10F*
VOUT 1.2V 5A
MARGSEL MARGTOL VIOC REF/BYP GND
*X5R OR X7R CAPACITORS
0.01F
3070 TA02
1.5V to 1.2V Linear Regulator
relAteD pArts
PART LT1763 LT1764/LT1764A LT1963/LT1963A DESCRIPTION 500mA,LowNoiseLDO 3A,FastTransientResponse,LowNoiseLDO 1.5ALowNoise,FastTransientResponseLDO COMMENTS 300mVDropoutVoltage,LowNoise:20VRMS,VIN:1.8Vto20V, SO-8Package 340mVDropoutVoltage,LowNoise:40VRMS,VIN:2.7Vto20V, TO-220andDDPackages"A"VersionStableAlsowithCeramicCaps 340mVDropoutVoltage,LowNoise:40VRMS,VIN:2.5Vto20V, "A"VersionStablewithCeramicCaps,TO-220,DD,SOT-223and SO-8Packages 290mVDropoutVoltage,LowNoise:40VRMS,VIN:1.8Vto20V, VOUT:1.2Vto19.5V,StablewithCeramicCaps,TO-220,DD-Pak, MSOPand3mmx3mmDFNPackages VIN:0.9Vto10V,DropoutVoltage=160mV(Typ),AdjustableOutput (VREF=VOUT(MIN)=200mV),FixedOutputVoltages:1.2V,1.5V,1.8V, StablewithLowESR,CeramicOutputCapacitors16-PinDFN (5mmx5mm)and8-LeadSOPackages
LT1965
1.1A,LowNoise,LowDropoutLinearRegulator
LT3021
500mA,LowVoltage,VLDOTMLinearRegulator
LT3080/LT3080-1
1.1A,Parallelable,LowNoise,LowDropoutLinearRegulator 300mVDropoutVoltage(2-SupplyOperation),LowNoise:40VRMS, VIN:1.2Vto36V,VOUT:0Vto35.7V,Current-BasedReferencewith 1ResistorVOUTSet;DirectlyParallelable(NoOpAmpRequired), StablewithCeramicCaps,TO-220,SOT-223,MSOP-8and3mm x3mmDFN-8Packages;LT3080-1hasIntegratedInternalBallast Resistor 500mA,Parallelable,LowNoise,LowDropout LinearRegulator 275mVDropoutVoltage(2-SupplyOperation),LowNoise:40VRMS, VIN:1.2Vto36V,VOUT:0Vto35.7V,Current-BasedReferencewith 1ResistorVOUTSet;DirectlyParallelable(NoOpAmpRequired), StablewithCeramicCaps,MSOP-8and2mmx3mmDFN-6 Packages VIN=0.9Vto5.5V,DropoutVoltage:75mV,LowNoise80VRMS, LowIQ:54A,FixedOutput:1.2V(LTC3025-2);AdjustableOutput Range:0.4Vto3.6V(LTC3025-1)2mmx2mm6-LeadDFNPackage VIN:1.14Vto3.5V(BoostEnabled),1.14Vto5.5V(withExternal 5V),VDO=0.1V,IQ=950A,Stablewith10FCeramicCapacitors, 10-LeadMSOPandDFN-10Packages
LT3085
LTC3025-1/ LTC3025-2 LTC3026
500mAMicropowerVLDOLinearRegulator in2mmx2mmDFN 1.5A,LowInputVoltageVLDORegulator
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Linear Technology Corporation
(408)432-1900 FAX: (408) 434-0507 www.linear.com
LT 0510 REV A * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
LINEAR TECHNOLOGY CORPORATION 2009


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