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| FAN7383 Half-Bridge Gate-Drive IC February 2007 FAN7383 Half-Bridge Gate-Drive IC Features Floating Channel Designed for Bootstrap Operation to +600V. Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for Both Channels Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V High-Side Output in Phase of IN Signal Built-in UVLO Functions for Both Channels Built-in Common-Mode dv/dt Noise Canceling Circuit Typically Internal 330ns Minimum Dead-Time Programmable Turn-On Delay Time Control (Dead-Time) Description The FAN7383 is a half-bridge gate-drive IC with shutdown and programmable dead-time control functions for driving MOSFETs and IGBTs that operate up to +600V. Fairchild's high voltage process and common-mode noise canceling technique give stable operation of highside drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS= -9.8V (typical) for VBS=15V. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for all kinds of half and full bridge inverter. 14-SOP Applications SMPS Motor Drive Inverter Fluorescent Lamp Ballast HID Ballast 1 Ordering Information Part Number FAN7383M (1) Package 14-SOP Pb-Free Yes Operating Temperature Range Packing Method -40C ~ 125C Tube Tape & Reel FAN7383MX(1) Note: 1. These devices passed wave soldering test by JESD22A-111. (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Application Circuit RBOOT DBOOT VDC VDD PWM Shutdown PWM IC Control 1 2 3 4 5 IN SD DT VDD LO1 LO2 GND VB HO1 HO2 VS NC NC NC 14 RHON 13 12 11 10 9 8 RHOFF CBOOT RDT 6 7 RLOFF RLON FAN7383 Rev.01 Figure 1. Application Circuit for Half-Bridge Switching Power Supply VDC VCC VDD VB HO1 HO2 VDD VB HO1 HO2 VS PHA PHB IN VS IN SD SD Forward SD M Reverse LO1 FAN7383 LO1 DT GND LO2 FAN7383 LO2 GND DC Motor Controller DT FAN7383 Rev.01 Figure 2. Application Circuit for Full-Bridge DC Motor Driver (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 2 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Internal Block Diagram 14 UVLO VB HO1 HO2 VS VDD LO1 LO2 GND 13 12 11 DRIVER PULSE GENERATOR NOISE CANCELLER R S R Q IN SD DT 1 2 3 SCHMITT TRIGGER INPUT HS(ON/OFF) UVLO SHOOT THOUGH PREVENTION DEAD-TIME { DTMIN=330nsec } LS(ON/OFF) 4 5 6 7 DRIVER DELAY FAN7383 Rev:01 Figure 3. Functional Block Diagram of FAN7383 (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 3 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Pin Configuration IN SD DT VDD LO1 LO2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VB HO1 HO2 VS NC NC NC Figure 4. Pin Configuration (Top View) FAN7383 FAN7383 Rev:00 Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name IN SD DT VDD LO1 LO2 GND N.C. N.C. N.C. VS HO2 HO1 VB Logic Input for Gate Driver Description Logic Input for Shutdown (Active Low) Programmable Dead-Time Control with External Resistor Low-Side Supply Voltage Low-Side Driver Source Output Low-Side Driver Sink Output Ground Not connected Not connected Not connected High-Side Floating Supply Return High-Side Driver Sink Output High-Side Driver Source Output High-Side Floating Supply (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 4 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25C unless otherwise specified. Symbol VS VB VHO VDD VLO VIN VSD VDT GND dVS/dt PD(2)(3)(4) JA TJ TSTG Parameter High-side offset voltage High-side floating supply voltage High-side floating output voltage HO1, HO2 Low-side and logic fixed supply voltage Low-side output voltage LO1, LO2 Logic input voltage (IN) Shutdown logic input voltage Dead-time control voltage Logic ground Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature Min. VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 -0.3 -0.3 VDD-25 Max. VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 VDD+0.3 5.0 VDD+0.3 50 1.0 110 150 150 Unit V V V V V V V V V V/ns W C/W C C Notes: 2. When mounted on 76.2 x 114.3 x 1.6mm PCB. (FR-4 glass epoxy material). 3. Please refer to: JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VB VS VDD VHO VLO VIN TA Parameter High-side floating supply voltage High-side floating supply offset voltage Low-side supply voltage High-side (HO) output voltage Low-side (LO) output voltage Logic input voltage (IN) Ambient temperature Condition Min. VS+15 6-VDD 15 VS GND GND -40 Max. VS+20 600 20 VB VDD VDD 125 Unit V V V V V V C (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 5 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Electrical Characteristics VBIAS (VDD, VBS) = 15.0V, RDT = GND, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS and GND and are applicable to the respective outputs HO and LO. Symbol IQBS IQDD ISD(5) IPBS IPDD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVH VBSUVH VOH VOL IO+ IOVS Parameter Quiescent VBS supply current Quiescent VDD supply current VDD supply current at shutdown mode Operating VBS supply current Operating VDD supply current Offset supply leakage current VDD and VBS supply under-voltage positive going threshold VDD and VBS supply under-voltage negative going threshold VDD and VBS supply under-voltage lockout hysteresis High-level output voltage, VBIAS-VO Low-level output voltage, VO Output high short-circuit pulse current Output low short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO Logic "1" input voltage Logic "0" input voltage Logic "1" input bias current Logic "0" input bias current Shutdown "1" input voltage Shutdown "0" input voltage Input pull-down resistance VIN=5V VIN=0V IO=20mA Condition VIN=0V or 5V VIN=0V or 5V, RDT=0 SD=GND fIN=20kHz,rms value fIN=20kHz,rms value, RDT=0 VB=VS=600V Min. Typ. Max. Unit 35 650 650 400 950 90 900 900 700 1200 10 A SUPPLY CURRENT SECTION POWER SUPPLY SECTION 10.7 10.0 11.6 10.8 0.8 12.5 11.6 V GATE DRIVER OUTPUT SECTION 1.0 0.6 VO=0V, VIN=5V with PW<10s VO=15V, VIN=0V with PW<10s 250 500 350 650 -9.8 -7.0 V V mA mA V LOGIC INPUT SECTION (INPUT AND SHUTDOWN) VIH VIL IIN+ IINSD+ SDRPD 2.9 1.2 50 100 2.0 1.2 2.9 100 V V A A V V K Note: 5.This parameter guaranteed by design. (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 6 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Dynamic Electrical Characteristics VBIAS (VDD, VBS) = 15.0V, VS = GND, CL=1000pF, RDT = GND, and TA = 25C, unless otherwise specified. Symbol tON tOFF tR tF tSD (5) Parameter Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Shutdown propagation delay Dead-time LO OFF to HO ON and HO OFF to LO ON Dead-time matching RDT=0 VS=0V Conditions VS=0V or 600V (5) Min. Typ. Max. Unit 500 170 50 30 100 250 1.20 330 1.68 0 0 670 250 100 80 180 420 2.30 60 150 ns s ns ns DT1, DT2 DMT RDT=200K RDT=0 RDT=200K Note: 5.These parameters guaranteed by design. (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 7 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Characteristics 11.6 12.0 11.4 VDDUV+ ,VBSUV+ [V] 11.6 11.4 11.2 11.0 10.8 -40 -20 0 20 40 60 80 100 120 VDDUV- ,VBSUV- [V] 11.8 11.2 11.0 10.8 10.6 10.4 10.2 10.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 5. VDD/VBS UVLO (+) vs. Temperature Figure 6. VDD/VBS UVLO (-) vs. Temperature 1000 100 800 80 IQDD [A] 600 IQBS [A] -20 0 20 40 60 80 100 120 60 400 40 200 20 -40 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 7. VDD Quiescent Current vs. Temperature Figure 8. VBS Quiescent Current vs. Temperature 1600 1400 800 600 IPDD [A] 1000 800 IPBS [A] -20 0 20 40 60 80 100 120 1200 400 200 600 400 -40 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 9. VDD Operating Current vs. Temperature Figure 10. VBS Operating Current vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 8 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 100 3.0 2.5 2.0 80 IIN+ [A] 60 VIH [V] 1.5 1.0 40 20 0.5 0.0 -40 0 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 11. Logic Input Current vs. Temperature Figure 12. Logic Input High Voltage vs. Temperature 3.0 2.5 2.0 3.0 2.5 SD+ BAR [V] -20 0 20 40 60 80 100 120 2.0 1.5 1.0 0.5 0.0 -40 VIL [V] 1.5 1.0 0.5 0.0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 13. Logic Input Low Voltage vs. Temperature Figure 14. SD Positive Threshold vs. Temperature 3.0 2.5 100 80 SD- BAR [V] tR [nsec] -20 0 20 40 60 80 100 120 2.0 1.5 1.0 0.5 0.0 -40 60 40 20 0 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 15. SD Negative Threshold vs. Temperature Figure 16. Rising Time vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 9 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) 80 700 600 60 tON [nsec] tF [nsec] 500 40 400 20 300 0 -40 -20 0 20 40 60 80 100 120 200 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 17. Falling Time vs. Temperature Figure 18. Turn-on Delay Time vs. Temperature 300 400 250 DT1, RDT= 0 [nsec] tOFF [nsec] 200 150 100 50 0 -40 360 320 280 -20 0 20 40 60 80 100 120 240 -40 -20 0 20 40 60 80 100 120 Temperature [C] Temperature [C] Figure 19. Turn-off Falling Time vs. Temperature Figure 20. Dead-Time (RDT=0k) vs. Temperature 2.4 2.0 DT1, RDT= 200k [nsec] 2.2 2.0 1.8 1.6 1.4 1.2 -40 1.6 Deadtime [S] 1.2 0.8 0.4 -20 0 20 40 60 80 100 120 0.0 0 20 40 60 80 100 120 140 160 180 200 Temperature [C] RDT [kohm] Figure 21. Dead Time (RDT=200k) vs. Temperature Figure 22. RDT vs. Dead Time (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 10 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Characteristics (Continued) -6 -8 VS [V] -10 -12 -14 -40 -20 0 20 40 60 80 100 120 Temperature [C] Figure 23. Allowable Negative VS Voltage for Signal Propagation to High Side vs. Temperature (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 11 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Switching Time Definitions +15V 10F 100nF FAN7383 1 2 10F 100nF +15V IN SD DT VDD LO1 LO2 GND VB HO1 HO2 VS NC NC NC 14 13 12 11 10 9 8 HO1, 2 1nF SD 3 4 LO1, 2 5 6 1nF 7 FAN7383 Rev:00 Figure 24. Switching Time Test Circuit IN HO1, 2 LO1, 2 SD DT1 DT2 Shutdown DT2 DT1 Shutdown DT1 FAN7383 Rev:00 Figure 25. Input / Output Waveforms IN 50% 50% tOFF 90% LO1, 2 tON 10% 90% HO1, 2 tON 10% tOFF FAN7383 Rev:00 Figure 26. Switching Time Waveform Definitions (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 12 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC 50% SD 90% HO or LO tSD FAN7383 Rev:00 Figure 27. Shutdown Waveform Definition 90% HO 10% DT1 90% DT2 LO MDT= DT1-DT2 10% FAN7383 Rev:00 Figure 28. Dead-Time Waveform Definition (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 13 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Typical Application Information 1. Normal Operating Consideration The FAN7383 is a single PWM input half-bridge gatedrive IC with programmable dead-time and shutdown function. The dead-time is set with a resistor (RDT) at the DT pin. The wide dead-time programming range provides the flexibility to optimize drive signal timing for a selection of switching devices (MOSFET or IGBT) and applications. The turn-on time delay circuitry (Dead-Time) accommodates resistor values from 0 to 200k with a dead-time proportional to the RDT resistance. Grounding the DT pin programs the FAN7383 to drive both outputs with minimum dead time. If the SD pin voltage decrease below 1.2V in normal operation, the IC enters the shutdown mode. 3. Layout Consideration For optimum performance of high- and low-side gate drivers, cannot be achieved without taking due considerations must be taken during printed circuit board (PCB) layout. 3.1 Supply Capacitors If the output stages are able to quickly turn on the switching device with high value of current, the supply capacitors must be placed as close as possible to the device pins (VDD and GND for the ground-tied supply, VB and VS for the floating supply) to minimize parasitic inductance and resistance. 3.2 Gate Drive Loop Current loops behave like an antenna, able to receive and transmit noise. To reduce the noise coupling/ emission and improve the power switch turn-on and off performances, gate drive loops must be reduced as much as possible. 2. Under-Voltage Lockout (UVLO) The FAN7383 has an under-voltage lockout (UVLO) protection circuitry for high and low side channels to prevent malfunction when VDD or VBS is lower than the specified threshold voltage. The UVLO circuitry monitors the supply voltage (VDD) and bootstrap capacitor voltage (VBS) independently. 3.3 Ground Plane Ground plane must not be placed under or nearby the high-voltage floating side to minimize noise coupling. (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 14 www.fairchildsemi.com FAN7383 Half-Bridge Gate-Drive IC Package Dimensions 14-SOP Dimensions are in millimeters unless otherwise noted. MIN 1.55 0.10 0.061 0.004 0.05 0.002 #1 #14 8.70 MAX 0.343 8.56 0.20 0.337 0.008 #7 #8 6.00 0.30 0.236 0.012 1.80 MAX 0.071 +0.10 0.20 -0.05 +0.004 0.008 -0.002 3.95 0.20 0.156 0.008 5.72 0.225 0.60 0.20 0.024 0.008 0~ 8 January 2001, Rev. A Figure 29. 14-Lead Small Outline Package (SOP) (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 15 MAX0.10 MAX0.004 1.27 0.050 www.fairchildsemi.com +0.10 0.406 -0.05 +0.004 0.016 -0.002 ( 0.47 ) 0.019 FAN7383 Half-Bridge Gate-Drive IC TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTLTM Current Transfer LogicTM DOME 2 E CMOS (R) EcoSPARK EnSigna FACT Quiet SeriesTM (R) FACT (R) FAST FASTr FPS (R) FRFET GlobalOptoisolator GTO (R) HiSeC i-Lo ImpliedDisconnect IntelliMAX ISOPLANAR MICROCOUPLER MicroPak MICROWIRE MSX MSXPro OCX OCXPro (R) OPTOLOGIC (R) OPTOPLANAR PACMAN POP (R) Power220 (R) Power247 PowerEdge PowerSaver PowerTrench Programmable Active Droop (R) QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect ScalarPump SMART START (R) SPM SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 TCM (R) The Power Franchise TM (R) TinyLogic TINYOPTO TinyPower TinyWire TruTranslation SerDes (R) UHC UniFET VCX Wire (R) TinyBoost TinyBuck DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I23 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. No Identification Needed Full Production Obsolete Not In Production (c) 2006 Fairchild Semiconductor Corporation FAN7383 Rev. 1.0.3 16 www.fairchildsemi.com |
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