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| BSC072N03LD G OptiMOSTM3 Power-Transistors Features * Dual N-channel, logic level * Fast switching MOSFETs for SMPS * Optimized technology for DC/DC converters * Qualified according to JEDEC1) for target applications * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) * Superior thermal resistance * 100% avalanche tested * Pb-free plating; RoHS compliant * Halogen-free according to IEC61249-2-21 Type BSC072N03LD G Package PG-TDSON-8 Marking 072N03LD Product Summary V DS R DS(on),max ID 30 7.2 20 PG-TDSON-8 V m A Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Value 10 secs Continuous drain current ID V GS=10 V, T C=25 C V GS=10 V, T C=100 C V GS=4.5 V, T C=25 C V GS=4.5 V, T C=100 C V GS=10 V, T A=25 C3) Pulsed drain current2) Avalanche energy, single pulse Gate source voltage Power dissipation I D,pulse E AS V GS P tot T C=25 C T A=25 C3) Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) Unit steady state 20 20 20 20 A 17.9 80 90 20 57 3.6 11.5 T C=25 C I D=20 A, R GS=25 mJ V W 1.5 T j, T stg -55 ... 150 55/150/56 C J-STD20 and JESD22 Rev. 1.4 page 1 2009-10-23 BSC072N03LD G Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics Thermal resistance, junction - case R thJC bottom top Thermal resistance, junction ambient, 6 cm cooling area 3) R thJA t10 s steady state 2.2 20 35 85 K/W Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=250 A V DS=30 V, V GS=0 V, T j=25 C V DS=30 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=20 A V GS=10 V, I D=20 A Gate resistance Transconductance 2) 3) 30 1 - 0.1 2.2 1 V A - 10 10 7.5 6.0 1.5 57 100 100 9.4 7.2 2.3 S nA m RG g fs |V DS|>2|I D|R DS(on)max, I D=20 A 28 See figure 3 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. One transistor active. Rev. 1.4 page 2 2009-10-23 BSC072N03LD G Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 4) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total Q gs Q g(th) Q gd Q sw Qg V plateau Qg V DD=15 V, I D=20 A, V GS=0 to 10 V V DS=0.1 V, V GS=0 to 4.5 V V DD=15 V, V GS=0 V V DD=15 V, I D=20 A, V GS=0 to 4.5 V 7.2 3.8 3.4 6.8 15 3.0 31 20 41 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=20 A, R G=1.6 V GS=0 V, V DS=15 V, f =1 MHz 2600 920 49 6.0 4.0 25 4.0 3500 1200 ns pF Values typ. max. Unit Gate charge total, sync. FET Output charge Reverse Diode Diode continuous forward current Diode pulse current Diode forward voltage Q g(sync) Q oss - 13 24 - nC IS I S,pulse V SD T C=25 C V GS=0 V, I F=20 A, T j=25 C V R=15 V, I F=I S, di F/dt =400 A/s - 0.87 20 80 1.1 A V Reverse recovery charge Q rr - - 10 nC 4) See figure 16 for gate charge parameter definition Rev. 1.4 page 3 2009-10-23 BSC072N03LD G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS10 V 60 25 50 20 40 15 P tot [W] 30 I D [A] 10 5 0 0 40 80 120 160 0 40 80 120 160 20 10 0 T C [C] T C [C] 3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p 103 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 10 limited by on-state resistance 102 10 ms 1 s 10 s 0.5 1 Z thJC [K/W] 100 s I D [A] DC 0.2 0.1 0.05 10 1 1 ms 0.1 10 0 0.02 0.01 single pulse 10-1 10-1 100 101 102 0.01 0 0 0 0 0 0 1 10-6 10-5 10-4 10-3 10-2 10-1 100 V DS [V] t p [s] Rev. 1.4 page 4 2009-10-23 BSC072N03LD G 5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS 80 10 V 5V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS 20 70 4.5 V 3V 60 15 3.2 V 40 R DS(on) [m] 50 4V 3.5 V 3.5 V I D [A] 10 4V 4.5 V 10 V 5V 30 3.2 V 20 3V 5 10 2.8 V 0 0 1 2 3 0 0 10 20 30 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 80 8 Typ. forward transconductance g fs=f(I D); T j=25 C 80 70 70 60 60 50 50 40 g fs [S] 150 C 25 C I D [A] 40 30 30 20 20 10 10 0 0 1 2 3 4 5 0 0 10 20 30 V GS [V] I D [A] Rev. 1.4 page 5 2009-10-23 BSC072N03LD G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=20 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS; I D=250 A 12 2.5 10 2 8 98 % R DS(on) [m] 6 typ V GS(th) [V] 100 140 180 1.5 1 4 2 0.5 0 -60 -20 20 60 0 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 104 100 150 C, 98% Ciss 25 C 103 Coss C [pF] I F [A] 10 150 C 25 C, 98% 10 2 Crss 101 0 10 20 30 1 0.0 0.5 1.0 1.5 2.0 V DS [V] V SD [V] Rev. 1.4 page 6 2009-10-23 BSC072N03LD G 13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=20 A pulsed parameter: V DD 12 15 V 10 6V 24 V 10 25 C 125 C 100 C 8 V GS [V] 1 0.1 1 10 100 1000 I AV [A] 6 4 2 0 0 10 20 30 40 t AV [s] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 34 V GS 32 Qg 30 V BR(DSS) [V] 28 26 V g s(th) 24 22 Q g(th) Q gs -60 -20 20 60 100 140 180 Q sw Q gd Q g ate 20 T j [C] Rev. 1.4 page 7 2009-10-23 BSC072N03LD G Package Outline and Footprint PG-TDSON-8 dual Rev. 1.4 page 8 2009-10-23 BSC072N03LD G Tape PG-TDSON-8 Dimensions in mm Rev. 1.4 page 9 2009-10-23 BSC072N03LD G Published by Infineon Technologies AG 81726 Munich, Germany (c) 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.4 page 10 2009-10-23 |
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