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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
Rev. 02 -- 23 November 2010 Product data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.
1.2 Features and benefits
High reliability Power SO8 package, qualified to 175C Optimised for 4.5V Gate drive utilising Superjunction technology Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads Ultra low Rdson and low parasitic inductance
1.3 Applications
DC-to-DC converters Lithium-ion battery protection Load switching Power OR-ing Server power supplies Sync rectifier
1.4 Quick reference data
Table 1. Symbol VDS ID Ptot Tj Quick reference data Parameter drain-source voltage drain current total power dissipation junction temperature drain-source on-state resistance VGS = 4.5 V; ID = 25 A; Tj = 25 C; see Figure 12 VGS = 10 V; ID = 25 A; Tj = 25 C; see Figure 12 Conditions Tj 25 C; Tj 175 C Tmb = 25 C; VGS = 10 V; see Figure 1 Tmb = 25 C; see Figure 2
[1]
Min -55
Typ -
Max Unit 30 100 137 175 V A W C
Static characteristics RDSon 1.1 1.4 m
0.85 1.15 m
NXP Semiconductors
PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
Quick reference data ...continued Parameter Conditions Min Typ Max Unit nC nC
Table 1. Symbol QGD QG(tot)
[1]
Dynamic characteristics gate-drain charge VGS = 4.5 V; ID = 25 A; total gate charge VDS = 15 V; see Figure 14; see Figure 15 14.6 50 -
Continuous current is limited by package.
2. Pinning information
Table 2. Pin 1 2 3 4 mb Pinning information Symbol Description S S S G D source source source gate mounting base; connected to drain
mbb076
Simplified outline
mb
Graphic symbol
D
G S
1234
SOT669 (LFPAK)
3. Ordering information
Table 3. Ordering information Package Name PSMN1R0-30YLC LFPAK Description Version plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669 Type number
4. Marking
Table 4. Marking codes Marking code[1] 1C030L Type number PSMN1R0-30YLC
[1]
% = -: made in Hong Kong; % = p: made in Hong Kong; % = t: made in Malaysia; % = W: made in China
PSMN1R0-30YLC
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Product data sheet
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
5. Limiting values
Table 5. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj Tsld(M) VESD IS ISM EDS(AL)S Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature peak soldering temperature electrostatic discharge voltage source current peak source current non-repetitive drain-source avalanche energy MM (JEDEC JESD22-A115) Tmb = 25 C pulsed; tp 10 s; Tmb = 25 C VGS = 10 V; Tj(init) = 25 C; ID = 100 A; Vsup 30 V; RGS = 50 ; unclamped; see Figure 3
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions Tj 25 C; Tj 175 C Tj 25 C; Tj 175 C; RGS = 20 k VGS = 10 V; Tmb = 25 C; see Figure 1 VGS = 10 V; Tmb = 100 C; see Figure 1 pulsed; tp 10 s; Tmb = 25 C; see Figure 4 Tmb = 25 C; see Figure 2
[1] [1]
Min -20 -55 -55 960 -
Max 30 30 20 100 100 1030 137 175 175 260 100 1030 259
Unit V V V A A A W C C C V A A mJ
Source-drain diode
Avalanche ruggedness
[1]
Continuous current is limited by package.
300 ID (A) 200
003a a e 940
120 Pder (%) 80
03na19
100
(1)
40
0 0 50 100 150 200 Tmb (C)
0
0
50
100
150 Tmb (C)
200
Fig 1.
Continuous drain current as a function of mounting base temperature
Fig 2.
Normalized total power dissipation as a function of mounting base temperature
PSMN1R0-30YLC
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Product data sheet
Rev. 02 -- 23 November 2010
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NXP Semiconductors
PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
103 I AL (A) 102
(1)
003a a e 954
10
(2)
1
10-1 10-3
10-2
10-1
1
tAL (ms )
10
Fig 3.
104 ID (A) 103
Single pulse avalanche rating; avalanche current as a function of avalanche time
003a a e 941
Limit R DS on = VDS / ID tp =10 s
10
2
100 s
10
DC 1 ms 10 ms 100 ms
1
10-1 10-1
1
10
V DS (V)
102
Fig 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN1R0-30YLC
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Product data sheet
Rev. 02 -- 23 November 2010
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
6. Thermal characteristics
Table 6. Symbol Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to mounting base Conditions see Figure 5 Min Typ 0.4 Max 1.09 Unit K/W
1 Zth(j-mb) (K/W) 10
-1
003a a e 942
= 0.5 0.2 0.1 0.05
tp T
10-2
0.02 s ingle s hot
P
=
tp T
t
10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s ) 1
Fig 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN1R0-30YLC
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
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NXP Semiconductors
PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
7. Characteristics
Table 7. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 250 A; VGS = 0 V; Tj = 25 C ID = 250 A; VGS = 0 V; Tj = -55 C ID = 1 mA; VDS = VGS; Tj = 25 C; see Figure 10 ID = 10 mA; VDS = VGS; Tj = 150 C; see Figure 11 ID = 1 mA; VDS = VGS; Tj = -55 C; see Figure 11 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 30 V; VGS = 0 V; Tj = 25 C VDS = 30 V; VGS = 0 V; Tj = 150 C VGS = 16 V; VDS = 0 V; Tj = 25 C VGS = -16 V; VDS = 0 V; Tj = 25 C VGS = 4.5 V; ID = 25 A; Tj = 25 C; see Figure 12 VGS = 4.5 V; ID = 25 A; Tj = 150 C; see Figure 12; see Figure 13 VGS = 10 V; ID = 25 A; Tj = 25 C; see Figure 12 VGS = 10 V; ID = 25 A; Tj = 150 C; see Figure 12; see Figure 13 RG QG(tot) gate resistance total gate charge f = 1 MHz ID = 25 A; VDS = 15 V; VGS = 10 V; see Figure 14; see Figure 15 ID = 0 A; VDS = 0 V; VGS = 10 V; see Figure 15 QGS QGS(th) QGS(th-pl) QGD VGS(pl) Ciss Coss Crss td(on) tr td(off) tf
PSMN1R0-30YLC
Min 30 27 1.05 0.5 -
Typ 1.41 1.1 0.85 1.1 103.5 96.5 50 12.9 10.1 2.8 14.6 2.2 6645 1210 481 44 77 108 60
Max 1.95 2.25 1 100 100 100 1.4 2.5 1.15 2.1 2.2 -
Unit V V V V V A A nA nA m m m m nC nC nC nC nC nC nC V pF pF pF ns ns ns ns
Static characteristics
Dynamic characteristics
gate-source charge pre-threshold gate-source charge post-threshold gate-source charge gate-drain charge gate-source plateau voltage input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time
ID = 25 A; VDS = 15 V; VGS = 4.5 V; see Figure 14; see Figure 15
VDS = 15 V; see Figure 14 VDS = 15 V; VGS = 0 V; f = 1 MHz; Tj = 25 C; see Figure 16
-
VDS = 15 V; RL = 0.6 ; VGS = 4.5 V; RG(ext) = 4.7
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
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NXP Semiconductors
PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
Table 7. Symbol Qoss
Characteristics ...continued Parameter output charge Conditions VGS = 0 V; VDS = 15 V; f = 1 MHz; Tj = 25 C IS = 25 A; VGS = 0 V; Tj = 25 C; see Figure 17 IS = 25 A; dIS/dt = -100 A/s; VGS = 0 V; VDS = 15 V VGS = 0 V; IS = 25 A; dIS/dt = -100 A/s; VDS = 15 V; see Figure 18 Min Typ 39.5 Max Unit nC
Source-drain diode VSD trr Qr ta tb source-drain voltage reverse recovery time recovered charge reverse recovery rise time reverse recovery fall time 0.8 45 67 28.5 16.5 1.1 V ns nC ns ns
100 ID (A) 75
003a a e 943
3.0 2.8 4.5 10.0
8 RDS on (m) 6
003a a e 944
2.6
50
VGS (V) = 2.4
4
25 2.2
2
0 0 0.5 VDS (V) 1
0 0 4 8 12 VGS (V) 16
Fig 6.
Output characteristics: drain current as a function of drain-source voltage; typical values
Fig 7.
Drain-source on-state resistance as a function of gate-source voltage; typical values
PSMN1R0-30YLC
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
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NXP Semiconductors
PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
300 gfs (S ) 240
003a a e 949
100 ID (A) 75
003a a e 951
180 50 120 25 60 Tj = 25 C Tj = 150 C
0 0 25 50 75 I D (A) 100
0 0 1 2 3 VGS (V) 4
Fig 8.
Forward transconductance as a function of drain current; typical values
003a a e 948
Fig 9.
Transfer characteristics: drain current as a function of gate-source voltage; typical values
3
003a a e 947
10-1 ID (A) 10-2 Min Typ Max
VGS (th) (V) 2
Max (1mA) I D = 5mA
10-3
1mA
10-4 1 10-5 Min (5mA)
10-6 0 1 2 VGS (V) 3
0 -60
0
60
120
Tj ( C)
180
Fig 10. Sub-threshold drain current as a function of gate-source voltage
Fig 11. Gate-source threshold voltage as a function of junction temperature
PSMN1R0-30YLC
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
8 RDS on (m) 6 VGS (V) =2.6 2.4
003a a e 945
2 a 4.5V 1.5
003a a e 946
VGS = 10V 4 2.8 3.0 3.5 10 75 I D (A) 100 0 -60 0 60 120 Tj ( C) 180 1
2
0.5
4.5 0 0 25 50
Fig 12. Drain-source on-state resistance as a function of drain current; typical values
Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature
003a a e 952
VDS ID VGS(pl)
10 VGS (V) 8
6
VGS(th) VGS QGS1 QGS2 QGD QG(tot)
003aaa508
6V 15V 4 VDS = 24V 2
QGS
0 0 40 80 QG (nC) 120
Fig 14. Gate charge waveform definitions
Fig 15. Gate-source voltage as a function of gate charge; typical values
PSMN1R0-30YLC
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
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NXP Semiconductors
PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
104
003a a e 950
100 IS (A) 75
003a a e 953
Cis s C (pF)
103
Cos s
50 Tj = 150 C
Crs s 25 Tj = 25 C
102 10-1
1
10
VDS (V)
102
0 0 0.3 0.6 0.9 VS D (V) 1.2
Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
Fig 17. Source current as a function of source-drain voltage; typical values
003a a f 444
ID (A)
trr ta 0 tb
0.25 IRM I RM
t (s )
Fig 18. Reverse recovery timing definition
PSMN1R0-30YLC
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
10 of 15
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
8. Package outline
Plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
E b2 L1
A c2
A2
C E1 b3
mounting base D1 H D
b4
L2
1
e
2
3
b
1/2
4
wM A c X
e
A A1 C
(A 3)
detail X L yC 0 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 8 0
1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62
0.25 0.30 4.10 4.20 0.19 0.24 3.80
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 04-10-13 06-03-16
Fig 19. Package outline SOT669 (LFPAK)
PSMN1R0-30YLC All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
9. Revision history
Table 8. Revision history Release date 20101123 Data sheet status Product data sheet Objective data sheet Change notice Supersedes PSMN1R0-30YLC v.1 Document ID PSMN1R0-30YLC v.2 Modifications: PSMN1R0-30YLC v.1
*
Status changed from objective to product.
20101109
PSMN1R0-30YLC
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Product data sheet
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
10. Legal information
10.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
10.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective
10.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
PSMN1R0-30YLC
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Product data sheet
Rev. 02 -- 23 November 2010
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications.
agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, IC-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE -- are trademarks of NXP B.V. HD Radio and HD Radio logo -- are trademarks of iBiquity Digital Corporation.
11. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN1R0-30YLC
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 -- 23 November 2010
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PSMN1R0-30YLC
N-channel 30 V 1.15 m logic level MOSFET in LFPAK
12. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 10.1 10.2 10.3 10.4 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact information. . . . . . . . . . . . . . . . . . . . . .14
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 23 November 2010 Document identifier: PSMN1R0-30YLC

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