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PL IA NT
Features
Formerly
Applications
Combo voice / xDSL linecards Voice linecards MDF, primary protection modules Process control equipment Test and measurement equipment General electronics
brand Extremely high speed performance Blocks high voltages and currents Very high bandwidth; GHz compatible Small package, minimal PCB area Simple, superior circuit protection RoHS compliant*, UL Recognized
*R oH S
CO M
TBUTM C650 and C850 Protectors
Transient Blocking Units - TBUTM Devices Bourns(R) C650 and C850 series products are high speed bidirectional protection components, constructed using MOSFET semiconductor technology, designed to protect against faults caused by short circuits, AC power cross, induction and lightning surges. The TBUTM high speed protector, triggering as a function of the MOSFET, blocks surges and provides an effective barrier behind which sensitive electronics are not exposed to large voltages or currents during surge events. The TBUTM device is provided in a surface mount DFN package and meets industry standard requirements such as RoHS and Pb Free solder reflow profiles. Absolute Maximum Ratings (Tamb = 25 C)
Symbol Vimp Vrms Top Tstg Parameter Maximum protection voltage for impulse faults with rise time 1 sec Maximum protection voltage for continuous Vrms faults Operating temperature range Storage temperature range C650-xxx-WH C850-xxx-WH C650-xxx-WH C850-xxx-WH Value 650 850 300 425 -40 to +85 -65 to +150 Unit V V C C
Agency Approval UL recognized component File # E315805. Industry Standards Description GR-1089 Telcordia GR-974 ITU-T K.20, K.20E, K.21, K.21E, K.45 Port Type 1, 3, 5 Model C650 C850 C650 C850 C850
Electrical Characteristics (Tamb = 25 C)
Symbol Iop Parameter Maximum current through the device that will not cause current blocking Typical current for the device to go from normal operating state to protected state Cx50-100-WH Cx50-180-WH Cx50-260-WH Cx50-100-WH Cx50-180-WH Cx50-260-WH Cx50-100-WH Cx50-180-WH Cx50-260-WH C650-100-WH C650-180-WH C650-260-WH C850-100-WH C850-180-WH C850-260-WH 12 8 8 17 11 11 150 220 330 200 360 520 14.5 10 10 19 14 14 1 1 14 Min. Typ. Max. 100 180 260 Unit mA
Itrigger
mA
Iout
Maximum current through the device
mA
RTBU
Series resistance of the TBUTM device
tblock Iquiescent Vreset
Maximum time for the device to go from normal operating state to protected state Current through the triggered TBUTM device with 50 Vdc circuit voltage Voltage below which the triggered TBUTM device will transition to normal operating state
s mA V
C650 and C850 TBUTM protectors are bidirectional; specifications are valid in both directions.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TBUTM C650 and C850 Protectors
Typical Performance Characteristics V-I Characteristics
+I
Time to Block vs. Fault Current
1 0.1
Time to Block (sec)
Itrigger
0.01 0.001 0.0001 0.00001 0.000001 0.0000001 0.1 1 10 100 1000
-Vreset +V
Vreset
Fault Current (A )
-Itrigger
Current vs. Temperature
140 120
% of Current
100 80 60 40 20 -40 -20 0 20 40 60 80
Temperature (C)
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TBUTM C650 and C850 Protectors
Operational Characteristics
The graphs below demonstrate the operational characteristics of the TBUTM protector. For each graph the fault voltage, protected side voltage, and current is presented.
TEST CONFIGURATION DIAGRAM
V1
V2
Load
C650 Lightning, 650 V
C850 Lightning, 850 V
3
100 V/div.
3
400 mA/div.
100 V/div.
2
2
1
1
1 s/div. Ch1 V1 Ch2 V2 Ch3 Current
Ch1 V1
1 s/div. Ch2 V2
Ch3 Current
C650 Power Fault, 300 Vrms, 100 A
C850 Power Fault, 425 Vrms, 100 A
3 2
2
3
1
1
200 mA/div.
100 V/div.
4 ms/div. Ch1 V1 Ch2 V2 Ch3 Current
Ch1 V1
4 ms/div. Ch2 V2 Ch3 Current
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
200 mA/div.
100 V/div.
400 mA/div.
TBUTM C650 and C850 Protectors
Product Dimensions
K J B C K E F E J N
Dim. A B
H
Min. 3.90 (.154) 8.15 (.321) 0.80 (.031) 0.000 (.000) 2.55 (.100) 1.10 (.043) 3.45 (.136) 0.20 (.008) 0.65 (.026) 0.20 (.008)
DIMENSIONS:
Typ. 4.00 (.157) 8.25 (.325) 0.85 (.033) 0.025 (.001) 2.60 (.102) 1.15 (.045) 3.50 (.138) 0.25 (.010) 0.70 (.028) 0.25 (.010)
MM (INCHES)
Max. 4.10 (.161) 8.35 (.329) 0.90 (.035) 0.050 (.002) 2.65 (.104) 1.20 (.047) 3.55 (.140) 0.30 (.012) 0.75 (.030) 0.30 (.012)
3
A
2
1
C D
PIN 1
D
N
E F H
TOP VIEW
SIDE VIEW
BOTTOM VIEW
Recommended Pad Layout
0.70 (.028) 2.625 (.103) 1.15 (.045)
Pad Designation Pad # 1 2 Apply In/Out NC In/Out
J K N
3.55 (.140)
3
NC = Solder to PCB; do not make electrical connection, do not connect to ground.
TBUTM protectors have matte-tin termination finish. Suggested layout should use non-solder mask define (NSMD). Recommended stencil thickness is 0.10-0.12 mm (.004-.005 in.) with stencil opening size 0.025 mm (.0010 in.) less than the device pad size. As when heat sinking any power device, it is recommended that, wherever possible, extra PCB copper area is allowed. For minimum parasitic capacitance, do not allow any signal, ground or power signals beneath any of the pads of the device.
Thermal Resistances
Symbol Rth(j-a) Parameter Junction to leads (package) Value 116 Unit C/W
Reflow Profile
Profile Feature Average Ramp-Up Rate (Tsmax to Tp) Preheat - Temperature Min. (Tsmin) - Temperature Max. (Tsmax) - Time (tsmin to tsmax) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5 C of Actual Peak Temp. (tp) Ramp-Down Rate Time 25 C to Peak Temperature Pb-Free Assembly 3 C/sec. max. 150 C 200 C 60-180 sec. 217 C 60-150 sec. 260 C 20-40 sec. 6 C/sec. max. 8 min. max.
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TBUTM C650 and C850 Protectors
How to Order Typical Part Marking
C 650 - 180 - WH
Form Factor C = One TBUTM protector in the device Impulse Voltage Rating 650 = 650 V 850 = 850 V Iop Indicator 100 = 100 mA 180 = 180 mA 260 = 260 mA
PIN 1
MANUFACTURER'S TRADEMARK*
MARKING NUMBER C65A = C650-100-WH C65B = C650-180-WH C65C = C650-260-WH C85A = C850-100-WH C85B = C850-180-WH C85C = C850-260-WH
MANUFACTURING DATE CODE* - 1ST DIGIT INDICATES THE YEAR'S 6-MONTH PERIOD. - 2ND DIGIT INDICATES THE WEEK NUMBER IN THE 6-MONTH PERIOD. - 3RD & 4TH DIGITS INDICATE SPECIFIC LOT FOR THE WEEK. 6-MONTH PERIOD CODES: A = JAN-JUN 2009 C = JAN-JUN 2010 B = JUL-DEC 2009 D = JUL-DEC 2010 E = JAN-JUN 2011 F = JUL-DEC 2011
EXAMPLE: ARBC - 1ST DIGIT `A' = JAN-JUN 2009 - 2ND DIGIT `R' = WEEK 18; WEEK OF APRIL 27 - 3RD & 4TH DIGITS `BC' = LOT SPECIFIC INFORMATION *TRANSITION FROM FULTEC TRADEMARK AND LOT CODE TO BOURNS TRADEMARK AND DATE CODE IN 2009.
Packaging Specifications (per EIA468-B)
P0 E B t TOP COVER TAPE N D C F W D P2
A
B0 K0 A0 P G (MEASURED AT HUB) USER DIRECTION OF FEED CENTER LINES OF CAVITY D1 EMBOSSMENT
QUANTITY: 3000 PIECES PER REEL
Device C650, C850 A0 Min. 4.2 (.165) K0 Min. 1.1 (.043) Max. 1.3 (.051) Max. 4.4 (.173)
A Min. 326 (12.835) Max. 330.25 (13.002) B0 Min. 8.45 (.333) P Min. 7.9 (.311) Max. 8.1 (.319) Min. 3.9 (.159) Max. 8.65 (.341) Min. 1.5 (.059) Min. 1.5 (.059)
B Max. 2.5 (.098) D Max. 1.6 (.063) P0 Max. 4.1 (.161) Min. 1.9 (.075) Min. 1.5 (.059) Min. 12.8 (.504)
C Max. 13.5 (.531) D1 Max. P2 Max. 2.1 (.083) Min. 0.25 (.010) Min. 1.65 (.065) Min. 20.2 (.795)
D Max. E Max. 1.85 (.073) t Max. 0.35 (.014)
G Ref. 16.5 (.650) F Min. 7.4 (.291) W Min. 15.7 (.618)
DIMENSIONS:
N Ref. 102 (4.016)
Device C650, C850 Device C650, C850
max. 7.6 (.299) Max. 16.3 (.642)
MM (INCHES)
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
TBUTM C650 and C850 Protectors
Reference Application The C-series devices are general use protectors used in a wide variety of applications. The following diagram is one common configuration example of C-series device placement. A cost-effective protection solution combines Bourns(R) TBUTM protection devices with a pair of MOVs or Bourns(R) GDTs. The figure below demonstrates the operational characteristics of the circuit.
V2 OVP OVP
Line
V1
TBUTM Device
Equip.
Line TBUTM Device
Common Configuration Diagram
3
2 1
1 ms/div. Ch1 V1 Ch2 V2 Ch3 Current
C850 with G5200AS 4000 V Lightning 10/700 sec, 150 A
Asia-Pacific: Tel: +886-2 2562-4117 * Fax: +886-2 2562-4116 Europe: Tel: +41-41 768 5555 * Fax: +41-41 768 5510 The Americas: Tel: +1-951 781-5500 * Fax: +1-951 781-5700 www.bourns.com
200 mA/div.
REV. 03/10
COPYRIGHT(c)2008, BOURNS, INC. LITHO IN U.S.A. e 11/08 FU0801
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.

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