View VN5016AJ-E_4874325.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

VN5016AJ-E
Single channel high side driver with analog current sense for automotive applications
Features
Max supply voltage Operating voltage range Max On-State resistance (per ch.) Current limitation (typ) Off state supply current
VCC VCC RON ILIMH IS
41V 4.5 to 36V 16 m 65A 2 A
PowerSSO-12
Application
Main features - Inrush current active management by power limitation - Very low stand-by current - 3.0V CMOS compatible input - Optimized electromagnetic emission - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC european directive Diagnostic functions - Proportional load current sense - High current sense precision for wide range currents - Current sense disable - Thermal shutdown indication - Very low current sense leakage Protection - Undervoltage shut-down - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Thermal shut down - Reverse battery protection - Electrostatic discharge protection
All types of resistive, inductive and capacitive loads
Description
The VN5016AJ-E is a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears.
Table 1. Device summary
Package Tube PowerSSO-12 VN5016AJ-E Order codes Tape & Reel VN5016AJTR-E
February 2008
Rev 7
1/32
www.st.com 32
Contents
VN5016AJ-E
Contents
1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 2.2 2.3 2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
3.1.1 3.1.2 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 22 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 23
3.2 3.3 3.4
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 24
4
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 PowerSSO-12TM thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.1 5.2 5.3 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSSO-12TM package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSSO-12TM packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2/32
VN5016AJ-E
List of tables
List of tables
Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 9. Table 8. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC=13V, Tj=25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8V3/32
List of figures
VN5016AJ-E
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Delay response time between rising edge of ouput current and rising edge of current sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 IOUT/ISENSE Vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn - On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn - Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Maximum turn Off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PowerSSO-12TM PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 25 PowerSSO-12TM thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 26 Thermal fitting model of a single channel HSD in PowerSSO-12TM . . . . . . . . . . . . . . . . . 26 PowerSSO-12TM package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSSO-12TM tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-12TM tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4/32
VN5016AJ-E
Block diagram and pin description
1
Block diagram and pin description
Figure 1. Block diagram
VCC
VCC CLAMP
UNDERVOLTAGE PwCLAMP
DRIVER
OUTPUT ILIM VDSLIM
GND LOGIC INPUT PwrLIM OVERTEMP. IOUT CS_DIS
K
CURRENT SENSE
Table 2.
Name VCC
Pin function
Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Analog current sense pin, delivers a current proportional to the load current. Active high CMOS compatible pin, to disable the current sense pin.
OUTPUT GND INPUT CURRENT SENSE CS_DIS
5/32
Block diagram and pin description Figure 2. Configuration diagram (top view)
VN5016AJ-E
TAB = Vcc VCC GND INPUT CURRENT SENSE CS_DIS VCC 1 2 3 4 5 6 12 11 10 9 8 7 OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT
Table 3.
Suggested connections for unused and N.C. pins
Current Sense N.R.(1) Through 1K resistor N.C. X X Output X N.R.(1) Input X Through 10K resistor CS_DIS X Through 10K resistor
Connection / Pin Floating To ground
(1) Not recommended.
6/32
VN5016AJ-E
Electrical specifications
2
Electrical specifications
Figure 3. Current and voltage conventions
IS VCC IOUT OUTPUT VOUT IIN INPUT CURRENT SENSE VIN GND IGND VSENSE ISENSE VF VCC
ICSD VCSD
CS_DIS
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in the "Absolute maximum ratings" tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4.
Symbol VCC -VCC -IGND IOUT -IOUT IIN ICSD DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse DC output current DC input current DC current sense disable input current
Absolute maximum ratings
Parameter Value 41 0.3 200 Internally limited 30 -1 to 10 -1 to 10 200 VCC-41 +VCC 304 Unit V V mA A A mA mA mA V V mJ
-ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage Maximum switching energy (L=0.75mH; RL=0; Vbat=13.5V; Tjstart=150C; IOUT = IlimL(Typ.) )
EMAX
7/32
Electrical specifications Table 4.
Symbol
VN5016AJ-E
Absolute maximum ratings (continued)
Parameter Electrostatic discharge (Human Body Model: R=1.5K; C=100pF) - INPUT - CURRENT SENSE - CS_DIS - OUTPUT - VCC Charge device model (CDM-AEC-Q100-011) Junction operating temperature Storage temperature Value Unit
VESD
4000 2000 4000 5000 5000 750 -40 to 150 -55 to 150
V V V V V V C C
VESD Tj Tstg
2.2
Thermal data
Table 5.
Symbol
Thermal data
Parameter Max value 0.5 See Figure 29 Unit C/W C/W
Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient
8/32
VN5016AJ-E
Electrical specifications
2.3
Electrical characteristics
8VSymbol VCC VUSD VUSDhyst Power section Parameter Operating supply voltage Undervoltage shutdown Undervoltage Shut-down hysteresis On state resistance Clamp voltage IOUT= 5A; Tj= 25C IOUT= 5A; Tj= 150C IOUT= 5A; VCC= 5V; Tj= 25C IS= 20mA Off State; VCC=13V; Tj=25C; VIN=VOUT=VSENSE=VCSD=0V IS Supply current On State; VCC=13V; VIN=5V; IOUT=0A VIN=VOUT=0V; VCC=13V; Tj=25C VIN=VOUT=0V; VCC=13V; Tj=125C IOUT= 6A; Tj= 150C 0 0 1.5 3 mA 41 46 2(1) Test conditions Min. 4.5 Typ. 13 3.5 0.5 16 32 20 52 5(1) Max. 36 4.5 Unit V V V m m m V A
RON Vclamp
0.01
3 A 5 0.7 V
IL(off)
Off state output current
VF
Output - VCC diode voltage
(1) PowerMOS leakage included.
Table 7.
Symbol td(on) td(off)
Switching (VCC=13V, Tj=25C)
Parameter Turn-On delay time Turn-Off delay time Test conditions RL= 2.6 (see Figure 8) RL= 2.6 (see Figure 8) RL= 2.6 (see Figure 8) RL= 2.6 (see Figure 8) RL= 2.6 (see Figure 8) RL= 2.6 (see Figure 8) Min. Typ. 35 50 See Figure 20 See Figure 22 1.1 0.8 Max. Unit s s V/ s V/ s mJ mJ
(dVOUT/dt)on Turn-On voltage slope (dVOUT/dt)off Turn-Off voltage slope WON WOFF Switching energy losses during twon Switching energy losses during twoff
9/32
Electrical specifications Table 8.
Symbol VIL IIL VIH IIH VI(hyst) VICL VCSDL ICSDL VCSDH ICSDH VCSD(hyst) VCSCL
VN5016AJ-E
Logic input
Parameter Input low level voltage Low level input current Input high level voltage High level input current Input hysteresis voltage Input clamp voltage CS_DIS low level voltage Low level CS_DIS current CS_DIS high level voltage High level CS_DIS current CS_DIS hysteresis voltage CS_DIS clamp voltage ICSD=1mA ICSD=-1mA VCSD=2.1V 0.25 5.5 -0.7 7 VCSD=0.9V 1 2.1 10 IIN=1mA IIN=-1mA VIN=2.1V 0.25 5.5 -0.7 0.9 7 VIN=0.9V 1 2.1 10 Test conditions Min. Typ. Max. 0.9 Unit V A V A V V V V A V A V V V
Table 9.
Symbol IlimH IlimL TTSD TR TRS THYST VDEMAG
Protections and diagnostics (1) Parameter DC short circuit current Short circuit current during thermal cycling Shutdown temperature Reset temperature Thermal reset of STATUS Thermal hysteresis (TTSD -TR) Turn-Off output voltage clamp Output voltage drop limitation IOUT=2A; VIN=0; L=6mH IOUT=0.3A; Tj= -40C...+150C (see Figure 9) Test conditions VCC=13V 5V24 175 TRS +5
VON
25
mV
(1) To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
10/32
VN5016AJ-E Table 10.
Symbol
Electrical specifications Current sense (8VParameter Test conditions IOUT=0.25A; VSENSE=0.5V;VCSD=0V; Tj= -40C...150C IOUT=4A; VSENSE=0.5V; VCSD=0V; Tj= -40C...150C IOUT=4A; VSENSE=0.5V; VCSD=0V; Tj= 25C...150C IOUT=4A; VSENSE= 0.5V; VCSD=0V; TJ=-40 C to 150 C IOUT=10A; VSENSE=4V; VCSD=0V; Tj=-40C...150C IOUT=10A; VSENSE=4V; VCSD=0V; Tj=25C...150C IOUT=10A; VSENSE= 4V; VCSD=0V; TJ=-40 C to 150 C IOUT=25A; VSENSE=4V; VCSD=0V; Tj= -40C...150C IOUT=25A; VSENSE=4V; VCSD=0V; Tj= 25C...150C IOUT=25A; VSENSE= 4V; VCSD=0V; TJ=-40 C to 150 C IOUT=0A; VSENSE=0V; VCSD=5V; VIN=0V; Tj=-40C...150C VCSD=0V; VIN=5V; Tj=-40C...150C IOUT=2A; VSENSE=0V; VCSD=5V; VIN=5V; Tj=-40C...150C IOL Openload ON state current detection threshold VIN = 5V, ISENSE= 5 A Min. Typ. Max. Unit
K0
IOUT/ISENSE
2760 5010 7240
K1
IOUT/ISENSE
3510 4560 5690
3770 4560 5350 -8 +8 %
dK1/K1(1)
Current sense ratio drift
K2
IOUT/ISENSE
4180 4570 5060
4250 4570 4890 -4 +4 %
dK2/K2(1)
Current sense ratio drift
K3
IOUT/ISENSE
4360 4500 4700
4380 4500 4620 -3 +3 %
dK3/K3(1)
Current sense ratio drift
0 0
1 2
A A
ISENSE0
Analog sense leakage current
0 10
1 45
A mA
11/32
Electrical specifications Table 10.
Symbol VSENSE
VN5016AJ-E
Current sense (8VParameter Max analog sense output voltage Analog sense output voltage in overtemperature condition Analog sense output current in overtemperature condition Test conditions IOUT=15A; VCSD=0V; Min. 5 Typ. Max. Unit V
VSENSEH
VCC=13V; RSENSE=3.9K
9
V
ISENSEH
VCC=13V; VSENSE=5V
8
mA
Delay response time tDSENSE1H from falling edge of CS_DIS pin Delay response time tDSENSE1L from rising edge of CS_DIS pin Delay response time tDSENSE2H from rising edge of INPUT pin Delay response time between rising edge of tDSENSE2H output current and rising edge of current sense Delay response time tDSENSE2L from falling edge of INPUT pin
VSENSE<4V, 1.5A50
100
s
5
20
s
270
400
s
280
s
100
250
s
(1) Parameter guaranteed by design; it is not tested.
12/32
VN5016AJ-E Figure 4. Current sense delay characteristics
Electrical specifications
INPUT CS_DIS LOAD CURRENT SENSE CURRENT
tDSENSE2H tDSENSE1L tDSENSE1H tDSENSE2L
Figure 5.
Delay response time between rising edge of ouput current and rising edge of current sense (CS enabled)
VIN
tDSENSE2H
t IOUT
IOUTMAX
90% IOUTMAX
t ISENSE
ISENSEMAX
90% ISENSEMAX
t
13/32
Electrical specifications Figure 6. IOUT/ISENSE Vs. IOUT (see Table 10 for details)
VN5016AJ-E
Iout / Isense
6000
max Tj = -40 C to 150 C
5500
5000
max Tj = 25 C to 150 C typical value
4500
min Tj = 25 C to 150 C
4000
3500
min Tj = -40 C to 150 C
3000 4 8 12 16 20 24
IOUT (A)
Figure 7.
Maximum current sense ratio drift vs load current
dk/k(%) 15
10 5 0 -5 -10 -15 4 7 10 13 16 19 22 25
IOUT (A)
Note:
Parameter guaranteed by design; it is not tested.
14/32
VN5016AJ-E Figure 8. Switching characteristics
VOUT
Electrical specifications
tWon
80%
tWoff
90% dVOUT/dt(off)
dVOUT/dt(on) tr 10% tf
t INPUT td(on)
td(off)
t
Figure 9.
Output voltage drop limitation
Vcc-Vout
Tj=150oC Tj=25oC Tj=-40oC
Von Iout
Von/Ron(T)
15/32
Electrical specifications Table 11. Truth table
Conditions Normal operation Overtemperature Undervoltage Short circuit to GND (Rsc 10 m) Short circuit to VCC Negative output voltage clamp Input L H L H L H L H H L H L Output L H L L L L L L L H H L
VN5016AJ-E
Sense (VCSD=0V) (1) 0 Nominal 0 VSENSEH 0 0 0 0 if Tj < TTSD VSENSEH if Tj > TTSD 0 < Nominal 0
(1) If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit.
16/32
VN5016AJ-E Table 12.
ISO 7637-2: 2004(E) Test pulse 1 2a 3a 3b 4 5b (2) ISO 7637-2: 2004(E) Test pulse 1 2a 3a 3b 4 5b (2) III C C C C C C
Electrical specifications Electrical transient requirements
Test levels (1) III -75V +37V -100V +75V -6V +65V IV -100V +50V -150V +100V -7V +87V Number of pulses or test times 5000 pulses 5000 pulses 1h 1h 1 pulse 1 pulse Test level results (1) IV C C C C C C Burst cycle/pulse repetition time 0.5 s 0.2 s 90 ms 90 ms 5s 5s 100 ms 100 ms Delays and Impedance 2 ms, 10 50 s, 2 0.1 s, 50 0.1 s, 50 100 ms, 0.01 400 ms, 2
(1) The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. (2) Valid in case of external load dump clamp: 40V maximum referred to ground.
Class C E
Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
17/32
Electrical specifications Figure 10. Waveforms
NORMAL OPERATION INPUT CS_DIS LOAD CURRENT SENSE CURRENT
VN5016AJ-E
UNDERVOLTAGE VUSDhyst VUSD
VCC INPUT CS_DIS LOAD CURRENT SENSE CURRENT
SHORT TO VCC INPUT CS_DIS LOAD VOLTAGE LOAD CURRENT SENSE CURRENT OVERLOAD OPERATION Tj INPUT CS_DIS LOAD CURRENT SENSE CURRENT ILIMH ILIML VSENSEH
TR TTSD TRS
current power limitation limitation
thermal cycling SHORTED LOAD NORMAL LOAD
18/32
VN5016AJ-E
Electrical specifications
2.4
Electrical characteristics curves
Figure 12. High level input current
Iih (uA)
5 4.5
Figure 11. Off state output current
Iloff (uA)
2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -50 -25 0 25 50 75 100 125 150 175
Off State Vcc= 13V Vin= Vout= 0V
4 3.5 3 2.5 2 1.5 1 0.5 0 -50
Vin= 2.1V
-25
0
25
50
75
100
125
150
175
Tc (C )
Tc (C)
Figure 13. Input clamp voltage
Vicl (V)
7 6.75
Figure 14. Input low level
Vil (V)
4 3.5
I 1mA in=
6.5 6.25 6 5.75 5.5 5.25 5 -50 -25 0 25 50 75 100 125 150 175 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
Figure 15. Input high level
Vih (V)
4 3.5 3
Figure 16. Input hysteresis voltage
Vhyst (V)
1 0.9 0.8 0.7
2.5 2 1.5 1
0.6 0.5 0.4 0.3 0.2
0.5 0 -50 -25 0 25 50 75 100 125 150 175
0.1 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
19/32
Electrical specifications Figure 17. On state resistance vs. Tcase
Ron (mOhm)
50 45 40 35 30 25 20 15 10 10 5 0 -50 -25 0 25 50 75 100 125 150 175 5 0 0 5 10 15 20 25 30 25 20 15
VN5016AJ-E Figure 18. On state resistance vs. VCC
Ron (mOhm)
40 35 30
I out= 5A Vcc= 13V
Tc= 150C Tc= 125C Tc= 25C Tc= -40Cv
35
40
Tc (C )
Vcc (V)
Figure 19. Undervoltage shutdown
Vusd (V)
16 14 12
Figure 20. Turn - On voltage slope
dVout/dt(on) (V/ms)
1000 900 800 700
Vcc= 13V RI 2.6Ohm =
10 8 6 4
600 500 400 300 200
2 0 -50 -25 0 25 50 75 100 125 150 175
100 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
Figure 21. ILIMH vs. Tcase
Ilimh (A)
80 75
Figure 22. Turn - Off voltage slope
(dVout/dt)off (V/ms)
1000 900
Vcc= 13V
70
800 700
Vcc= 13V Rl= 2.6Ohm
65 60 55 50 45 40 -50 -25 0 25 50 75 100 125 150 175
600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C)
20/32
VN5016AJ-E Figure 23. CS_DIS high level voltage
Vcsdh (V)
4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Electrical specifications Figure 24. CS_DIS clamp voltage
Vcsdcl (V)
8 7.5
I csd= 1mA
7 6.5 6 5.5 5 4.5 4 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
Tc (C )
Figure 25. CS_DIS low level voltage
Vcsdl (V)
4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C )
21/32
Application Information
VN5016AJ-E
3
Application Information
Figure 26. Application schematic
+5V
VCC Rprot CS_DIS Dld C Rprot Rprot CURRENT SENSE GND RSENSE Cext VGND RGND DGND INPUT OUTPUT
3.1
3.1.1
GND protection network against reverse battery
Solution 1 : resistor in the ground line (RGND only)
This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. 2. RGND 600mV / (IS(on)max). RGND (- CC) / (-IGND) V
where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND.
22/32
VN5016AJ-E
Application Information
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2
Solution 2 : diode (DGND) in the ground line
A resistor (RGND=1k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift ( 600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 180k . Recommended values: Rprot =10k, CEXT=10nF.
23/32
Application Information
VN5016AJ-E
3.4
Maximum demagnetization energy (VCC = 13.5V)
Figure 27. Maximum turn Off current versus load inductance
100
B C
10
A
I (A) 1 0,1 1 L (mH) 10 100
A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse
VIN, IL Demagnetization Demagnetization Demagnetization
t
Note:
Values are generated with RL=0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
24/32
VN5016AJ-E
Package and PCB thermal data
4
4.1
Package and PCB thermal data
PowerSSO-12TM thermal data
Figure 28. PowerSSO-12TM PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 29. Rthj-amb vs. PCB copper area in open box free air condition
RTHj_amb(C/W)
65 60 55 50 45 40 35 30 0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
25/32
Package and PCB thermal data
VN5016AJ-E
Figure 30. PowerSSO-12TM thermal impedance junction ambient single pulse
100 ZTH (C/W)
2 cm2 Footprint 8 cm2
10
1
0,1 0,0001
0,001
0,01
0,1 Time (s)
1
10
100
1000
Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tP/T Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-12TM (a)
(a )The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
26/32
VN5016AJ-E Table 13. Thermal parameter
Footprint 0.1 0.2 4 8 22 26 0.0001 0.002 0.05 0.2 0.27 3
Package and PCB thermal data
Area/island (cm2) R1 (C/W) R2 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
2
8
8 15 20
7 10 15
0.1 0.8 6
0.1 1 9
27/32
Package information
VN5016AJ-E
5
5.1
Package information
ECOPACK(R) packages
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
PowerSSO-12TM package information
Figure 32. PowerSSO-12TM package dimensions
28/32
VN5016AJ-E Table 14. PowerSSO-12TM mechanical data
Millimeters Symbol Min. A A1 A2 B C D E e H h L k X Y ddd 5.800 0.250 0.400 0 1.900 3.600 1.250 0.000 1.100 0.230 0.190 4.800 3.800 0.800 Typ.
Package information
Max. 1.620 0.100 1.650 0.410 0.250 5.000 4.000
6.200 0.500 1.270 8 2.500 4.200 0.100
29/32
Package information
VN5016AJ-E
5.3
PowerSSO-12TM packing information
Figure 33. PowerSSO-12TM tube shipment (no suffix)
B C
A
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm.
100 2000 532 1.85 6.75 0.6
Figure 34. PowerSSO-12TM tape and reel shipment (suffix "TR")
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing All dimensions are in mm.
End
W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1)
12 4 8 1.5 1.5 5.5 4.5 2
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
30/32
VN5016AJ-E
Revision history
6
Revision history
Table 15.
Date 30-Oct-2004 15-Jan-2005 11-May-2006
Document revision history
Revision 1 2 3 Initial release. Minor text changes. Document changed from Advance Data to maturity. Changes minor formatting. Added Figure 27: Maximum turn Off current versus load inductance. Added new disclaimer. Table 4 : updated EMAX entries. Table 10 : added dk1/k1, dk2/k2, dk3/k3, tDSENSE2H. Added Figure 5. Updated Figure 6. Added Figure 7. Table 12 : updated test level values III and IV for test pulse 5b and notes. Added Section 3.4: Maximum demagnetization energy (VCC = 13.5V). Figure 31: Thermal fitting model of a single channel HSD in PowerSSO-12TM: added notes. Updated Table 10: Current sense (8V02-Feb-2007
4
02-Jul-2007
5
09-Jan-2007
6
12-Feb-2008
7
31/32
VN5016AJ-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
(c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
32/32

▲Up To Search▲

Price & Availability of VN5016AJ-E

	To Download VN5016AJ-E Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .