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DATA SHEET
PESDxS2UAT series Double ESD protection diodes in SOT23 package
Product data sheet 2004 Feb 18
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
FEATURES * Unidirectional ESD protection of up to two lines * Common-cathode configuration * Max. peak pulse power: Ppp = 330 W at tp = 8/20 s * Low clamping voltage: V(CL)R = 20 V at Ipp = 18 A * Ultra-low reverse leakage current: IRM < 700 nA * ESD protection > 30 kV * IEC 61000-4-2; level 4 (ESD) * IEC 61000-4-5 (surge); Ipp = 18 A at tp = 8/20 s. PINNING APPLICATIONS * Computers and peripherals * Communication systems * Audio and video equipment * Data lines * CAN bus protection. DESCRIPTION Unidirectional double ESD protection diodes in common cathode configuration in the SOT23 plastic package. Designed to protect up to two transmission or data lines against damage from ElectroStatic Discharge (ESD) and other transients. MARKING TYPE NUMBER PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT Note 1. * = p : made in Hong Kong. * = t : made in Malaysia. * = W : made in China. MARKING CODE(1) *7A *7B *7C *7D *7E
1
PESDxS2UAT series
QUICK REFERENCE DATA SYMBOL VRWM Cd PARAMETER reverse stand-off voltage diode capacitance VR = 0 V; f = 1 MHz number of protected lines VALUE 3.3, 5, 12, 15 and 24 UNIT V
207, 152, 38, 32 pF and 23 2
PIN 1 2 3 anode 1 anode 2
DESCRIPTION
common cathode
3
1 3 2
2
001aaa401
sym002
Fig.1 Simplified outline (SOT23) and symbol.
2004 Feb 18
2
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL Ppp PARAMETER peak pulse power PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT Ipp peak pulse current PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT Tj Tamb Tstg Notes 1. Non-repetitive current pulse 8/20 s exponential decay waveform; see Fig.2. 2. Measured across either pins 1 and 3 or pins 2 and 3. junction temperature operating ambient temperature storage temperature 8/20 s pulse; notes 1 and 2 CONDITIONS 8/20 s pulse; notes 1 and 2 - DESCRIPTION plastic surface mounted package; 3 leads
PESDxS2UAT series
VERSION SOT23
MIN. - - - - - - - - - - - -65 -65
MAX. 330 260 180 160 160 18 15 5 5 3 150 +150 +150
UNIT W W W W W A A A A A C C C
2004 Feb 18
3
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
ESD maximum ratings SYMBOL ESD PARAMETER electrostatic discharge CONDITIONS
PESDxS2UAT series
VALUE
UNIT
IEC 61000-4-2 (contact discharge); notes 1 and 2 PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT HBM MIL-Std 883 PESDxS2UAT-series 10 kV 30 30 30 30 23 kV kV kV kV kV
Notes 1. Device stressed with ten non-repetitive ESD pulses; see Fig.3. 2. Measured from pin 1, 2, 3, 4, 5 or 8 to pin 6 or 7. ESD standards compliance ESD STANDARD IEC 61000-4-2; level 4 (ESD); see Fig.3 HBM MIL-Std 883; class 3 > 4 kV CONDITIONS > 15 kV (air); > 8 kV (contact)
001aaa191
handbook, halfpage
120
MLE218
Ipp 100 % 90 %
Ipp (%)
100 % Ipp; 8 s
80
e-t 50 % Ipp; 20 s
40
10 %
0 0 10 20 30 t (s) 40
tr = 0.7 to 1 ns 30 ns 60 ns
t
Fig.2
8/20 s pulse waveform according to IEC 61000-4-5.
Fig.3
ElectroStatic Discharge (ESD) pulse waveform according to IEC 61000-4-2.
2004 Feb 18
4
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
ELECTRICAL CHARACTERISTICS Tj = 25 C; unless otherwise specified. SYMBOL VRWM PARAMETER reverse stand-off voltage PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT IRM reverse leakage current PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT VBR breakdown voltage PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT Cd diode capacitance PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT V(CL)R clamping voltage PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT notes 1 and 2 Ipp = 1 A Ipp = 18 A Ipp = 1 A Ipp = 15 A Ipp = 1 A Ipp = 5 A Ipp = 1 A Ipp = 5 A Ipp = 1 A Ipp = 3 A - - - - - - - - - - f = 1 MHz; VR = 0 V - - - - - VRWM = 3.3 V VRWM = 5 V VRWM = 12 V VRWM = 15 V VRWM = 24 V IZ = 5 mA 5.2 6.4 14.7 17.6 26.5 - - - - - - - - - - CONDITIONS
PESDxS2UAT series
MIN. - - - - -
TYP.
MAX. 3.3 5 12 15 24 2 1 50 50 50 6.0 7.2 15.3 18.4 27.5 300 200 75 70 50 7 20 9 20 19 35 23 40 36 70
UNIT V V V V V A A nA nA nA V V V V V pF pF pF pF pF V V V V V V V V V V
0.7 0.1 <1 <1 <1 5.6 6.8 15.0 18.0 27.0 207 152 38 32 23 - - - - - - - - - -
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
SYMBOL Rdiff PARAMETER differential resistance PESD3V3S2UAT PESD5V0S2UAT PESD12VS2UAT PESD15VS2UAT PESD24VS2UAT Notes 1. Non-repetitive current pulse 8/20 s exponential decay waveform; see Fig.2. 2. Measured either across pins 1 and 3 or pins 2 and 3. GRAPHICAL DATA IR = 1 mA IR = 1 mA IR = 1 mA IR = 1 mA IR = 0.5 mA - - - - - CONDITIONS
PESDxS2UAT series
MIN. - - - - -
TYP.
MAX. 400 80 200 225 300
UNIT
104 Ppp (W) 103
001aaa147
1.2 PPP PPP(25C) 0.8
001aaa193
(1)
102
(2)
0.4
10 1 10
102
103 tp (s)
104
0 0 50 100 150 Tj (C) 200
(1) PESD3V3S2UAT and PESD5V0S2UAT. (2) PESD12VS2UAT, PESD15VS2UAT, PESD24VS2UAT Tamb = 25 C. tp = 8/20 s exponential decay waveform; see Fig.2.
Fig.5 Fig.4 Peak pulse power dissipation as a function of pulse time; typical values.
Relative variation of peak pulse power as a function of junction temperature; typical values.
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
PESDxS2UAT series
240 Cd (pF) 200
001aaa148
50 Cd (pF) 40
001aaa149
160
(1)
30
120
(2)
20
(1) (2)
80
10
(3)
40 0 1 2 3 4 VR (V) 5
0 0 5 10 15 20 VR (V) 25
(1) PESD3V3S2UAT; VRWM = 3.3 V. (2) PESD5V0S2UAT; VRWM = 5 V. Tamb = 25 C; f = 1 MHz.
(1) PESD12VS2UAT; VRWM = 12 V. (2) PESD15VS2UAT; VRWM = 15 V. (3) PESD24VS2UAT; VRWM = 24 V. Tamb = 25 C; f = 1 MHz.
Fig.6
Diode capacitance as a function of reverse voltage; typical values.
Fig.7
Diode capacitance as a function of reverse voltage; typical values.
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
PESDxS2UAT series
10
001aaa270
IR IR(25C)
(1)
1
10-1 -100
-50
0
50
100 Tj (C)
150
(1) PESD3V3S2UAT; VRWM = 3.3 V. PESD5V0S2UAT; VRWM = 5 V. IR is less than 10 nA at 150 C for: PESD12V52UAT; VRWM = 12 V. PESD15VS2UAT; VRWM = 15 V. PESD24VS2UAT; VRWM = 24 V.
Fig.8
Relative variation of reverse leakage current as a function of junction temperature; typical values.
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
PESDxS2UAT series
ESD TESTER RZ
450
RG 223/U 50 coax
10x ATTENUATOR
4 GHz DIGITAL OSCILLOSCOPE
CZ note 1
50
Note 1: IEC61000-4-2 network CZ = 150 pF; RZ = 330
D.U.T.: PESDxS2UAT
vertical scale = 200 V/div horizontal scale = 50 ns/div
vertical scale = 20 V/div horizontal scale = 50 ns/div PESD24VS2UAT GND PESD15VS2UAT
GND
GND
PESD12VS2UAT
GND GND GND unclamped +1 kV ESD voltage waveform (IEC61000-4-2 network)
PESD5V0S2L
PESD3V3S2UAT clamped +1 kV ESD voltage waveform (IEC61000-4-2 network)
GND
GND
vertical scale = 200 V/div horizontal scale = 50 ns/div unclamped -1 kV ESD voltage waveform (IEC61000-4-2 network)
vertical scale = 10 V/div horizontal scale = 50 ns/div clamped -1 kV ESD voltage waveform (IEC61000-4-2 network)
001aaa151
Fig.9 ESD clamping test set-up and waveforms.
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
APPLICATION INFORMATION
PESDxS2UAT series
The PESDxS2UAT series can protect up to two lines against damage caused by unidirectional ElectroStatic Discharge (ESD) and surge pulses. The PESDxS2UAT series can protect lines whose signal polarities are below ground. PESDxS2UAT series provide a surge capability of up to 330 Watts peak pulse power per line for a 8/20 s waveform.
line 1 to be protected line 2 to be protected
line 1 to be protected
PESDxS2UAT ground
PESDxS2UAT ground
unidirectional protection of two lines
bidirectional protection of one line
001aaa179
Fig.10 Typical application: ESD protection of data lines.
Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the PESDxS2UAT as close as possible to the input terminal or connector. 2. Minimize the path length between the PESDxS2UAT and the protected line. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all printed-circuit board conductive loops including power and ground loops. 6. Minimize the length of transient return paths to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. 9. Use vias for multi-layer printed-circuit boards.
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
PACKAGE OUTLINE
Plastic surface-mounted package; 3 leads
PESDxS2UAT series
SOT23
D
B
E
A
X
HE
vMA
3
Q A A1
1
e1 e bp
2
wMB detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1
OUTLINE VERSION SOT23
REFERENCES IEC JEDEC TO-236AB JEITA
EUROPEAN PROJECTION
ISSUE DATE 04-11-04 06-03-16
2004 Feb 18
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NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23 package
DATA SHEET STATUS DOCUMENT STATUS(1) Objective data sheet Preliminary data sheet Product data sheet Notes PRODUCT STATUS(2) Development Qualification Production
PESDxS2UAT series
DEFINITION This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. DISCLAIMERS General Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions 2004 Feb 18 12 above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.
NXP Semiconductors
Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version.
Contact information For additional information please visit: http://www.nxp.com For sales offices addresses send e-mail to: salesaddresses@nxp.com
(c) NXP B.V. 2009 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R76/01/pp13 Date of release: 2004 Feb 18 Document order number: 9397 750 12247

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