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| FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation January 2009 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation Features Power-Off Isolation (VCC=0V) 0.8 Maximum On Resistance (RON) for 4.5V VCC 0.25 Maximum RON Flatness for 4.5V VCC Broad VCC Operating Range: 1.65V to 5.5V Fast Turn-On and Turn-Off Times Control Input Switching Thresholds Independent of VCC Break-Before-Make Enable Circuitry 0.4mm WLCSP Packaging ESD Performance Description The FSA839 is a high-performance Single-Pole / Double-Throw (SPDT) analog switch for audio applications driven by low-voltage (1.8V) baseband processors or ASICs. The device features ultra-low RON of 0.8 (maximum) at 4.5V VCC and operates over the wide VCC range of 1.65V to 5.5V. The device is fabricated with sub-micron CMOS technology to achieve fast switching speeds and is designed for break-before-make operation. The FSA839 interfaces between the low-voltage ASIC and regular audio amplifiers and CODECs operating up to a 5.5V supply range. The control circuitry allows for 1.8V (typical) signals on the control pin (Sel). - HBM per JESD22-A114, I/O to GND: CDM per JESD22-C101: IEC61000-4-2 Contact / Air: 8kV 500V IMPORTANT NOTE: For additional performance information, please contact analogswitch@fairchildsemi.com. 8kV / 15kV Applications Cellular Phone Portable Media Player PDA Ordering Information Part Number FSA839UCX Operating Top Mark Temperature Range -40C to +85C N3 Eco Status Green Package 6-Ball WLCSP, 0.4mm Pitch Packing Method Tape and Reel For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Figure 1. Analog Symbol (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation Marking Information N3KK XYZ KK X Y Z = = = = Lot Run Code Year Work Week Assembly Site Figure 2. Top Mark with Pin 1 Orientation Ball Configuration Figure 3. Pin Assignments (Bottom View) Ball Definitions Ball A1 B1 C1 C2 B2 A2 Name B1 GND B0 VCC A Sel Description Data Port (Normally Open) Ground Data Ports (Normally Closed) Supply Voltage Common Data Port Control Input Truth Table Control Input (Sel) LOW HIGH Function B0 connected to A B1 connected to A (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 2 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VSW VIN IIK ISW ISWPEAK PD TSTG TJ TL Supply Voltage Switch Voltage(1) Input Voltage(1) Input Diode Current Switch Current (Continuous) Peak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle) Power Dissipation at 85C Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 10 Seconds) Human Body Model (JEDEC: JESD22-A114) ESD Charged Device Model (JEDEC: JESD22-C101) Machine Model (JEDEC: JESD22-A115) IEC6100-4-2 Discharge System Test Performed on Fairchild's FSA859 Applications Testing Board Contact Air I/O to GND: A All Pins -65 Parameter Min. -0.5 -0.5 -0.5 Max. 6.5 VCC + 0.5 6.5 -50 200 400 180 +150 +150 +260 8 2 500 100 8 15 Unit V V V mA mA mA mW C C C kV V V kV Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC SEL VSW TA JA Supply Voltage Control Input Voltage Switch Input Voltage Operating Temperature Thermal Resistance, Still Air Parameter Min. 1.65 0 0 -40 Max. 5.50 1.95 VCC +85 350 Unit V V V C C/W (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 3 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation DC Electrical Characteristics All typical values are at 25C unless otherwise specified. Symbol VIH VIL IIN Parameter Input Voltage High Input Voltage Low Control Input Leakage VCC (V) 1.65 to 5.50 1.65 to 5.50 Conditions TA=+25C Min. Typ. Max. TA=-40 to +85C Min. 1.0 0.57 Max. Unit V V nA 1.95 to 5.50 VSel=0 5.50 3.60 2.70 1.95 5.50 3.60 2.70 1.95 5.50 3.60 A=1V, 4.5V B0 or B1=4.5, 1V A=1V, 3.0V B0 or B1=3.0, 1V A=0.5V, 2.3V B0 or B1=2.3, 0.5V A=0.3V, 1.65V B0 or B1=1.65 ,0.3 V A=Floating B0 or B1=4.5, 1V A=Floating B0 or B1=3.0, 1V A=Floating B0 or B1=2.3, 0.5V A=Floating B0 or B1=1.65, 0.3V A=1V, 4.5V; B0 or B1=1V, 4.5V, or Floating A=1V, 3.0VB0 or B1=1V, 3.0V, or Floating A=0.5V, 2.3V, B0 or B1=0.5V, 2.3V, or Floating A=0.3V, 1.65V; B0 or B1=0.3V, 1.65V, or Floating A=0 to 5.5V B0 or B1=0 to 5.5V -2 -10 -10 -10 -5 -20 -10 -10 -5 -20 -10 2 10 10 10 5 20 10 10 5 20 10 -20 -50 -50 -50 -20 -100 -20 -20 -20 -100 -20 20 50 50 INO(0FF), INC(OFF), Off-Leakage Current of Port B0 and B1(5) nA 50 20 100 20 nA 20 20 100 20 nA INO(On), INC(On) On-Leakage Current of Port B0 and B1(5) IA(ON) On Leakage Current of Port A(5) 2.70 -10 10 -20 20 1.95 Power Off Leakage Current of Port A & Port B(5) Sel Internal PullDown Resistor -5 5 -20 20 IOFF 0 -1.00 0.01 1.00 -5.00 5.00 A RPD 1.65 to 1.95 5.50 3.60 2.70 1.95 VIN, VSEL =0 or VCC, IOUT=0 VIN, VSEL =0 or VCC, IOUT=0 VIN, VSEL =0 or VCC, IOUT=0 VIN, VSEL =0 or VCC, IOUT=0 2.0 100 75 50 25 500 300 M ICC Quiescent Supply Current nA 250 150 Continued on the following page... (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 4 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation DC Electrical Characteristics (Continued) All typical values are at 25C unless otherwise specified. Symbol Parameter VCC (V) 5.50 ICCT Increase in ICC per Control Input 3.60 2.70 1.95 ICCZ Supply Current Sleep 5.50 4.50 3.00 2.25 1.65 4.50 On Resistance Matching Between Channels(3,5) 3.00 2.25 1.65 4.50 3.00 2.25 1.65 Conditions VSel = 1.8V VSel = 1.8V VSel = 1.8V VSel = 1.8V VIN, VSel = Floating IOUT=-100mA, B0 or B1=2.5V IOUT=-100mA, B0 or B1=2.0V IOUT=-100mA, B0 or B1=1.8V IOUT=-100mA, B0 or B1=1.2V IOUT=-100mA, B0 or B1=2.5V IOUT=-100mA, B0 or B1=2.0V IOUT=-100mA, B0 or B1=1.8V IOUT=-100mA, B0 or B1=1.2V IOUT=-100mA, B0 or B1=1.0V, 1.5V, 2.5V IOUT=-100mA, B0 or B1=0.8V, 2.0V IOUT=-100mA, B0 or B1=0.8V, 1.8V IOUT=-100mA, B0 or B1=0.6V, 1.2V TA=+25C Min. Typ. 26 5 1 0.01 TA=-40 to +85C Max. 40 15 5 1.00 0.5 Min. Max. 50 20 10 3.00 1.0 0.80 1.20 Unit A A 0.50 0.75 1.0 2.5 0.05 0.10 0.15 0.15 0.075 0.1 0.25 3.5 0.75 0.90 1.3 5.0 0.10 0.15 0.20 0.40 0.250 0.3 0.50 RON Switch On Resistance(2,5) 1.6 7.0 0.10 0.15 0.20 0.40 0.250 0.3 0.60 RON RFLAT(ON) On Resistance Flatness(4,5) Notes: 2. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 3. RON=RON maximum - RON minimum; measured at identical VCC, temperature, and voltage. 4. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. 5. Guaranteed by characterization, not production tested for VCC=1.65 - 1.95V. (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 5 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation AC Electrical Characteristics All typical value are at VCC=1.8V, 2.5V, 3.0V, and 5.0V at 25C unless otherwise specified. Symbol Parameter VCC (V) 4.50 to 5.50 tON Turn-On Time(6) 3.00 to 3.60 2.30 to 2.70 1.65 to 1.95 4.50 to 5.50 3.00 to 3.60 tOFF Turn-Off Time(6) 2.30 to 2.70 1.65 to 1.95 4.50 to 5.50 tBBM Break-BeforeMake Time(7) 3.00 to 3.60 2.30 to 2.70 1.65 to 1.95 5.50 Q Charge Injection 3.30 2.50 1.65 OIRR Xtalk Off Isolation Crosstalk 1.8 to 5.0 1.8 to 5.0 5.50 BW -3db Bandwidth 3.30 2.50 1.65 THD PSRR Total Harmonic Distortion Power Supply Rejection Ratio 1.80 5.00 3.3 RL=600, VIN=0.5VPP, f=20Hz to 20kHz f=217Hz on VCC at 500mvpp RL=50 f=1MHz, RL=50 f=1MHz, RL=50 CL=1.0nF, VGEN=0V, RGEN=0 B0 or B1=VCC/2, RL=50, CL=35pF B0 or B1=VCC, RL=50, CL=35pF B0 or B1=VCC, RL=50, CL=35pF TA=+25C TA=-40 to +85C Conditions Min. 1.0 5.0 5.0 10.0 1.0 1.0 2.0 2.0 1.0 1.0 1.0 Typ. 12.0 15.0 20.0 50.0 9.5 9.0 10.0 28.0 10.0 14.0 21.0 35.0 70 40 30 10 -55 55 60 60 55 50 .02 .001 -23 Max. 25.0 30.0 35.0 70.0 20.0 20.0 20.0 40.0 12.0 16.0 25.0 Min. 1.0 3.0 5.0 10.0 1.0 1.0 2.0 2.0 0.1 1.0 1.0 2.0 Max. 30.0 35.0 40.0 75.0 25.0 25.0 25.0 50.0 14.0 17.0 27.0 50.0 Unit Figure ns Figure 4 ns Figure 4 ns Figure 5 pC Figure 7 dB dB Figure 6 Figure 6 MHz Figure 9 % dB Figure 10 Figure 11 Notes: 6. Guaranteed by characterization, not production tested for VCC=1.65 - 1.95V. 7. Guaranteed by characterization, not production tested. Capacitance Symbol CIN COFF CON Parameter Control Pin Input Capacitance B Port Off Capacitance A Port On Capacitance VCC (V) 0 1.65 to 5.50 1.65 to 5.50 Conditions f=1MHz f=1MHz f=1MHz TA=+25C Min. Typ. 3.2 50 150 Max. Unit pF pF pF (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 6 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation Test Diagrams VCC VBn B0 or B1 A RL 50 Control Input VCC 0V 50% tR = tF = 2.5ns VOUT CL 35pF Switch Output VOUT 0V tON 0.9 x VOUT S GND tOFF 0.9 x VOUT CL includes fixture and stray capacitance. Logic input waveforms inverted for switches that have the opposite logic sense. Figure 4. Turn On / Off Timing VCC B0 B1 S Control Input GND VBn A RL 50 VOUT CL 35pF Control VCC Input 0V 50% tR = tF = 2.5ns VOUT TD 0.9 x VOUT CL includes fixture and stray capacitance. Figure 5. Break-Before-Make Timing VCC 10nF Network Analyzer 0 or VCC S BO 50 GND B1 VCC A VIN 50 50 ON-LOSS = 20log OFF-ISOLATION = 20log VOUT VIN VOUT VIN VOUT VIN VOUT MEAS 50 REF 50 CROSSTALK = 20log Figure 6. Off Isolation and Crosstalk (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 7 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation Test Diagrams (Continued) VCC RGEN VGEN B0 or B1 S A CL VOUT VOUT VOUT In Off Off On On Q = VOUT * CL Off Off GND Control Input In Figure 7. Charge Injection 10nF VCC A S Capacitance Meter f = 1MHz B0 or B1 GND 0V or VCC Figure 8. On / Off Capacitance Measurement Setup VCC 10nF VIN Signal Generator 0dBm BN VIN Analyzer RL S Logic Input 0V or VCC Logic Input 0V or VCC Signal Generator 0dBm BN 10nF VCC A A Analyzer RL S GND GND Figure 9. Bandwidth Figure 10. Harmonic Distortion Network Analyzer VCC RS RT GND VideoIn V IN VS GND CL GND RT GND V OUT Figure 11. PSRR (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 8 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation Physical Dimensions F BALL A1 INDEX AREA 0.03 C E A B 0.40 SOLDER MASK OPENING A1 (O0.20) Cu Pad 2X D F 0.03 C (R0.15) 0.40 (1.10) (0.70) 2X TOP VIEW RECOMMENDED LAND PATTERN (NSMD) 0.06 C 0.05 C 0.625 0.547 0.3780.018 E 0.2080.021 C SEATING PLANE D SIDE VIEWS NOTES: O0.2600.010 0.40 A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASMEY14.5M, 1994. D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS 39 MICRONS (547-625 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. BALL COMPOSITION: Sn95.5-Ag3.9-Cu0.6. H. DRAWING FILENAME: UC006ACrev2. 6X 0.005 C B A 12 (X) +/-0.018 CAB 0.40 (Y) +/-0.018 F BOTTOM VIEW Figure 12. 6-Ball, WLCSP 0.4mm Pitch Table 1. Product Specific Dimensions Product FSA839UCX D 1.160 E 0.760 X 0.180 Y 0.180 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 9 FSA839 -- Low-Voltage, 0.8 SPDT Analog Switch with Power-Off Isolation (c) 2008 Fairchild Semiconductor Corporation FSA839 * Rev. 1.0.0 www.fairchildsemi.com 10 |
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