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Target Data Sheet, August 2009
Control integrated Power System (CIPOSTM)
IKCS12F60EA
http://www.infineon.com/cipos
Power Management & Drives
Never
stop
thinking.
CIPOSTM IKCS12F60EA
Revision History: Previous Version: Page 1, 17
2009-08 0.1 Subjects (major changes since last revision) revised types
Rev. 0.2
Authors: W. Frank Edition 2008-09 Published by Infineon Technologies AG 85579 Neubiberg, Germany (c) Infineon Technologies AG 8/3/09. All Rights Reserved. Attention please! The information given in this data sheet shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office or representatives (http://www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office or representatives. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TrenchStop(R) is a registered trademark of Infineon Technologies AG. CIPOSTM, CoolMOSTM, CoolSETTM, DuoPackTM and thinQ!TM are trademarks of Infineon Technologies AG.
Target Data Sheet
2/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
Table of Contents
CIPOSTM Control integrated Power System..................................................................................................4 Features........................................................................................................................................................4 Target Applications .....................................................................................................................................4 Description...................................................................................................................................................4 System Configuration .................................................................................................................................4 Internal Electrical Schematic...........................................................................................................................5 Pin Assignment.................................................................................................................................................6 Pin Description ............................................................................................................................................6 /HIN1,2,3 and /LIN1,2,3 (Low side and high side control pins, Pin 15 - 20) .............................................. 6 ITRIP (Over-current detection function, Pin 21) ......................................................................................... 7 VDD, VSS (control side supply and reference, Pin 22, 23)........................................................................ 7 VB1,2,3 and VS1,2,3 (High side supplies, Pin 1, 2, 4, 5, 7, 8)................................................................... 7 VRU, VRV, VRW (low side emitter, Pin 12,13,14) ..................................................................................... 7 V+ (positive bus input voltage, Pin 10)....................................................................................................... 7 Absolute Maximum Ratings ............................................................................................................................8 Module Section ............................................................................................................................................8 IGBT and Diode Section .............................................................................................................................8 Control Section............................................................................................................................................9 Recommended Operation Conditions............................................................................................................9 Static Parameters ...........................................................................................................................................10 Dynamic Parameters ......................................................................................................................................11 Integrated Components .................................................................................................................................12 Circuit of a Typical Application.....................................................................................................................12 Characteristics................................................................................................................................................13 Test Circuits and Parameter Definition ........................................................................................................15 Package Outline IKCS12F60EA.....................................................................................................................17 Package Outline IKCS12F60EC....................................................................Fehler! Textmarke nicht definiert.
Target Data Sheet
3/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
CIPOSTM Control integrated Power System
Single In-Line Intelligent Power Module 3-bridge 600V / 12A @ 25C
Features
* * * * * * * * * * * * Fully isolated Single In-Line molded module TrenchStop(R) IGBTs with lowest VCE(sat) Optimal adapted diodes for low EMI Integrated bootstrap diode and capacitor Rugged SOI gate driver technology with stability against transient and negative voltage Overcurrent shutdown Undervoltage lockout at all channels Matched propagation delay for all channels Low side emitter pins accessible for all phase current monitoring (open emitter) Cross-conduction prevention Lead-free terminal plating; RoHS compliant Qualified according to JEDEC1 (high temperature stress tests for 500h) for target applications The CIPOSTM module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. This SIL-IPM is designed to control AC motors in variable speed drives for applications like air conditioning, compressors and washing machines. The package concept is specially adapted to power applications, which need extremely good thermal conduction and electrical isolation, but also EMI-save control and overload protection. The features of Infineon TrenchStop(R) IGBTs and EmConTM diodes are combined with a new optimized Infineon SOI gate driver for excellent electrical performance.
System Configuration
* 3 halfbridges with TrenchStop(R) IGBT & freewheeling diodes * 3 SOI gate driver * Bootstrap diodes for high side supply * Integrated 100nF bootstrap capacitance * passive components for adaptions * Isolated heatsink * Creepage distance typ. 3.2mm
Target Applications
* Washing machines * Consumer Fans and Consumer Compressors
Certification
UL 1577 (UL file E314539)
Description
1
J-STD-020 and JESD-022 4/17 Rev. 0.2, Aug. 2009
Target Data Sheet
CIPOSTM IKCS12F60EA
Internal Electrical Schematic
V+ (10)
Tr1, U-HS D1 Tr3, V-HS D3 Tr5, W-HS D5
Tr2, U-LS D2
Tr4, V-LS D4
Tr6, W-LS D6
VRU (12) VRV (13) VRW (14) U, VS1 (8) V, VS2 (5) W, VS3 (2)
RH1 RL1 RH2 RL2 RH3 RL3
VB3 (1) VB2 (4) VB1 (7)
CbsH1 Dbs1Dbs3 CbsH2 CbsH3
Rbs
VDD (22) /HIN1 (15) /HIN2 (16) /HIN3 (17) /LIN1 (18) /LIN2 (19) /LIN3 (20) ITRIP (21)
VCC /HIN1 /HIN2 /HIN3 /LIN1 /LIN2 /LIN3
Driver-IC
R
For integrated components see Table
C2
C1
VSS (23)
Figure 1: Internal Schematic
Target Data Sheet
5/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
Pin Assignment
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Pin Name VB3 W,VS3 n.a. VB2 V,VS2 n.a. VB1 U,VS1 n.a. V+ n.a. VRU VRV VRW /HIN1 /HIN2 /HIN3 /LIN1 /LIN2 /LIN3 ITRIP VDD VSS Pin Description high side floating IC supply voltage motor output W, high side floating IC supply offset voltage None high side floating IC supply voltage motor output V, high side floating IC supply offset voltage None high side floating IC supply voltage motor output U, high side floating IC supply offset voltage None positive bus input voltage None low side emitter low side emitter low side emitter input gate driver high side 1/U input gate driver high side 2/V input gate driver high side 3/W input gate driver low side 1/U input gate driver low side 2/V input gate driver low side 3/W input overcurrent shutdown module control supply module negative supply
Pin Description
/HIN1,2,3 and /LIN1,2,3 (Low side and high side control pins, Pin 15 - 20) These pins are active low and they are responsible for the control of the integrated IGBT The Schmitt-trigger input threshold of them are
down to 3.3V controller outputs. Pull-up resistor of about 75 kOhm is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. It is recommended for proper work of CiPoSTM not to provide input pulse-width lower than 1us. The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). A minimum deadtime insertion of typ 380ns is also provided, in order to reduce cross-conduction of the external power switches.
Figure 2: Input pin structure such to guarantee LSTTL and CMOS compatibility Target Data Sheet 6/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
ITRIP (Over-current detection function, Pin 21) CiPoSTM provides an over-current detection function by connecting the ITRIP input with the motor current feedback. The ITRIP comparator threshold (typ 0.46V) is referenced to VSS ground. A input noise filter prevents the driver to detect false over-current events. Over-current detection generates a hard shut down of all outputs of the gate driver after the shutdown propagation delay of typically 900ns. The fault-clear time is set to typically to 4.7 ms. VDD, VSS (control side supply and reference, Pin 22, 23) VDD is the low side supply and it provides power both to input logic and to low side output power stage. Input logic is referenced to VSS ground as well as the under-voltage detection circuit. The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.1 V is at least present. The IC shuts down all the gate drivers power outputs, when the VCC supply voltage is below VDDUV- = 10.4 V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. VB1,2,3 and VS1,2,3 (High side supplies, Pin 1, 2, 4, 5, 7, 8) VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device emitter/source voltage. Due to the low power consumption, the floating driver stage is supplied by an integrated bootstrap
circuit connected to VDD. This includes also integrated bootstrap capacitors of 100 nF at each floating supply, which are located very close to the gate drive circuit. The under-voltage detection operates with a rising supply threshold of typical VBSUV+ = 12.1 V and a falling threshold of VDDUV- = 10.4 V according to Figure 3. VS1,2,3 provide a high robustness against negative voltage in respect of VSS of -50 V. This ensures very stable designs even under rough conditions. VRU, VRV, VRW (low side emitter, Pin
Figure 3: Input filter timing diagram 12,13,14) The low side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. V+ (positive bus input voltage, Pin 10) The high side IGBT are connected to the bus voltage. It is recommended, that the bus voltage does not exceed 500 V.
Target Data Sheet
7/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
Absolute Maximum Ratings
(Tc = 25C, VDD = 15V, if not stated otherwise) Module Section Description Condition Symbol Min Storage temperature range Operating temperature control PCB Solder temperature Insulation test voltage Mounting torque Mounting pressure on surface Creepage distance External bootstrap capacitor single capacitor charging, VDD = 15V
Wave soldering, 1.6mm (0.063in.) from case for 10s
Value max 125 125 260 -40 -
Unit C C C
Tstg TPCB Tsol
RMS, f=50Hz, t =1min
VISOL
2500 3.1
0.6 150 19
V Nm N/mm mm F
M3 screw and washer MS Package flat on mounting surface NMC dS Cbs,ext
IGBT and Diode Section Description Condition Symbol min Max. blocking voltage DC output current Repetitive peak collector current Short circuit withstand time1 (SCSOA) IGBT reverse bias safe operating area (RBSOA) Power dissipation per IGBT Operating junction temperature range VIN=5V, IC=0.25mA Tc = 25C,TvJ < 150C Tc = 80C,TvJ < 150C tp limited by TvJmax VDC 400V, TvJ 150C VDC 500V, TvJ = 150C, IC = 6A VCEmax = 600V Tc = 25C IGBT Diode Ptot TvjI TvjD VCES Iu, Iv, Iw Iu, Iv, Iw tsc 600 -12 -6 -18 Value max 12 6 18 5 V A A s Unit
Full Square -40 -40 35 150 150 W C
1
Allowed number of short circuits: <1000; time between short circuits: >1s. 8/17 Rev. 0.2, Aug. 2009
Target Data Sheet
CIPOSTM IKCS12F60EA
Description
Condition
Symbol min
Value typ max 3.0 4.2
Unit
Single IGBT thermal resistance, junction-case Single diode thermal resistance, junction-case Control Section Description Module supply voltage High side floating supply voltage (VB vs. VS) High side floating IC supply offset voltage Input voltage Operating junction temperature1 Max. switching frequency tp < 500ns LIN, HIN, ITRIP Condition
RthJC RthJCD
-
K/W
Symbol VDD VBS VS1,2,3 Vin TJ,IC fPWM -1 -1
Value min max 20 20 600 10 125 20
Unit V V V V C kHz
VDD-VBS-6 VDD-VBS-50 -1 -
Recommended Operation Conditions
All voltages are absolute voltages referenced to VSS -Potential unless otherwise specified. Description Symbol Value min High side floating supply offset voltage High side floating supply voltage (VB vs. VS) Low side power supply Logic input voltages LIN, HIN, ITRIP VS VBS VDD VIN -3 12.5 12.5 0 max 500 17.5 17.5 5 V Unit
1
Monitored by pin 24 9/17 Rev. 0.2, Aug. 2009
Target Data Sheet
CIPOSTM IKCS12F60EA
Static Parameters
(Tc = 25C, VDD = 15V, if not stated otherwise) Description Condition Symbol min Collector-Emitter blocking voltage Collector-Emitter saturation voltage VIN = 5V, IC = 0.25mA Iout = +/- 6A TvJ = 25C TvJ = 150C VIN =5V, Iout = +/- 6A TvJ = 25C TvJ = 150C VCE = 600V, VIN = 5V TvJ = 25C TvJ = 150C tSC 5s VDC = 400V, TvJ = 150C V(BR)CES VCE(sat) 600 1.7 0.7 360 45 11.0 9.5 1.2 9.0 Value typ 1.6 1.9 1.65 1.6 40 2.1 0.9 460 75 12.1 10.4 1.7 10.1 360 2.0 55 220 75 30 max 2.1 2.05 A 40 1000 2.4 1.1 540 12.8 11.0 13.0 550 3.0 100 400 120 A V V mV mV V V V V A mA A A A A V Unit
Diode forward voltage
VF
Zero gate voltage collector current of IGBT Short circuit collector current1 Logic "0" input voltage (LIN,HIN) Logic "1" input voltage (LIN,HIN) ITRIP positive going threshold ITRIP input hysteresis VDD and VBS supply undervoltage positive going threshold VDD and VBS supply undervoltage negative going threshold VCC and VBS supply undervoltage lockout hysteresis Input clamp voltage (/HIN, /LIN, ITRIP) Quiescent VBx supply current (VBx only) Quiescent VDD supply current (VDD only) Input bias current Input bias current ITRIP Input bias current Leakage current of high side
ICES IC(SC) 2 VIH VIL VIT,TH+ VIT,HYS VDDUV+ VBSUV+2 VDDUVVBSUV-2 VDDUVH VBSUVH2
IIN = 4 mA VHIN = low VIN = float VIN = 5V VIN = 0V VITRIP = 5V Tj,IC = 125C, VS = 600V
VINCLAMP IQB IQDD IIN+ IINIITRIP+ ILVS2
1 2
Allowed number of short circuits: <1000; time between short circuits: >1s. Test is not subject of product test, verified by characterisation 10/17 Rev. 0.2, Aug. 2009
Target Data Sheet
CIPOSTM IKCS12F60EA
Dynamic Parameters
(Tc = 25C, VDD = 15V, if not stated otherwise)
Description
Condition
Symbol min
Value typ 617 21 832 29 900 210 270 max 380 -
Unit
Turn-on propagation delay High side or low side Turn-on rise time High side or low side Turn-off propagation delay High side or low side Turn-off fall time High side or low side Shutdown propagation delay ITRIP Input filter time ITRIP Input filter time at LIN for turn on and off and input filter time at HIN for turn on only Input filter time at HIN for turn off Input filter time at HIN for turn off Fault clear time after ITRIP-fault Min. deadtime between low side and high side Deadtime of gate drive circuit IGBT Turn-on Energy (includes reverse recovery of diode) IGBT Turn-off Energy
Iout = 6A, VLIN,HIN = 0V; VDC = 300V Iout = 6A, VDC = 300V VLIN,HIN = 5V Iout = 6A, VLIN,HIN = 5V; VDC = 300V Iout = 6A, VDC = 300V VLIN,HIN = 0V VITRIP = 1V, Iu, Iv, Iw = 6A VITRIP = 1V VLIN,HIN = 0 V & 5V
td(on) tr td(off) tf tITRIP tITRIPmin tFILIN
155 120
ns ns ns ns ns ns ns
VHIN = 5V VHIN = 5 V VLIN,HIN = 0 V & 5V VITRIP = 0 V
tFILIN1 tFILIN2 tFLTCLR DTPWM DTIC
-
220 400 4.7 1 380 145 195 122 160 31 81
-
ns ns ms s ns J
Iout = 6A, VDC = 300V TvJ = 25C TvJ = 150C Iout = 6A, VDC = 300V TvJ = 25C TvJ = 150C Iout = 6A, VDC = 300V TvJ = 25C TvJ = 150C
Eon
Eoff
J J -
Diode recovery Energy
Erec
Target Data Sheet
11/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
Integrated Components
Description Condition Symbol1 min Resistor (0.25 W) Bootstrap diode forward voltage Capacitor Capacitor Bootstrap Capacitor IFDbs = 100mA Rbs VFDbs C1 C2 CbsHx Value typ 10 1.9 100 2.2 100 max 2.05 V nF Unit
Circuit of a Typical Application
1
Symbols according to Figure 1 12/17 Rev. 0.2, Aug. 2009
Target Data Sheet
CIPOSTM IKCS12F60EA
Characteristics
(Tc = 25C, VDD = 15V, if not stated otherwise)
1000ns td(off) td(on)
1000ns td(off)
td(on)
t, SWITCHING TIMES
100ns
tr
t, SWITCHING TIMES
100ns
tf
tf
10ns
tr 10ns 25C
0A
5A
10A
15A
50C
75C
100C
125C
IC, COLLECTOR CURRENT Figure 4. Typical switching times as a function of collector current (inductive load, TvJ=150C,VCE = 300V Dynamic test circuit in Figure A)
TvJ, JUNCTION TEMPERATURE Figure 5. Typical switching times as a function of junction temperature (inductive load, VCE = 300V, IC = 6A Dynamic test circuit in Figure A)
Eon
E, SWITCHING ENERGY LOSSES
E, SWITCHING ENERGY LOSSES
1.25mJ
Eon
0.15mJ
Eoff
1.00mJ
0.75mJ
0.10mJ
0.50mJ
Eoff
0.05mJ
Erec
0.25mJ
Erec
0.00mJ 25C 50C 75C 100C 125C
0.00mJ
0A
5A
10A
15A
IC, COLLECTOR CURRENT Figure 6. Typical switching energy losses as a function of collector current (inductive load, TJ = 150C, VCE = 300V Dynamic test circuit in Figure A)
TvJ, JUNCTION TEMPERATURE Figure 7. Typical switching energy losses as a function of junction temperature (inductive load, VCE = 300V, IC = 6A Dynamic test circuit in Figure A)
Target Data Sheet
13/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
15A
VGE=25C 125C 150C
15A
IC, COLLECTOR CURRENT
12A
IF, forward CURRENT
12A
9A
9A
6A
6A VGE=25C 3A 125C 150C
3A
0A 0V 1V 2V 3V
0A 0V 1V 2V
VCE, COLLECTOR EMITTER VOLTAGE Figure 8. Typical output characteristic of IGBT as a function of collector emitter voltage
VF, forward VOLTAGE Figure 9. Typical diode forward current as a function of forward voltage
ZthJC, TRANSIENT THERMAL RESISTANCE
Single Pulse IGBT Diode 10 K/W
0
C, MAXIMUM EXT. BOOTSTRAP CAPACITOR
100F
10 K/W
-1
10F
10 K/W
-2
1F
1s 10s 100s 1ms 10ms 100ms 1s
10V
12V
14V
16V
18V
tP, PULSE WIDTH Figure 10. Transient thermal impedance as a function of pulse width (D=tP/T)
VDD, SUPPLY VOLTAGE Figure 11. Maximum ext. bootstrap capacitor as a function of supply voltage VDD (single capacitor charging)
Target Data Sheet
14/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
Test Circuits and Parameter Definition
Erec = vD i F dt
0
t Erec
Figure A: Dynamic test circuit Leakage inductance L =180nH Stray capacitance C =39pF
Figure B: Definition of diodes switching characteristics
Figure C: Definition of ITIRP propagation delay
LIN1,2,3 HIN1,2,3
2.1V 0.9V td(off) tf td(on) tr 90% 10% tEoff
t Eoff
iCU, iCV, iCW vCEU, vCEV, vCEW
90%
10%
10% tEon
2%
2%
Eoff =
vCEx i Cx dt
0
Eon = vCEx i Cx dt
0
t Eon
Figure D: Switching times definition and switching energy definition
Target Data Sheet
15/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
tFILIN HIN LIN
tFILIN
LIN
on
off
on
off
high LO HO LO low
a) HIN
tFILIN1 toff,HINx
tFILIN2
toff,HINx < tFILIN1 high
HO b) HIN toff,HINx toFILIN1 < toff,HINx < tFILIN2 HO c) HIN toff,HINx toff,HINx > tFILIN2 HO
Figure E: Short Pulse suppression
Target Data Sheet
16/17
Rev. 0.2, Aug. 2009
CIPOSTM IKCS12F60EA
Package Outline IKCS12F60EA
Description
Condition
Symbol min
Value typ 17 max -
Unit
Weight
mP
-
g
Note: There may occur discolourations on the copper surface without any effect of the thermal properties.
Target Data Sheet
17/17
Rev. 0.2, Aug. 2009

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