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 Ordering number : EN*A1591
STK681-332-E
Overview
Thick-Film Hybrid IC
Forward/Reverse Motor Driver
The STK681-332-E is a hybrid IC for use in current control forward/reverse DC motor driver with brush.
Applications
* Office photocopiers, printers, etc.
Features
* Allows forward, reverse, and brake operations in accordance with the external input signal. * 12A peak startup output current and 12A peak brake output current. * On-chip output short-circuit detection function. * Connecting an external current detection resistor allows overcurrent detection and peak current control in the PWM operation mode. * Obviate the need to design for the dead time in order to turn off the upper- and lower drive devices when switching between the forward and reverse operation mode.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
N1809HKIM No. A1591-1/14
STK681-332-E
Specifications
Absolute maximum ratings at Tc = 25C
Parameter Maximum supply voltage 1 Maximum supply voltage 2 Input voltage Output current1 Output current2 Brake current Allowable power dissipation Operating substrate temperature Junction temperature Storage temperature Symbol VCC max VDD max VIN max IO1 max IO2 max IOB max PdPK max Tc Tj max Tstg VDD=0V No signal Logic input pins VDD=5.0V, DC current VDD=5.0V, Pulse current: 5ms VDD=5.0V, square wave current, operating time 15ms (single pulse, low side brake) No heat sink Metal surface temperature of the package Conditions Ratings 52 -0.3 to +6.0 -0.3 to +6.0 8.5 12 12 2.8 -20 to +105 150 -40 to +125 unit V V V A A A W C C C
Allowable Operating Ranges at Ta = 25C
Parameter Operating supply voltage 1 Operating supply voltage 2 Operating supply voltage 2 Input voltage Output current 1 Output current 2 Brake current Symbol VCC1 VCC2 VDD VIN IO1 IO2 IOB VDD=5.0V, DC current, Tc=80C VDD=5.0V, DC current, Tc=105C VDD=5.0V, square wave current, operating time 2ms, Low side brake, Tc=105C Conditions With signals applied (Tc=105C) With signals applied (Tc=90C) With signals applied Ratings 10 to 38 10 to 42 55% 0 to VDD 6.1 5 12 unit V V V V A A A
Refer to the graph for each conduction-period tolerance range for the output current and brake current. Electrical Characteristics at Tc = 25C, VCC = 24V, VDD = 5.0V
Parameter VDD supply current FET diode forward voltage Output saturation voltage 1 Output saturation voltage 2 Output leak current Input high voltage Input low voltage High-level input current Low-Level Input current Overcurrent detection voltage Internal PWM frequency Overheat detection temperature Symbol ICCO Vdf Vsat1 Vsat2 IOL VIH VIL IILH IILL VOC fc TSD Design guarantee Conditions Forward or reverse operation If=1A (RL=23) RL=23, F1, F2 RL=23, F3, F4 F1, F2, F3, and F4 OFF operation IN1, IN2, ENABLE pins IN1, IN2, ENABLE pins IN1, IN2, ENABLE pins, VIH=5V IN1, IN2, ENABLE pins, VIL=GND Between pins Vref1 and S.P 32 0.48 46 144 62 50 2.5 0.8 75 10 min typ 6 0.75 65 50 max 9 1.4 100 85 50 unit mA V mV mV A V V A A V kHz C
Note: A fixed-voltage power supply must be used.
No. A1591-2/14
STK681-332-E
Package Dimensions
unit:mm (typ)
24.2 (18.4) (R1.47) 4.5
(11.0)
14.4
1
19
(3.5)
11.0
1.0 18 1.0=18.0
0.5
0.4 2.0 4.0 4.45
Derating Curve of Motor Current, IO, vs. STK681-332-E Operating Board Temperature, Tc
9 8
IO - Tc
DC PWM(VCC=24V)
7
Motor current, IO - A
PWM(VCC=33V) PWM(VCC=42V)
6 5 4 3 2 1 0 0 10 20 30 40 50 60 70 80 90 100 110
ITF02711
Operating Substrate Temperature, Tc - C
(The maximum PWM frequency is 50kHz.) The PWM frequencies in the above graph indicate the ENABLE signal. The same PWM IO derating curves as those shown above will be obtained when the internal PWM frequency of the STK681-332-E is used. Increasing the VCC supply voltage narrows the IO derating curve range, so IO should be set in reference to the above graph. The above operating substrate temperature, Tc, is measured immediately when the motor is started. Since Tc fluctuates due to the ambient temperature, Ta, the motor current value, and continuous or intermittent operations of the motor current, always confirm this values using an actual set. The Tc temperature should be checked in the center of the metal surface of the product package.
14.4
No. A1591-3/14
STK681-332-E
STK681-332-E Allowable Brake Current Range (Low side: F3, F4=ON)
13 12 11
IOB - t
Brake Current, IOB - A
Tc=25C
10 9 8 7 6 5 1.0
70C 80C 90C 105C
2 3 5 7 10 2 3 5 7 100 2 3 5 7 1000
ITF02712
Conduction Time, t - ms
STK681-332-E Allowable Brake Current Range (High side: F1, F2=ON)
13 12
IO - t
Single-pulse current, IO - A
11 10 9 8
Tc=25C
90C
7 6 5 1.0
80C
70C
105C
2 3 5 7 10 2 3 5 7 100 2 3 5 7 1000
ITF02713
Conduction Time, t - ms
The output current specifications are the same as the high side brake current specifications.
No. A1591-4/14
STK681-332-E
Internal Block Diagram
Unassigned pins 5 11 OUT1 8 10 9 VCC 7 4 OUT2 6
F1
F2
IN2 17
F3
F4 IN1 16
ENABLE 18 GND 1
2 3 VDD (5V) 15 Output short-circuit detection
FAULT 13 Latch
Overheat Detection
Overcurrent Detection Vref 19 PWM (46kHz typ) Constantcurrent control Setting voltage (0.48V typ)
S.GND 14
No. A1591-5/14
STK681-332-E
Sample Application Circuit
STK681-332-E
9 FAULT VDD (5V) IN1 IN2 ENBALE (DC or PWM) R1 Vref 19 R2 C2 10F/50V C3 0.1F S.GND 2 14 1 Rs GND 13 15 10 16 8 17 12 18 11 6 5 4 3 N.C C1 47F to /50V N.C OUT2 N.C Motor CW CCW OUT1 7 VCC=24V
Motor Drive Conditions (H: High-level input; L: Low-Level Input)
IN1 Stop H L H Forward (CW) Reverse (CCW) Brake H L L H IN2 L H H L H L H ENABLE L L L H H L or H H Remarks Turns the power supply OFF. ENABLE must be set Low when VDD is rising or falling. No input signal is needed that turns off the upper- and lower-side drive devices when switching the rotational direction. GND side MOSFET ON VCC side MOSFET ON
* Output control is enabled by applying an external PWM signal to the ENABLE pin. The product can run at a minimum external PWM pulse width of 1s. In the case when the high pulse width is less than 16s, however, the IC may fail to detect a short-circuit condition when an output short-circuit occurs. If VDD is turned off in the condition with the ENABLE pin set to high during motor rotation or PWM operation, the FAULT signal is output when VDD is falling, indicating error condition. For this reason, ENABLE must be set to low when VDD is rising or falling. When both IN1 and IN2 are set low, the MOSFET on the VCC side is driven. To minimize the loss when stopped, set IN1 = IN2 = High and ENABLE = Low to turn off the gate signal to the VCC side MOSFETs.
No. A1591-6/14
STK681-332-E
Notes (1) Be sure to set the capacitance of the power supply bypass capacitor, C1, so that the ripple current of the capacitor, which varies as motor current increases, falls within the allowed range. (2) Chopping operations based on F3 and F4 are used for current control. The timing given below is used for OUT1 or OUT2 voltage output and for F3 or F4 drain current. (3) Do not connect the N.C pins (5, 11, 12 pin) shown in the internal block diagram or sample application circuit to a circuit pattern on the PCB.
OUT1 or OUT2 Output voltage
VCC+Vdf
GND
F3 or F4 Drain current
IO peak (current setting value)
22s
0A
Motor current
IO peak (current setting value)
0A
(4) Sample Timing Diagram
IN1
IN2
ENABLE
Stop
Forward rotation
Brake
Reverse rotation
Stop
Forward rotation
Brake
Stop
(5) If the current detection resistor, Rs, connected to pin1, pin2, and pin3 is short-circuited, the overcurrent detection circuit does not operate. If the output pin is short-circuited directly to VCC or connected directly to GND, an output short-circuit condition is detected and the output is latched in the off state. To restart the operation, turn on VDD again. (6) Smoke Emission Precautions: There is a possibility of smoke emission if the hybrid IC is subjected to physical or electrical damage as the result of being used without compliance with the specifications.
No. A1591-7/14
STK681-332-E
I/O Functions of Each Pin
Pin Name IN1 IN2 Pin No. 16 17 Input pin for turning F2 and F4 ON and OFF At low level F2: ON and F4: OFF; at high level, F2: OFF and F4: ON Input pin for turning F1 and F3 ON and OFF At low level F1: ON and F3: OFF; at high level, F1: OFF and F3: ON Pin for turning F3 and F4 ON; At high level F31 and F42: ON ENABLE 18 ENABLE must be set Low when VDD is rising and falling. ENABLE must be set High to drive the motor. Monitor pin used when either of the output short-circuit detector, overcurrent detector, or overheat detector is FAULT OUT1 OUT2 13 8, 10 4, 6 activated. When the detector is activated, this pin is set low and all of F1, F2, F3 and F4 in the final stage are latched off. This pin connects to the motor and outputs source/sync current depending on conditions at IN1 and IN2. This pin connects to the motor and outputs source/sync current depending on conditions at IN1 and IN2. This pin limits the peak current when motor startup. Vref 19 The current setting voltage, Vref, is set to the value of 4.9 times the voltage drop of the external current detection resistor. The internal overcurrent detection level is 0.48V, so setting Vref < 2.0V is recommended. GND S.GND VCC VDD 1, 2, 3 14 7, 9 15 Power system ground Control system ground Motor system supply voltage Control system supply voltage. Function
No. A1591-8/14
STK681-332-E
Technical Information
1.Configuration of each pins Input pins: 16, 17, 18 pin
5V
10k
100k VSS
The input pins of this driver all use Schmitt input. Typical specifications at Tc=25C are given below. Hysteresis voltage is 0.3V (VIHa-VILa).
When rising 1.8V typ Input voltage VIHa
When falling
1.5V typ
VILa
Input voltage specifications are as follows. VIH=2.5V min VIL=0.8V max
Output pin 5V
Pin 16 VSS

To 1, 2, 3 pins Vref/4.9 Pin 19 Amplifier VSS
VDD
PWM control
To MOSFET gate
No. A1591-9/14
STK681-332-E
[Reduced voltage detection] (1) VDD The internal control IC of the driver has a function that detects reduced voltage when VDD is supplied. This reduced voltage threshold level is set to 4V (typ.), and the MOSFET gate voltage specification is 5V 5%. So, a current flow through the output when VDD is rising results in the power stress to the MOSFET due to insufficient gate voltage. To prevent this power stress, set ENABLE = Low when VDD < 4.75V, which is outside the normal operating supply voltage range of the MOSFET.
4Vtyp Control IC power (VDD) rising edge Control IC power on reset
3.8Vtyp
ENABLE signal input
VDD, ENABLE Signals Input Timing (2) VCC The internal control IC of the driver has a function that detects reduced voltage when VCC is supplied, to prevent insufficient internal P-channel MOSFET gate voltage. The reduced voltage detection level is set to VCC = 8.8V (typ.).
8.8V
VCC
MOSFET off
MOSFET off
No. A1591-10/14
STK681-332-E
2. Output short-circuit detection, Overcurrent Detection and Overheat Detection Each detection function operates using a latch system and turns output off. To restore output operation, turn the VDD power supply off and then on again to apply a power-on reset. [Output Short-circuit Detection, Overcurrent Detection] When the output pin is simply connected to the circuit GND or VCC, or when the output load is short-circuited, the output short circuit detector must be activated and turn the output off. Constant current PWM control can be performed by connecting a current detection resistor to pins 1, 2 and 3, and setting the Vref pin voltage to less than 2.0V. In addition, when this current detection resistor voltage exceeds 0.48V (typ.), the overcurrent detector is activated and shuts the output off. [Overheat Detection] Rather than directly detecting the temperature of the semiconductor device, overheat detection detects the temperature of the aluminum substrate (144C typ). Within the allowed operating range of IO1 (6.1A) recommended in the specifications, if a heat sink attached for the purpose of reducing the operating substrate temperature, Tc, comes loose, the semiconductor can operate without breaking. However, we cannot guarantee operations without breaking in the case of operation other than those recommended, such as operations at a current exceeding IOH max (6.1A) that occurs before overcurrent detection is activated. 3. Mitigated Curve of Package Power Loss, PdPK, vs. Ambient Temperature, Ta Package power loss, PdPK, refers to the average internal power loss, PdAV, allowable without a heat sink. The figure below represents the allowable power loss, PdPK, vs. fluctuations in the ambient temperature, Ta. Power loss of up to 2.8W is allowable at Ta=25C, and of up to 1.5W at Ta=60C. Allowable power dissipation, PdPK (no heat sink) - Ambient temperature, Ta
PdPK - Ta
3.0
Allowable power dissipation, PdPK - W
2.5
2.0
1.0
1.5
0.5
0 0 20 40 60 80 100 120
ITF02714
Ambient temperature, Ta - C
No. A1591-11/14
STK681-332-E
4. Data
1600
Vsat1, Vsat2 - IO
VDD=5.0V Tc=25C
Output saturation voltage, Vsat1,Vsat2 - mV
1400 1200 1000 800 600 400 200 0 0
at1 Vs at2 Vs
1
2
3
4
5
6
7
8
9
10
11
12
ITF02715
Output current, IO - A(DC)
1.1
Vdf - IO
Tc=25C
Diode forward voltage, Vdf - V
1.0
0.9
0.8
) side gh (Hi f Vd ide) ws (Lo Vdf
0.7
0.6
0.5 0 1 2 3 4 5 6 7 8 9 10 11 12
ITF02716
Output current, IO - A(DC)
No. A1591-12/14
STK681-332-E
5. Other Notes on Use In addition to the "Notes" indicated in the Sample Application Circuit, care should also be given to the following contents during use. (1) Allowable operating range Operation of this product assumes use within the allowable operating range. If a supply voltage or an input voltage outside the allowable operating range is applied, an overvoltage may damage the internal control IC or the MOSFET. If a voltage application mode that exceeds the allowable operating range is anticipated, connect a fuse or take other measures to cut off power supply to the product. (2) Input pins If the input pins are connected directly to the PC board connectors, electrostatic discharge or other overvoltage outside the specified range may be applied from the connectors and may damage the product. Current generated by this overvoltage can be suppressed to effectively prevent damage by inserting 100 to 1k resistors in lines connected to the input pins. Take measures such as inserting resistors in lines connected to the input pins (3) Power connectors If the motor power supply VCC is applied by mistake without connecting the GND part of the power connector when the product is operated, such as for test purposes, an overcurrent flows through the VCC decoupling capacitor, C1, to the parasitic diode between the VDD of the internal control IC and GND, and may damage the power supply pin block of the internal control IC. Always connect the GND pin before supplying VCC.
5V Reg.
15
8 Logic level Control Block VDD
10
9
7
4
6
IN1 IN2 ENABLE
F1
F2 VCC C1 24V Reg.
FAULT Vref
F3
F4
1 VSS 2 3 Open
14
S.GND
Over-current path
(4) Input Signal Lines 1) Do not use an IC socket to mount the driver, and instead solder the driver directly to the PC board to minimize fluctuations in the GND potential due to the influence of the resistance component and inductance component of the GND pattern wiring. 2) To reduce noise due to electromagnetic induction to small signal lines, do not design small signal lines (sensor signals, 5V or 3.3V power supply signal lines) that run parallel near the motor output lines OUT1 and OUT2. 3) Pins 5, 11 and 12 of this product are N.C pins. Do not connect any wiring to these pins.
No. A1591-13/14
STK681-332-E
(5) When mounting multiple drivers on a single PC board When mounting multiple drivers on a single PC board, the GND design should mount a VCC decoupling capacitor, C1, for each driver to stabilize the GND potential of the other drivers. The key wiring points are as follows.
24V 5V
15 7 9 16
Input Signals
17 IC1 18 1 2 19 14 3
Motor 1
Input Signals C1 for IC1
15 7 9 16 17 IC2 18 1 2 19 14 3
Motor 2
15 7 9 16
Input Signals C1 for IC2
17 18 IC3
Motor 3 C1 for IC3
1 2 19 14 3
GND Short Thick and short Thick
GND
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of November, 2009. Specifications and information herein are subject to change without notice.
PS No. A1591-14/14


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