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| NTLUD3191PZ Power MOSFET Features -20 V, -1.8 A, mCoolt Dual P-Channel, ESD, 1.6x1.6x0.55 mm UDFN Package * UDFN Package with Exposed Drain Pads for Excellent Thermal * * * * * * * * http://onsemi.com V(BR)DSS RDS(on) MAX 250 mW @ -4.5 V -20 V 380 mW @ -2.5 V 500 mW @ -1.8 V 700 mW @ -1.5 V ID MAX -1.5 A -1.0 A -0.5 A -0.2 A Conduction Low Profile UDFN 1.6 x 1.6 x 0.55 mm for Board Space Saving ESD This is a Halide Free Device This is a Pb-Free Device High Side Load Switch PA Switch Battery Switch Optimized for Power Management Applications for Portable Products, such as Cell Phones, PMP, DSC, GPS, and others Applications D1 D2 MAXIMUM RATINGS (TJ = 25C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current (Note 1) Steady State t5s Power Dissipation (Note 1) Steady State t5s Continuous Drain Current (Note 2) Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 25C TA = 25C TA = 85C TA = 25C tp = 10 ms PD IDM TJ, TSTG IS TL ESD ID PD Symbol VDSS VGS ID Value -20 8.0 -1.4 -1.0 -1.8 0.8 1.3 -1.1 -0.8 0.5 -8.0 -55 to 150 -1.0 260 1000 W A C A C V A W Units V V A G1 G2 S1 P-Channel MOSFET S2 MARKING DIAGRAM 6 1 UDFN6 CASE 517AT mCOOLt 1 AC MG G AC = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) Power Dissipation (Note 2) Pulsed Drain Current Operating Junction and Storage Temperature Source Current (Body Diode) (Note 2) Lead Temperature for Soldering Purposes (1/8 from case for 10 s) Gate-to-Source ESD Rating (HBM) per JESD22-A114F Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm2, 2 oz. Cu. (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. (c) Semiconductor Components Industries, LLC, 2009 April, 2009 - Rev. 1 1 Publication Order Number: NTLUD3191PZ/D NTLUD3191PZ THERMAL RESISTANCE RATINGS Parameter Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - t 5 s (Note 3) Junction-to-Ambient - Steady State min Pad (Note 4) Symbol RJA RJA RJA Max 155 100 245 Units C/W ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temp. Coefficient Drain-to-Source On Resistance VGS(TH) VGS(TH)/TJ RDS(on) VGS = -4.5 V, ID = -1.5 A VGS = -2.5 V, ID = -1.0 A VGS = -1.8 V, ID = -0.5 A VGS = -1.5 V, ID = -0.2 A Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD td(ON) tr td(OFF) tf VSD tRR ta tb QRR VGS = 0 V, dISD/dt = 100 A/ms, IS = -1.0 A TJ = 25C TJ = 85C VGS = -4.5 V, VDD = -10 V, ID = -1.5 A, RG = 1 W VGS = -4.5 V, VDS = -10 V; ID = -1.5 A VDS = -5.0 V, ID = -0.2 A CHARGES, CAPACITANCES & GATE RESISTANCE 160 VGS = 0 V, f = 1 MHz, VDS = -10 V 32 23 2.3 0.2 0.4 0.7 ns 3.5 nC pF VGS = VDS, ID = 250 mA -0.4 2.5 175 240 330 410 1.4 250 380 500 700 S -1.0 V mV/C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, ID = -250 mA ID = -250 mA, ref to 25C VGS = 0 V, VDS = -20 V TJ = 25C TJ = 85C -20 15 -1.0 -10 10 mA V mV/C mA Symbol Test Condition Min Typ Max Units VDS = 0 V, VGS = 8.0 V SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge 3. 4. 5. 6. VGS = 0 V, IS = -1.0 A 0.85 0.75 10 8.0 2.0 5.0 nC ns 1.2 V 13 24 68 62 Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm2, 2 oz. Cu. Pulse Test: pulse width 300 ms, duty cycle 2%. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTLUD3191PZ TYPICAL CHARACTERISTICS 10 9 -ID, DRAIN CURRENT (A) 8 7 6 5 4 3 2 1 0 0 1 2 3 4 -3.0 V -2.5 V -2.0 V -1.8 V -1.5 V 5 TJ = 25C VGS = -4.5 V -4.0 V -ID, DRAIN CURRENT (A) -3.5 V 5 4 3 2 1 0 VDS = -5 V TJ = 125C 0 0.5 1 1.5 TJ = 25C TJ = -55C 2 2.5 3 -VDS, DRAIN-TO-SOURCE VOLTAGE (V) -VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 ID = -0.2 A ID = -1.5 A TJ = 25C RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 1.0 0.8 0.6 0.4 0.2 0 -1.5 V TJ = 25C -1.8 V -2.5 V VGS = -4.5 V 0 1 2 3 4 5 6 7 8 9 10 0.1 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 -VGS, GATE-TO-SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate Voltage Figure 4. On-Resistance vs. Drain Current and Gate Voltage 1.7 1.6 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VGS = -4.5 V ID = -1.5 A 10000 VGS = 0 V -IDSS, LEAKAGE (nA) TJ = 150C 1000 TJ = 125C 100 TJ = 85C 10 -25 0 25 50 75 100 125 150 0 5 10 15 20 TJ, JUNCTION TEMPERATURE (C) -VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 3 NTLUD3191PZ TYPICAL CHARACTERISTICS -VGS, GATE-TO-SOURCE VOLTAGE (V) 250 225 C, CAPACITANCE (pF) 200 175 150 125 100 75 50 25 0 0 Coss Crss 4 8 12 16 20 Ciss VGS = 0 V TJ = 25C f = 1 MHz 5 4 VDS 3 2 1 0 QGS QGD 4 VGS = -10 V ID = -1.5 A TJ = 25C 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2 VGS QT 12 10 8 6 -VDS, DRAIN-TO-SOURCE VOLTAGE (V) 0 2.25 2.5 -VDS, DRAIN-TO-SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge 10 -IS, SOURCE CURRENT (A) 100 td(off) tf VGS = -4.5 V VDD = -10 V ID = -1.5 A t, TIME (ns) tr 1.0 TJ = 150C TJ = 25C td(on) 10 1 10 RG, GATE RESISTANCE (W) 100 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 -VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0.35 -50 -25 0 25 50 75 100 125 POWER (W) ID = -250 mA 175 150 125 100 75 50 25 Figure 10. Diode Forward Voltage vs. Current -VGS, GATE-TO-SOURCE VOLTAGE (V) 0 150 0.0000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 TJ, TEMPERATURE (C) SINGLE PULSE TIME (s) Figure 11. Threshold Voltage Figure 12. Single Pulse Maximum Power Dissipation http://onsemi.com 4 NTLUD3191PZ TYPICAL CHARACTERISTICS 10 -ID, DRAIN CURRENT (AMPS) 10 ms 1 100 ms VGS = -8 V 0.1 SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 ms 10 ms dc 0.01 1 10 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 100 Figure 13. Maximum Rated Forward Biased Safe Operating Area 175 150 125 R(t) (C/W) 100 75 50 0.5 0.02 Single Pulse 0.00001 0.0001 0.001 0.01 0.01 0.1 1 10 100 1000 0.2 25 0.1 0.05 0 0.000001 PULSE TIME (sec) Figure 14. FET Thermal Response DEVICE ORDERING INFORMATION Device NTLUD3191PZTAG NTLUD3191PZTBG Package UDFN6 (Pb-Free) UDFN6 (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NTLUD3191PZ PACKAGE DIMENSIONS UDFN6 1.6x1.6, 0.5P CASE 517AT-01 ISSUE O D 2X A B L1 E DETAIL A 0.10 C PIN ONE REFERENCE 2X L OPTIONAL CONSTRUCTION NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D E e D1 D2 E1 K L L1 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.20 0.30 1.60 BSC 1.60 BSC 0.50 BSC 1.14 1.34 0.38 0.58 0.54 0.74 0.20 --- 0.15 0.35 --- 0.10 0.10 C TOP VIEW DETAIL B (A3) A A1 0.05 C 6X 0.05 C SIDE VIEW D1 1 3 A1 2X C SEATING PLANE DETAIL A 6X K D2 E1 L 6 4 6X 6X b 0.10 C A B 0.05 C NOTE 3 e BOTTOM VIEW mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 6 EEE EEE EEE EE EE EXPOSED Cu MOLD CMPD A3 DETAIL B OPTIONAL CONSTRUCTION SOLDERMASK DEFINED MOUNTING FOOTPRINT* 1.34 0.58 2X 0.48 6X 0.74 1.90 1 0.50 PITCH 6X 0.32 DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NTLUD3191PZ/D |
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