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 19-4689; Rev 0; 7/09
KIT ATION EVALU ILABLE AVA
1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable
General Description
The MAX1951A high-efficiency, DC-DC step-down switching regulator delivers up to 2A of output current. The device operates from an input voltage range of 2.6V to 5.5V and provides an adjustable output voltage from 0.8V to VIN, making the MAX1951A ideal for on-board postregulation applications. The MAX1951A total output error is less than 1.5% over load, line, and temperature. The MAX1951A operates at a fixed frequency of 1MHz with an efficiency of up to 94%. The high operating frequency minimizes the size of external components. Internal soft-start control circuitry reduces inrush current. Short-circuit and thermal-overload protection improve design reliability. The MAX1951A can start up safely with a prebiased or without a preexisting output. This feature simplifies tracking supply designs for core and I/O applications and redundant supply designs. The MAX1951A is available in an 8-pin SO package and operates over the -40C to +85C extended temperature range. o Compact 0.385in2 Circuit Footprint o 10F Ceramic Input and Output Capacitors, 2H Inductor for 2A Output o Efficiency Up to 94% o 1.5% Output Accuracy Over Load, Line, and Temperature o Guaranteed 2A Output Current o Operates from 2.6V to 5.5V Supply o Adjustable Output from 0.8V to VIN o Internal Digital Soft-Soft o Short-Circuit and Thermal-Overload Protection o 1MHz Switching Frequency Reduces Component Size o Enable Input Audio Shutdown for Reducing Power Consumption o Safe Startup into Prebiased Output
Features
MAX1951A
Applications
ASIC/DSP/P/FPGA Core and I/O Voltages Set-Top Boxes Networking and Telecommunications Servers TVs
Ordering Information
PART MAX1951AESA+ TEMP RANGE -40C to +85C PIN-PACKAGE 8 SO
+Denotes a lead(Pb)-free/RoHS-compliant package.
Pin Configuration
INPUT 2.6V TO 5.5V
Typical Operating Circuit
OUTPUT 0.8V TO VIN, UP TO 2A IN LX
TOP VIEW +
VCC EN GND 1 2 8 7 IN
MAX1951A
VCC FB
LX PGND COMP EN GND OFF COMP PGND ON
MAX1951A
3 6 5 FB 4
SO
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
ABSOLUTE MAXIMUM RATINGS
IN, VCC to GND ........................................................-0.3V to +6V COMP, FB, EN to GND...............................-0.3V to (VCC + 0.3V) LX Current (Note 1).............................................................4.5A PGND to GND..............................................Internally connected Continuous Power Dissipation (TA = +70C) 8-Pin SO (derate 12.2mW/C above +70C).................976mW Junction-to-Case Thermal Resistance (JC) (Note 2) 8-Pin SO ........................................................................32C/W Operating Temperature Range ...........................-40C to +85C Junction Temperature Range ............................-40C to +150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceed the IC's package power dissipation limits. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VIN = VCC = VEN = 3.3V, VPGND = VGND = 0V, FB in regulation, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER IN AND VCC IN Voltage Range Supply Current Shutdown Current VCC Undervoltage Lockout Threshold COMP COMP Transconductance COMP Clamp Voltage, Low COMP Clamp Voltage, High FB Output Voltage Range FB Regulation Voltage (Error Amplifier Only) FB Input Bias Current LX VIN = 5V LX On-Resistance, PMOS ILX = -180mA VIN = 3.3V VIN = 2.6V VIN = 5V LX On-Resistance, NMOS ILX = 180mA VIN = 3.3V VIN = 2.6V 119 145 171 122 133 142 246 m 266 m When using external feedback resistors to drive FB IOUT = 0A to 1.5A, VIN = 2.6V to 5.5V PNP input stage TA = 0C to +85C TA = -40C to +85C 0.8 0.789 0.786 -0.1 0.796 VIN 0.804 0.804 +0.1 V V A From FB to COMP, VCOMP = 0.8V VIN = 2.6V to 5.5V, VFB = 0.9V VIN = 2.6V to 5.5V, VFB = 0.7V 40 0.6 1.97 50 1 2.13 80 1.45 2.28 S V V Switching with no load, LX floating EN = GND When LX starts/stops switching VCC rising VCC falling 1.92 VIN = 5.5V 2.6 7 0.1 2.19 2.07 5.5 10 0.4 2.32 V mA mA V CONDITIONS MIN TYP MAX UNITS
2
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = VEN = 3.3V, VPGND = VGND = 0V, FB in regulation, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER LX Current-Sense Transimpedance LX Current-Limit Threshold LX Leakage Current LX Switching Frequency LX Maximum Duty Cycle LX Minimum Duty Cycle THERMAL Thermal Shutdown Threshold EN Enable Low Threshold (VIL) Enable High Threshold (VIH) EN Input Current 0.8 2.0 1 V V A When LX starts/stops switching TJ rising TJ falling 165 155 C CONDITIONS From LX to COMP, VIN = 2.6V to 5.5V Duty = 100%, VIN = 2.6V to 5.5V VIN = 5.5V VIN = 2.6V to 5.5V VCOMP = 1.5V, LX = Hi-Z, VIN = 2.6V to 5.5V VCOMP = 1V, IN = 2.6V to 5.5V High side Low side VLX = 5.5V VLX = 0V -10 0.8 100 15 0.96 1.1 MIN 0.16 2.2 TYP 0.24 3.1 -0.3 10 MAX 0.35 4.5 UNITS A A MHz % %
MAX1951A
Note 3: Specifications to TA = -40C are guaranteed by design and not production tested.
Typical Operating Characteristics
(Typical values are at VIN = VCC = 5V, VOUT = 1.5V, IOUT = 1.5A, and TA = +25C, unless otherwise noted. See Figure 2.)
EFFICIENCY vs. OUTPUT CURRENT (VCC = VIN = 5V)
MAX1951A toc01
EFFICIENCY vs. OUTPUT CURRENT (VCC = VIN = 3.3V)
90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 900 0 0.4 0.8 1.2 1.6 2.0 2.5
MAX1951A toc02
SWITCHING FREQUENCY vs. INPUT VOLTAGE
MAX1951A toc03
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 0.4 0.8 1.2 1.6
100
1050 1025 1000 975 950 925
VOUT = 3.3V
VOUT = 2.5V VOUT = 1.5V
VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.0V
2.0
SWITCHING FREQUENCY (kHz)
3.0
3.5
4.0
4.5
5.0
5.5
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
INPUT VOLTAGE (V)
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
Typical Operating Characteristics (continued)
(Typical values are at VIN = VCC = 5V, VOUT = 1.5V, IOUT = 1.5A, and TA = +25C, unless otherwise noted. See Figure 2.)
LOAD REGULATION
0.40 OUTPUT VOLTAGE DEVIATION (%) 0.30 0.20 0.10 0 -0.10 -0.20 -0.30 -0.40 -0.50 0 0.4 0.8 1.2 1.6 2.0 VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V
MAX1951A toc04
LOAD TRANSIENT (50% TRANSIENT)
MAX1951A toc05
LOAD TRANSIENT (90% TRANSIENT)
MAX1951A toc06
0.50
IOUT 1A/div
IOUT 1A/div
VOUT (AC-COUPLED) 500mV/div VOUT = 2.5V 40Fs/div 40Fs/div
VOUT (AC-COUPLED) 200mV/div
OUTPUT CURRENT (A)
SWITCHING WAVEFORMS (VIN = 3.3V, VOUT = 1.8V, RL = 1I)
MAX1951A toc07
SOFT-START WAVEFORMS (VIN = 3.3V, VOUT = 1.8V)
MAX1951A toc08
ILX 500mA/div LX 2V/div EN 2V/div
VOUT (AC-COUPLED) 10mV/div 400ns/div 1ms/div
VOUT 1V/div
SOFT-START WAVEFORMS (VIN = 3.3V, VOUT = 0.8V)
MAX1951A toc09
STARTUP INTO PREBIASED OUTPUT
MAX1951A toc10
EN 5V/div EN 2V/div LX 5V/div VOUT = 2.5V VOUT 500mV/div VOUT = 1.5V VOUT 2V/div
1ms/div
1ms/div
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable
Typical Operating Characteristics (continued)
(Typical values are at VIN = VCC = 5V, VOUT = 1.5V, IOUT = 1.5A, and TA = +25C, unless otherwise noted. See Figure 2.)
MAX1951A
STARTUP INTO PREBIASED OUTPUT
MAX1951A toc11
SHUTDOWN WAVEFORMS (VIN = 3.3V, VOUT = 2.5V, RL = 1.5I)
EN 5V/div LX 5V/div
SUPPLY CURRENT vs. INPUT VOLTAGE
7 SUPPLY CURRENT (mA) EN 2V/div 6 5 4 3 2 1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
MAX1951A toc13
MAX1951A toc12
8
VOUT = 3.3V
VOUT = 2.5V
LX 2V/div VOUT 2V/div VOUT 2V/div
1ms/div
20Fs/div
INPUT VOLTAGE (V)
FEEDBACK VOLTAGE vs. TEMPERATURE
MAX1951A toc14
CASE TEMPERATURE vs. AMBIENT TEMPERATURE
160 140 CASE TEMPERATURE (NC) 120 100 80 60 40 20 0 -20 -40
MAX1951A toc15
805
180
FEEDBACK VOLTAGE (mV)
803
801
799
797
795 -40 -15 10 35 60 85 TEMPERATURE (NC)
-40
-15
10
35
60
85
AMBIENT TEMPERATURE (NC)
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
Pin Description
PIN NAME 1 VCC FUNCTION Supply Voltage. Bypass with a 0.1F capacitor to ground and a 10 resistor to IN. Enable Input. Connect to VCC for normal operation. Connect to GND to disable the MAX1951A. Signal Ground Feedback Input. Connect an external resistordivider from the output to FB and GND to set the output to a voltage between 0.8V and VIN. Regulator Compensation. Connect series RC network to GND.
2 3 4
EN GND FB
5
COMP
6
Power Ground. Internally connected to GND. PGND Keep power ground and signal ground planes separate. LX Inductor Connection. Connect an inductor between LX and the regulator output. Power-Supply Voltage. Input voltage range from 2.6V to 5.5V. Bypass with a 10F (min) ceramic capacitor to GND and a 10 resistor to VCC.
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internal clock, the internal high-side MOSFET turns on until the PWM comparator trips. During this on-time, current ramps up through the inductor, sourcing current to the output and storing energy in the inductor. The currentmode feedback system regulates the peak inductor current as a function of the output-voltage error signal. Since the average inductor current is nearly the same as the peak inductor current (< 30% ripple current), the circuit acts as a switch-mode transconductance amplifier. To preserve inner-loop stability and eliminate inductor staircasing, a slope-compensation ramp is summed into the main PWM comparator. During the second half of the cycle, the internal high-side p-channel MOSFET turns off, and the internal low-side n-channel MOSFET turns on. The inductor releases the stored energy as its current ramps down while still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load current, and discharges when the inductor current is lower, smoothing the voltage across the load. Under overload conditions, when the inductor current exceeds the current limit (see the Current Limit section), the high-side MOSFET does not turn on at the rising edge of the clock and the low-side MOSFET remains on to let the inductor current ramp down.
8
IN
Current Sense
An internal current-sense amplifier produces a current signal proportional to the voltage generated by the high-side MOSFET on-resistance and the inductor current (RDS(ON) x ILX). The amplified current-sense signal and the internal slope compensation signal are summed together into the comparator's inverting input. The PWM comparator turns off the internal high-side MOSFET when this sum exceeds the output from the voltage-error amplifier.
Detailed Description
The MAX1951A high-efficiency switching regulator is a small, simple, current-mode DC-DC step-down converter capable of delivering up to 2A of output current. The device operates in pulse-width modulation (PWM) at a fixed frequency of 1MHz from a 2.6V to 5.5V input voltage and provides an output voltage from 0.8V to VIN, making the MAX1951A ideal for on-board postregulation applications. The high switching frequency allows for the use of smaller external components, and an internal synchronous rectifier improves efficiency and eliminates the typical Schottky free-wheeling diode. Using the on-resistance of the internal high-side MOSFET to sense switching currents eliminates currentsense resistors, further improving efficiency and cost. The MAX1951A total output error over load, line, and temperature (-40C to +85C) is less than 1.5%.
Current Limit
The internal high-side MOSFET has a current limit of 3.1A (typ). If the current flowing out of LX exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier turns on. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. A synchronous rectifier current limit of -0.6A (typ) protects the device from current flowing into LX. If the negative current limit is exceeded, the synchronous rectifier turns off, forcing the inductor current to flow through the high-side MOSFET body diode, back to the input, until the beginning of the next cycle or until the inductor current drops to zero. The MAX1951A utilizes a pulse-skip mode to prevent overheating during short-circuit output conditions. The device enters pulse-skip mode when the FB voltage drops below 300mV, limiting the current to 3A (typ) and reducing power dissipation. Normal operation resumes upon removal of the short-circuit condition.
Controller Block Function
The MAX1951A step-down converter uses a PWM current-mode control scheme. An open-loop comparator compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope compensation ramp. At each rising edge of the
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
POSITIVE AND NEGATIVE CURRENT LIMITS VCC OSC CLOCK CURRENT SENSE PWM CONTROL RAMP GEN CLAMP SLOPE COMP ERROR SIGNAL THERMAL SHUTDOWN PREBIAS PGND ZEROCROSSING DETECTOR LX IN
FB COMP SOFT-START/ UVLO BANDGAP REF 1.25V gm
DAC
EN
MAX1951A
GND
Figure 1. Functional Diagram
VCC Decoupling Due to the high switching frequency and tight output tolerance (1.5%), decouple VCC with a 0.1F capacitor connected from VCC to GND, and a 10 resistor connected from VCC to IN. Place the capacitor as close as possible to VCC. Soft-Start
The MAX1951A employs digital soft-start circuitry to reduce supply inrush current during startup conditions. When the device exits undervoltage lockout (UVLO) shutdown mode, or restarts following a thermal-overload event, or EN is driven high, the digital soft-start circuitry slowly ramps up the voltage to the error-amplifier noninverting input.
the internal switches to stop switching and forces LX into a high-impedance state. In shutdown, the MAX1951A draws 500A of supply current. The device initiates a soft-start sequence when brought out of shutdown.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation in the device. When the junction temperature exceeds TJ = +165C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 9C, resulting in a pulsed output during continuous overload conditions. Following a thermal-shutdown condition, the soft-start sequence begins.
Safe Startup into Prebiased Output
The MAX1951A can start up safely even with a prebiased output. A zero crossover detection (ZCD) circuit turns on the switches only after the soft-start ramping voltage equals the prebiased output voltage. If the prebiased output voltage is greater than the set voltage, the ZCD circuit turns on the low-side switch (after the soft-start period is over) to discharge the output capacitor until its voltage equals the set voltage.
Undervoltage Lockout
If VCC drops below 2.07V, the UVLO circuit inhibits switching. Once V CC rises above 2.19V, the UVLO clear and the soft-start sequence activates.
Shutdown Mode
Use the enable input, EN, to turn on or off the MAX1951A. Connect EN to VCC for normal operation. Connect EN to GND to place the device in shutdown. Shutdown causes
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
Design Procedure
Adjustable Output Voltage
The MAX1951A provides an adjustable output voltage between 0.8V and VIN. Connect FB to output for 0.8V output. To set the output voltage of the MAX1951A to a voltage greater than VFB (0.8V typ), connect the output to FB and GND using a resistive divider, as shown in Figure 2. Choose R2 between 2k and 20k, and set R3 according to the following equation: R3 = R2 x [(VOUT/VFB) - 1] The MAX1951A PWM circuitry is capable of a stable minimum duty cycle of 18%. This limits the minimum output voltage that can be generated to 0.18 VIN with an absolute minimum of 0.8V. Instability may result for VIN/VOUT ratios below 0.18. use a +20% margin when calculating the RMS current at lower duty cycles. Use ceramic capacitors for their low ESR and equivalent series inductance (ESL). Choose a capacitor that exhibits less than 10C temperature rise at the maximum operating RMS current for optimum long-term reliability. After determining the input capacitor, check the input ripple voltage due to capacitor discharge when the high-side MOSFET turns on. Calculate the input ripple voltage as follows: VIN_RIPPLE = (IOUT x VOUT)/(fSW x VIN x CIN) Keep the input ripple voltage less than 3% of the input voltage.
Output Capacitor Design
The key selection parameters for the output capacitor are capacitance, ESR, ESL, and the voltage rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-DC converter. The output ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor's ESR, and the voltage drop due to the capacitor's ESL. Calculate the output voltage ripple due to the output capacitance, ESR, and ESL as: VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) where the output ripple due to output capacitance, ESR, and ESL is: VRIPPLE(C) = IP-P/(8 x COUT x fSW) VRIPPLE(ESR) = IP-P x ESR VRIPPLE(ESL) = (IP-P/tON) x ESL or (IP-P/tOFF) x ESL, whichever is greater and IP-P the peak-to-peak inductor current is: IP-P = [(VIN - VOUT )/fSW x L)] x VOUT/VIN Use these equations for initial capacitor selection, but determine final values by testing a prototype or evaluation circuit. As a rule, a smaller ripple current results in less output-voltage ripple. Since the inductor ripple current is a factor of the inductor value, the outputvoltage ripple decreases with larger inductance. Use ceramic capacitors for their low ESR and ESL at the switching frequency of the converter. The low ESL of ceramic capacitors makes ripple voltages negligible. Load-transient response depends on the selected output capacitor. During a load transient, the output instantly changes by ESR x ILOAD. Before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time (see the Load Transient graph in the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its
Output Inductor Design
Use a 2H inductor with a minimum 2A-rated DC current for most applications. For best efficiency, use an inductor with a DC resistance of less than 20m and a saturation current greater than 3A (min). See Table 2 for recommended inductors and manufacturers. For most designs, derive a reasonable inductor value (LINIT) from the following equation: LINIT = VOUT x (VIN - VOUT)/(VIN x LIR x IOUT(MAX) x fSW) where fSW is the switching frequency (1MHz typ) of the oscillator. Keep the inductor current ripple percentage LIR between 20% and 40% of the maximum load current for the best compromise of cost, size, and performance. Calculate the maximum inductor current as: IL(MAX) = (1 + LIR/2) x IOUT(MAX) Check the final values of the inductor with the output ripple voltage requirement. The output ripple voltage is given by: VRIPPLE = VOUT x (VIN - VOUT) x ESR/(VIN x LFINAL x fSW) where ESR is the equivalent series resistance of the output capacitors.
Input Capacitor Design
The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit's switching. The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents defined by the following equation: IRMS = (1 VIN ) x (IOUT 2 x VOUT x (VIN - VOUT )) For duty ratios less than 0.5, the input capacitor RMS current is higher than the calculated current. Therefore,
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable
nominal state. The controller response time depends on the closed-loop bandwidth. A higher bandwidth yields a faster response time, thus preventing the output from deviating further from its regulating value. fpEA = 1/(2 x C2 x ROEA) Determine the compensation zero frequency as: fzEA = 1/(2 x C2 x R1) For best stability and response performance, set the closed-loop unity-gain frequency much higher than the modulator pole frequency. In addition, set the closedloop crossover unity-gain frequency less than, or equal to 1/5 of the switching frequency. However, set the maximum zero crossing frequency to less than 1/3 of the zero frequency set by the output capacitance and its ESR when using POSCAP, SPCAP, OSCON, or other electrolytic capacitors. The loop-gain equation at the unity-gain frequency is: GEA(fc) x GMOD(fc) x VFB/VOUT = 1 where GEA(fc) = gmEA x R1, and GMOD(fc) = gmc x RLOAD x fpMOD/fC, where gmEA = 60S. R1 calculated as: R1 = VOUT x K/(gmEA x VFB x GMOD(fc)) where K is the correction factor due to the extra phase introduced by the current loop at high frequencies (>100kHz). K is related to the value of the output capacitance (see Table 1 for values of K vs. C). Set the error-amplifier compensation zero formed by R1 and C2 at the modulator pole frequency at maximum load. C2 is calculated as follows: C2 = (2 x VOUT x COUT/(R1 x IOUT(MAX)) As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly, resulting in a constant closed-loop unitygain frequency. Use the following numerical example to calculate R1 and C2 values of the typical application circuit of Figure 2. VOUT = 1.5V IOUT(MAX) = 2A
MAX1951A
Compensation Design
The double pole formed by the inductor and output capacitor of most voltage-mode controllers introduces a large phase shift that requires an elaborate compensation network to stabilize the control loop. The MAX1951A utilizes a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor, eliminating the double pole caused by the inductor and output capacitor, and greatly simplifying the compensation network. A simple type 1 compensation with single compensation resistor (R1) and compensation capacitor (C2) in Figure 2 creates a stable and high-bandwidth loop. An internal transconductance error amplifier compensates the control loop. Connect a series resistor and capacitor between COMP (the output of the error amplifier) and GND to form a pole-zero pair. The external inductor, internal current-sensing circuitry, output capacitor, and the external compensation circuit determine the loop system stability. Choose the inductor and output capacitor based on performance, size, and cost. Additionally, select the compensation resistor and capacitor to optimize control-loop stability. The component values shown in the typical application circuit (Figure 2) yield stable operation over a broad range of input-to-output voltages. The basic regulator loop consists of a power modulator, an output feedback divider, and an error amplifier. The power modulator has DC gain set by gmc x RLOAD, with a pole-zero pair set by RLOAD, the output capacitor (COUT), and its ESR. The following equations define the power modulator: Modulator gain: GMOD = VOUT/VCOMP = gmc x RLOAD Modulator pole frequency: fpMOD = 1/(2 x x COUT x (RLOAD + ESR)) Modulator zero frequency: fzESR = 1/(2 x x COUT x ESR) where RLOAD = VOUT/IOUT(MAX) and gmc = 4.2S. The feedback divider has a gain of GFB = VFB/VOUT, where VFB is equal to 0.8V. The transconductance error amplifier has a DC gain, GEA(DC), of 70dB. The compensation capacitor, C2, and the output resistance of the error amplifier, R OEA (20M), set the dominant pole. C2 and R1 set a compensation zero. Calculate the dominant pole frequency as:
Table 1. K Value
DESCRIPTION COUT (F) 10 22 K Values are for output inductance from 1.2H 0.55 to 2.2H. Do not use output inductors larger 0.47 than 2.2H. Use fC = 200kHz to calculate R1.
COUT = 10F RESR = 0.010 gmEA = 60S gmc = 4.2S fSWITCH = 1MHz
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable
RLOAD = VOUT/IOUT(MAX) = 1.5V/2A = 0.75 fpMOD = [1/(2 x COUT x (RLOAD + RESR)] = [1/(2 x x10 x10-6 x (0.75 + 0.01)] = 20.9Hz. fzESR = [1/(2 x COUT x RESR)] = [1/(2 x x 10 x10-6 x 0.01)] = 1.59MHz. For a 2H output inductor, pick the closed-loop unitygain crossover frequency (fC) at 200kHz. Determine the power modulator gain at fC: GMOD(fc) = gmc x RLOAD x fpMOD/fC = 4.2 x 0.75 x 20.9kHz/200kHz = 0.33 then: R1 = VO x K/(gmEA x VFB x GMOD(fC)) = (1.5 x 0.55)/(60 x 10-6 x 0.8 x 0.33) 52.3k (1%) C2 = (2 x VOUT x COUT)/R1 x IOUT(MAX) = (2 x 1.5 x 10 x 10-6)/(52.3k x 2) 143pF, choose 150pF, 10% 2) Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current (C1 to IN and C1 to PGND) short. Avoid vias in the switching paths. 4) If possible, connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency and long-term reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close as possible to the IC. 6) Route high-speed switching nodes away from sensitive analog areas (FB, COMP).
MAX1951A
Thermal Considerations
See the MAX1951A Evaluation Kit for an optimized layout example. Thermal performance can be further improved with one of the following options: 1) Increase the copper areas connected to GND, LX, and IN. 2) Provide thermal vias next to GND and IN, to the ground plane and power plane on the back side of PCB with openings in the solder mask next to the vias to provide better thermal conduction. 3) Provide forced-air cooling to further reduce case temperature.
Applications Information
PCB Layout Considerations
Careful PCB layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PCB layout: 1) Place decoupling capacitors as close as possible to the IC. Keep the power ground plane (connected to PGND) and signal ground plane (connected to GND) separate.
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1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
2.6V TO 5.5V IN C4 0.1F R4 10 VCC R1 51.1k C1 10F C2 220pF COMP GND PGND R2 15.0k 1% LX L1 2H 1.5V AT 2A
MAX1951A
FB EN ON OFF R3 13.0k 1%
C3 10F
OUTPUT COMPONENT VALUES VOLTAGE (V) R1 (k) R2 (k) R3 (k) C2 (pF) 470 SHORT OPEN 0.8 10 150 13 15 1.5 52.3 150 31.6 15 2.5 86.6 150 46.4 15 3.3 115
Figure 2. MAX1951A Adjustable Output Typical Application Circuit
______________________________________________________________________________________
11
1MHz, 2A, 2.6V to 5.5V Input, PWM DC-DC Step-Down Regulator with Enable MAX1951A
Table 2. External Components List
COMPONENT (FIGURE 2) L1 FUNCTION Output inductor DESCRIPTION 2H 20% inductor Sumida CDRH4D28-1R8 or TOKO A915AY-2R0M 10F 20%, 6.3V X5R capacitor Taiyo Yuden JMK316BJ106ML or TDK C3216X5R0J106MT 220pF 10%, 50V capacitor Murata GRM1885C1HZZ1JA01 or Taiyo Yuden UMK107CH221KZ 10F 20%, 6.3V X5R capacitor Taiyo Yuden JMK316BJ106ML or TDK C3216X5R0J106MT 0.1F 20%, 16V X7R capacitor Taiyo Yuden EMK107BJ104MA, TDK C1608X7R1C104K, or Murata GRM188R171C104KA01 Figure 2 Figure 2 Figure 2 10 5% resistor
C1
Input filtering capacitor
C2
Compensation capacitor
C3
Output filtering capacitor
C4
VCC bypass capacitor
R1 R2 R3 R4
Loop compensation resistor Feedback resistor Feedback resistor Bypass resistor
Table 3. Component Suppliers
MANUFACTURER Murata Electronics North America, Inc. Sumida Corp. Taiyo Yuden TDK Corp. TOKO America, Inc. WEBSITE www.murata-northamerica.com www.sumida.com www.t-yuden.com www.component.tdk.com www.tokoam.com
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 8 SO PACKAGE CODE S8-6F DOCUMENT NO. 21-0041
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.


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