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IS24C02D IS24C02D 2-WIRE (I2C) 2K-bit Automotive SERIAL EEPROM Copyright (c) 2009 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment, aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance and optimization on the functionality and etc. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products. Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 1 IS24C02D TAbLE Of COnTEnTS features ................................................................................................3 Description ............................................................................................3 functional block Diagram .......................................................................4 Pin Configuration & Description ...............................................................5 Device Operations ..................................................................................5 Absolute Maximum Ratings .....................................................................13 Operating Range ....................................................................................13 DC Characteristics ..................................................................................14 AC Characteristics ..................................................................................14 Ordering Information ...............................................................................16 Packaging Information .............................................................................17 2 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D 2K-bit 2-WIRE AuTOMOTIvE SERIAL CMOS EEPROM ADvAnCED InfORMATIOn AuGuST 2009 fEATuRES * Two-WireSerialInterface,I2CTMcompatible -Bidirectionaldatatransferprotocol * WideVoltageOperation -Vcc=2.7Vto3.6V * Speed -400kHz(2.7V) * Memory:256x8-bit(2Kb) * DataProtectionFeatures -WriteProtectPin -PermanentSoftwareProtection * PageWriteMode(upto16bytes) * LowPower -OperatingCurrent:2mA(3.6V) -StandbyCurrent:6A(3.6V) * RandomorSequentialReadModes * FilteredInputsforNoiseSuppression * SelftimedWritecyclewithautoclear -5msmax.@2.7V * HighReliability -Endurance:1,000,000Cycles -DataRetention:100Years * Automotivetemperaturegrade * Packages:SOICandTSSOP DESCRIPTIOn TheIS24C02Disanelectricallyerasableprogrammable readonlymemorydevicethatutilizesthestandard serial2-wireinterfaceforcommunications.This EEPROMoperatesinawidevoltagerangeof 2.7Vto 3.6V tobecompatiblewithmostapplicationvoltages. TheIS24C02Dhasanembeddedmemoryarrayof 2,048-bits(256x8),andisorganizedin16pagesof16 byteseach.Sopage-writemodeiscapableofupto16 bytes.Inaddition,softwarewrite-protectionfeatureis initiatedwithauniqueirreversibleinstruction.Afterthis commandistransmitted,thefirst128bytesofthearray becomepermanentlyread-only.Thisfeatureisdesigned forspecificapplicationssuchas,DIMMs.ISSIdesigned theIS24C02Dasalow-costandlow-power2-wire EEPROMsolution.Thedeviceisofferedinlead-free, RoHS,halogenfreeorGreen.Theavailablepackage typesare8-pinSOICandTSSOP. TheIS24C02Dmaintainscompatibilitywiththepopular 2-wirebusprotocol,soitiseasytouseinapplications implementingthisbustype.Thesimplebusconsists oftheSerialClockwire(SCL)andtheSerialData wire(SDA).Usingthebus,aMasterdevicesuchas amicrocontrollerisusuallyconnectedtooneormore SlavedevicessuchastheIS24C02D.Thebitstream overtheSDAlineincludesaseriesofbytes,which identifiesaparticularSlavedevice,aninstruction,an addresswithinthatSlavedevice,andaseriesofdata, ifappropriate.TheIS24C02DhasaWriteProtect pin(WP)toallowblockingofanywriteinstruction transmittedoverthebus. Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 3 IS24C02D FUNCTIONAL BLOCK DIAGRAM Vcc HIGH VOLTAGE GENERATOR, TIMING & CONTROL SDA WP SLAVE ADDRESS REGISTER & COMPARATOR A0 A1 A2 WORD ADDRESS COUNTER X DECODER SCL CONTROL LOGIC 00H-7FH ARRAY 80H-FFH Y DECODER GND nMOS ACK Clock DI/O > DATA REGISTER Forapplicationsrelatedinquiries,pleaserefertotheEEPROMApplicationSupportsectionofourwebsite. 4 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D PIN CONFIGURATION 8-Pin SOIC and TSSOP A0 A1 A2 GND 1 2 3 4 8 7 6 5 VCC WP SCL SDA PIn DESCRIPTIOnS A0-A2 SDA SCL WP Vcc GND AddressInputs SerialAddress/DataI/O SerialClockInput WriteProtectInput PowerSupply Ground WP WPistheWriteProtectpin.IftheWPpinistiedtoVcc,the entirearraybecomesWriteProtected,andsoftwarewriteprotectioncannotbeinitiated.WhenWPistiedtoGNDor leftfloating,normalread/writeoperationsareallowedtothe device.Ifthedevicehasalreadyreceivedawrite-protection command,thememoryintherangeof00h-7Fhisread -onlyregardlessofthesettingoftheWPpin. SCL Thisinputclockpinisusedtosynchronizethedatatransfer toandfromthedevice. DEvICE OPERATIOn The IS24C02D features a serial communication and supportsabi-directional2-wirebustransmissionprotocol calledI2CTM. SDA TheSDAisaBi-directionalpinusedtotransferaddresses anddataintoandoutofthedevice.TheSDApinisan opendrainoutputandcanbewireOr'edwithotheropen drainoropencollectoroutputs.TheSDAbusrequiresa pullupresistortoVcc. 2-WIRE buS Thetwo-wirebusisdefinedasaSerialDataline(SDA),and aSerialClockline(SCL). Theprotocoldefinesanydevice thatsendsdataontotheSDAbusasatransmitter,and thereceivingdeviceasareceiver. Thebusiscontrolledby MasterdevicewhichgeneratestheSCL,controlsthebus accessandgeneratestheStopandStartconditions. The IS24C02DistheSlavedeviceonthebus. A0, A1, A2 TheA0,A1,andA2arethedeviceaddressinputsthat arehardwiredorleftunconnectedforhardwareflexibility. Whenpinsarehardwired,asmanyaseightdevicesmay beaddressedonasinglebussystem.Whenthepinsare nothardwired,thedefaultvaluesofA0,A1,andA2are zero. Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 5 IS24C02D The bus Protocol: - Datatransfermaybeinitiatedonlywhenthebusisnot busy - Duringadatatransfer,theSDAlinemustremainstable whenevertheSCLlineishigh. AnychangesintheSDA linewhiletheSCLlineishighwillbeinterpretedasa StartorStopcondition. ThestateoftheSDAlinerepresentsvaliddataafteraStart condition.TheSDAlinemustbestableforthedurationof theHighperiodoftheclocksignal. ThedataontheSDA linemaybechangedduringtheLowperiodoftheclock signal. Thereisoneclockpulseperbitofdata. Eachdata transferisinitiatedwithaStartconditionandterminated withaStopcondition. DEvICE ADDRESSInG The Master begins a transmission by sending a Start condition. The Master then sends the address of the particularSlavedevicesitisrequesting.TheSlavedevice (Fig.5)addressis8bits. ThefourmostsignificantbitsoftheSlavedeviceaddress arefixedas1010fornormalread/writeoperations,and 0110forpermanentwrite-protectionoperations. Thisdevicehasthreeaddressbits(A1,A2,andA0)that allowuptoeightIS24C02Ddevicestosharethe2-wire bus.UponreceivingtheSlaveaddress,thedevice comparesthethreeaddressbitswiththehardwired A2,A1,andA0inputpinstodetermineifitisthe appropriateSlave.IfanyoftheA2-A0pinsisneither biasedtoHighnorLow,internalcircuitrydefaultsthe valuetoLow. ThelastbitoftheSlaveaddressspecifieswhetheraRead orWriteoperationistobeperformed.Whenthisbitisset to1,aReadoperationisselected,andwhensetto0,a Writeoperationisselected. AftertheMastertransmitstheStartconditionandSlave addressbyte(Fig.5),theappropriate2-wireSlave(eg. IS24C02D)willrespondwithACKontheSDAline.The SlavewillpulldowntheSDAontheninthclockcycle, signalingthatitreceivedtheeightbitsofdata.The selectedIS24C02DthenpreparesforaReadorWrite operationbymonitoringthebus. Start Condition TheStartconditionprecedesallcommandstothedevice andisdefinedasaHightoLowtransitionofSDAwhen SCLisHigh. TheIS24C02DmonitorstheSDAandSCL linesandwillnotresponduntiltheStartconditionismet. Stop Condition TheStopconditionisdefinedasaLowtoHightransition ofSDAwhenSCLisHigh.Alloperationsmustendwith aStopcondition. Acknowledge (ACK) Afterasuccessfuldatatransfer,eachreceivingdeviceis requiredtogenerateanACK. TheAcknowledgingdevice pullsdowntheSDAline. Reset TheIS24C02Dcontainsaresetfunctionincasethe 2-wirebustransmissionisaccidentallyinterrupted(eg.a powerloss),orneedstobeterminatedmid-stream.The resetiscausedwhentheMasterdevicecreatesaStart condition.Todothis,itmaybenecessaryfortheMaster devicetomonitortheSDAlinewhilecyclingtheSCLup toninetimes.(ForeachclocksignaltransitiontoHigh, theMasterchecksforaHighlevelonSDA.) Standby Mode Power consumption is reduced in standby mode. The IS24C02Dwillenterstandbymode:a)AtPower-up,and remaininituntilSCLorSDAtoggles;b)FollowingtheStop signalifnowriteoperationisinitiated;orc)Followingany internalwriteoperation. 6 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D WRITE OPERATIOn byte Write IntheByteWritemode,theMasterdevicesendstheStart conditionandtheSlaveaddressinformation(withtheR/W settoZero)totheSlavedevice. AftertheSlavegenerates anACK,theMastersendsabyteaddressthatiswritten intotheaddresspointeroftheIS24C02D. Afterreceiving anotherACKfromtheSlave,theMasterdevicetransmits the data byte to be written into the address memory location. The IS24C02D acknowledges once more and theMastergeneratestheStopcondition,atwhichtimethe devicebeginsitsinternalprogrammingcycle. Whilethis internalcycleisinprogress,thedevicewillnotrespond toanyrequestfromtheMasterdevice. Permanent Write Protection The IS24C02D contains a permanent write protection featurethatisinitiatedbymeansofasoftwarecommand. After the command is transmitted, the protected area becomesirreversiblyread-onlydespitepowerremovaland re-applicationonthedevice.Theaddressrangeofthe128 bytesofthearraythatisaffectedbythisfeatureis00h-7Fh. Onceenabled,thepermanentprotectionisindependent ofthestatusoftheWPpin.(IfWPisraisedtoHigh,the entirearrayisread-only.IfWPislow,theregion00h-7Fh canstillberead-only.) Thesoftwarecommandisinitiatedsimilarlytoanormal bytewriteoperation;however,theslaveaddressbegins withthebits0110(seeFigure5).Thefollowingthreebits areA2-A0.Thelastbitoftheslaveaddress(R/W)is0.If theIS24C02DrespondswithACK,thedevicehasnotyet haditswrite-protectionpermanentlyenabled.Tocomplete thecommand,theMastermusttransmitadummyaddress byte,dummydatabyte,andaStopsignal(seeFigure11). TheWP pin must be Low during this command. Before resuming any other command, the internal write cycle shouldbeobserved. Thestatusofthepermanentwriteprotectioncanbesafely determinedwithoutanychangesbytransmittingthesame Slaveaddressasabove,butwiththelastbit(R/W)setto 1(seeFigure12).Ifthepermanentwriteprotectionhas beenenabled,theIS24C02Dwillnotacknowledgeany slaveaddressstartingwithbits0110(seeFigure5). Page Write TheIS24C02Discapableof16-bytePage-Writeoperation. APage-WriteisinitiatedinthesamemannerasaByte Write,butinsteadofterminatingtheinternalWritecycle afterthefirstdatabyteistransferred,theMasterdevicecan transmitupto15morebytes. Afterthereceiptofeachdata byte,theIS24C02DrespondsimmediatelywithanACK onSDAline,andthefourlowerorderdatabyteaddress bitsareinternallyincrementedbyone,whilethehigher orderbitsofthedatabyteaddressremainconstant. Ifa byteaddressisincrementedfromthelastbyteofapage, itreturnstothefirstbyteofthatpage.IftheMasterdevice shouldtransmitmorethan16bytespriortoissuingthe Stopcondition,theaddresscounterwill"rollover,"andthe previously written data will be overwritten. Once all 16 bytesarereceivedandtheStopconditionhasbeensent bytheMaster,theinternalprogrammingcyclebegins.At thispoint,allreceiveddataiswrittentotheIS24C02Dina singleWritecycle.Allinputsaredisableduntilcompletion oftheinternalWritecycle. Acknowledge (ACK) Polling Thedisablingoftheinputscanbeusedtotakeadvantage ofthetypicalWritecycletime. OncetheStopcondition isissuedtoindicatetheendofthehost'sWriteoperation, theIS24C02DinitiatestheinternalWritecycle.ACKpolling canbeinitiatedimmediately. ThisinvolvesissuingtheStart conditionfollowedbytheSlaveaddressforaWriteoperation. IftheIS24C02DisstillbusywiththeWriteoperation,no ACKwillbereturned. IftheIS24C02Dhascompletedthe Writeoperation,anACKwillbereturnedandthehostcan thenproceedwiththenextReadorWriteoperation. Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 7 IS24C02D READ OPERATIOn Read operations are initiated in the same manner as Writeoperations,exceptthatthe(R/W)bitoftheSlave address is set to "1". There are three Read operation options:currentaddressread,randomaddressreadand sequentialread. Sequential Read Sequential Reads can be initiated as either a Current Address Read or Random Address Read. After the IS24C02D sends the initial byte sequence, the Master devicerespondswithanACKindicatingitrequiresadditional data from the IS24C02D. The IS24C02D continues to output data for each ACK received. The Master device terminatesthesequentialReadoperationbypullingSDA High (no ACK) indicating the last data byte to be read, followedbyaStopcondition. Thedataoutputissequential,withthedatafromaddressn followedbythedatafromaddressn+1,...etc. Theaddress counterincrementsbyoneautomatically,allowingtheentire memorycontentstobeseriallyreadduringsequentialRead operations. Whenthememoryaddressboundary255is reached, the address counter"rolls over" to address 0, andtheIS24C02DcontinuestooutputdataforeachACK received.(RefertoFigure10.SequentialReadOperation StartingwithaRandomAddressReadDiagram.) Current Address Read TheIS24C02Dcontainsaninternaladdresscounter whichmaintainstheaddressofthelastbyteaccessed, incrementedbyone. Forexample,iftheprevious operationiseitheraReadorWriteoperationaddressed totheaddresslocationn,theinternaladdresscounter wouldincrementtoaddresslocationn+1. Whenthe IS24C02DreceivestheDeviceAddressingBytewitha Readoperation(R/Wbitsetto"1"),itwillrespondan ACKandtransmitthe8-bitdatabytestoredataddress locationn+1. TheMastershouldnotacknowledge thetransferbutshouldgenerateaStopconditionso theIS24C02Ddiscontinuestransmission. Ifthelast byteofthememorywasthepreviousaccess,thedata fromlocation'0'willbetransmitted.(RefertoFigure8. CurrentAddressReadDiagram.) Random Address Read SelectiveReadoperationsallowtheMasterdevicetoselect atrandomanymemorylocationforaReadoperation. The Master device first performs a 'dummy'Write operation by sending the Start condition, Slave address and wordaddressofthelocationitwishestoread.Afterthe IS24C02Dacknowledgesthewordaddress,theMaster deviceresendstheStartconditionandtheSlaveaddress, thistimewiththeR/Wbitsettoone. TheIS24C02Dthen respondswithitsACKandsendsthedatarequested. The Master device does not send an ACK but will generate a Stop condition. (Refer to Figure 9. Random Address ReadDiagram.) 8 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D figure 1. Typical System bus Configuration Vcc SDA SCL Master Transmitter/ Receiver IS24C02D figure 2. Output Acknowledge SCL from Master 1 8 9 Data Output from Transmitter tAA tAA Data Output from Receiver ACK figure 3. Start and Stop Conditions SDA Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 START Condition SCL STOP Condition 9 IS24C02D figure 4. Data validity Protocol Data Change SCL Data Stable Data Stable SDA figure 5. Slave Address BIT 7 6 5 4 3 2 1 0 1 BIT 7 0 6 1 5 0 4 A2 3 A1 2 A0 1 R/W 0 Normal Instruction Permanent Write Protect Instruction 0 1 1 0 A2 A1 A0 R/W figure 6. byte Write S T A R T W R I T E* A C K L S B R/W S T O *P A C K SDA Bus Activity Device Address Word Address * A C K Data M S B M S B * Acknowledges provided by the slave regardless of hardware or software Write Protection. figure 7. Page Write S T A R T W R I T E * Word Address (n) * A A C C K K L S B R/W S T O *P A C K SDA Bus Activity Device Address Data (n) * A C K Data (n+1) * A C K Data (n+15) M S B * Acknowledges provided by the slave regardless of hardware or software Write Protection. 10 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D figure 8. Current Address Read S T A R T R E A D A C K M S B L S B R/W N O A C K S T O P SDA Bus Activity Device Address Data figure 9. Random Address Read S T A R T W R I T E S T A R T Device Address Word Address (n) A C K A C K Device Address SDA Bus Activity R E A D Data n A C K N O A C K S T O P M S B L S B R/W DUMMY WRITE figure 10. Sequential Read R E A D A C K S T O P Device Address SDA Bus Activity Data Byte n A C K Data Byte n+1 A C K Data Byte n+2 A C K Data Byte n+X N O R/W A C K Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 11 IS24C02D fIGuRE 11. PERMAnEnT WRITE PROTECTIOn InITIATIOn SDA Bus Activity S T A R T W R I Device T Data Address E * Word Address A A A C # # ## # # # #C # # # ## # # # C K K K M L M S S S B B B R/W S T O P * The slave does not provide an acknowledgement if the permanent write protection is already enabled. # Don't care bits are required. fIGuRE 12. PERMAnEnT WRITE PROTECTIOn vERIfICATIOn SDA Bus Activity S T A R T Device Address RS ET AO D*P A C K L S B R/W M S B *Theslavedoesnotprovideanacknowledgementifthepermanentwriteprotectionisalreadyenabled. 12 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D AbSOLuTE MAXIMuM RATInGS(1) Symbol Vs Vp Tbias TsTg iouT Parameter SupplyVoltage VoltageonAnyPin TemperatureUnderBias StorageTemperature OutputCurrent value -0.5to+6.5 -0.5toVcc+0.5 -55to+125 -65to+150 5 unit V V C C mA notes: 1.StressgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisastressratingonlyandfunctionaloperationofthe deviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsections ofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsfor extendedperiodsmayaffectreliability. OPERATInG RAnGE (IS24C02D-3) vcc 2.7Vto3.6V Ambient Temperature -40Cto+85C Range Automotive CAPACITAnCE(1,2) Symbol Cin CouT Parameter InputCapacitance OutputCapacitance Conditions Vin = 0V VouT = 0V Max. 6 8 unit pF pF notes: 1.Testedinitiallyandafteranydesignorprocesschangesthatmayaffecttheseparameters. 2. Testconditions:Ta = 25C, f=400KHz,Vcc=3.6V. Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 13 IS24C02D DC ELECTRICAL CHARACTERISTICS Ta=-40oCto+85oC Symbol iCC1 iCC2 isb Vol Vih Vil ili ilo Parameter OperatingCurrent OperatingCurrent StandbyCurrent OutputLowVoltage InputHighVoltage InputLowVoltage InputLeakageCurrent OutputLeakageCurrent Test Conditions Readat400KHz(Vcc=3.6V) Writeat400KHz(Vcc=3.6V) Vcc=3.6V VCC = 2.7V,iol = 3mA Vin = VCC max. Min. Max. -- 2.0 -- 3.0 -- 6 -- 0.4 VCC x 0.7 VCC + 0.5 -1.0 VCC x 0.3 -- 3 -- 3 unit mA mA A V V V A A notes: Vil minandVih maxarereferenceonlyandarenottested AC ELECTRICAL CHARACTERISTICS Automotive(Ta =-40oCto+85oC) 2.7v vcc < 3.6v Symbol fsCl T tlow thigh tbuf tsu:sTa tsu:sTo thd:sTa thd:sTo tsu:daT thd:daT tsu:wp thd:wp tdh taa tr tf twr Parameter SCLClockFrequency NoiseSuppressionTime(1) ClockLowPeriod ClockHighPeriod BusFreeTimeBeforeNewTransmission(1) StartConditionSetupTime StopConditionSetupTime StartConditionHoldTime StopConditionHoldTime DataInSetupTime DataInHoldTime WPpinSetupTime WPpinHoldTime DataOutHoldTime(SCLLowtoSDADataOutChange) ClocktoOutput(SCLLowtoSDADataOutValid) SCLandSDARiseTime (1) Min. 0 -- Max. 400 50 -- -- -- -- -- -- -- -- -- -- -- -- unit KHz ns s s s s s s s ns ns s s ns ns ns ns ms 1.2 0.6 1.2 0.6 0.6 0.6 0.6 100 0 0.6 1.2 50 -- -- -- 50 900 300 300 10 SCLandSDAFallTime(1) WriteCycleTime note: 1.Theseparametersarecharacterizedbutnot100%tested. 14 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D fIGuRE 13. AC WAvEfORMS tR tF tHIGH tLOW tSU:STO SCL tSU:STA tHD:STA tHD:DAT tSU:DAT tBUF SDAIN tAA tDH SDAOUT tSU:WP tHD:WP WP fIGuRE 14. WRITE CyCLE TIMInG SCL SDA 8th BIT WORD n ACK tWR STOP Condition START Condition Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 15 IS24C02D ORDERInG InfORMATIOn Automotive (A1) Grade: -40C to +85C voltage Range 2.7Vto3.6V Part number IS24C02D-3ZLA1-TR Package Type (8-pin) 3x4.4mmTSSOP IS24C02D-3GLA1-TR 150-milSOIC(JEDEC) * 1. Contact ISSI Sales Representatives for availability and other package information. 2. The listed part numbers are packed in tape and reel "-TR" (4K per reel). 3. For tube/bulk packaging, remove "-TR" at the end of the P/N. 4. Refer to ISSI website for related declaration document on lead free, RoHS, halogen free, or Green, whichever is applicable. 16 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 IS24C02D Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 17 IS24C02D 18 Integrated Silicon Solution, Inc. -- www.issi.com Rev. 00A 07/27/09 |
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