 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| ESDAVLC8-1BM2, ESDAVLC8-1BT2 Single line low capacitance TransilTM for ESD protection Features Single line bidirectional protection Breakdown voltage = 8.5 V min. Very low capacitance = 4.5 pF @ 0 V Lead-free packages "Halogen-free" according to ECOPACK(R)2 SOD882 ESDAVLC8-1BM2 SOD882T ESDAVLC8-1BT2 Benefits Very low capacitance for optimized data integrity Very low reverse current < 50 nA Low PCB space consumption: 0.6 mm2 max High reliability offered by monolithic integration Figure 1. Functional diagram Complies with the following standards: I/O1 IEC 61000-4-2 level 4 - 15 kV (air discharge) - 8 kV (contact discharge) MIL STD 883G - Method 3015-7: class 3 - HBM (human body model) I/O2 Applications Where transient overvoltage protection in ESD sensitive equipment is required, such as: Description The ESDAVLC8-1BM2 and ESDAVLC8-1BT2 are bidirectional single line TVS diodes designed to protect datalines or other I/O ports against ESD transients. The devices are ideal for applications where both printed circuit board space and power absorption capability are required. Computers Printers Communication systems Cellular phone handsets and accessories Video equipment TM: Transil is a trademark of STMicroelectronics January 2010 Doc ID 16937 Rev 1 1/13 www.st.com 13 Characteristics ESDAVLC8-1BM2, ESDAVLC8-1BT2 1 Characteristics Table 1. Symbol VPP(1) PPP(1) IPP TOP Tstg TL Absolute maximum ratings (Tamb = 25 C) Parameter IEC 61000-4-2 contact discharge IEC 61000-4-2 air discharge MIL STD 883G - Method 3015-7: class 3 Tj initial = Tamb Value 17 17 25 30 1.3 - 55 to + 150 - 65 to + 150 260 Unit Peak pulse voltage kV W A C C C Peak pulse power dissipation (8/20 s) Peak pulse current (8/20 s) Operating junction temperature range Storage temperature range Maximum lead temperature for soldering during 10 s 1. For a surge greater than the maximum values, the diode will fail in short-circuit. Figure 2. Symbol VBR VCL IRM VRM IPP IR IPP RI/O Cline Electrical characteristics (definitions) Parameter Breakdown voltage Clamping voltage Leakage current @ VRM Stand-off voltage Peak pulse current Breakdown current Forward current Series resistanc between input and output Input capacitance per line I = = = = = = = = = VBR VRM IR IRM IRM IR VRM VBR V Table 2. Symbol VBR IRM Rd Cline Electrical characteristics (values, Tamb = 25 C) Test condition From pin1 to pin2, IR = 1 mA direct From pin2 to pin1, IR = 1 mA reverse VRM = 3 V Square pulse, IPP = 1 A tp = 2.5 s F = 1 MHz, VR = 0 V 2 4.5 5.5 Min. 14.5 8.5 Typ. 17 V 11 50 nA pF Max. Unit 2/13 Doc ID 16937 Rev 1 ESDAVLC8-1BM2, ESDAVLC8-1BT2 Characteristics Figure 3. Relative variation of peak pulse power versus initial junction temperature Figure 4. Junction capacitance versus reverse voltage applied (typical values, direct and reverse) F = 1 MHz VOSC= 30 mVRMS Tj = 25 C 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 PPP[Tjinitial] /PPP[Tjinitial = 25 C] 5 C(pF) 4 3 2 1 Tj (C) 0 25 50 75 100 125 150 0 VLINE (V) 0 1 2 3 4 5 6 Figure 5. Peak pulse power versus Figure 6. exponential pulse duration (direct) PPP (W) Peak pulse power versus exponential pulse duration (reverse) 10000 PPP (W) 10000 1000 1000 100 100 10 10 1 1 10 100 tP (s) 1000 1 1 10 100 tP (s) 1000 Figure 7. Clamping voltage versus peak pulse current (typical values, exponential waveform, direct) Figure 8. Clamping voltage versus peak pulse current (typical values, exponential waveform, reverse) 10.0 IPP (A) 10.0 IPP (A) 1.0 1.0 0.1 16 18 VCL (V) 0.1 20 VCL (V) 10 12 14 16 Doc ID 16937 Rev 1 3/13 Characteristics ESDAVLC8-1BM2, ESDAVLC8-1BT2 Figure 9. Relative variation of leakage current versus junction temperature Figure 10. Relative variation of leakage current versus junction temperature 1000 1000 IR [Tj] /IR [Tj = 25C] (typical values - direct) IR [Tj] /IR [Tj = 25C] (typical values - reverse) 100 100 10 10 1 25 50 75 100 125 Tj (C) 150 1 25 50 75 100 125 Tj (C) 150 Figure 11. ESD response to IEC 61000-4-2 (+15kV air discharge) 5 V/Div Figure 12. ESD response to IEC 61000-4-2 (-15kV air discharge) 5 V/Div C2 C2 100 ns/Div 100 ns/Div Figure 13. S21 attenuation measurement result 0 -5 -10 -15 -20 -25 -30 100k 1M Figure 14. Static characteristic dB , Direct Reverse F (Hz) 10M 100M 1G 4/13 Doc ID 16937 Rev 1 ESDAVLC8-1BM2, ESDAVLC8-1BT2 Ordering information scheme 2 Ordering information scheme Figure 15. Ordering information scheme ESDA VLC ESD array Very low capacitance Breakdown voltage 8 = 8.5 Volts min Number of lines Directional B = Bidirectional Package M2 = SOD882 T2 = Thin SOD882 8 - 1 B x2 Doc ID 16937 Rev 1 5/13 Package information ESDAVLC8-1BM2, ESDAVLC8-1BT2 3 Package information Epoxy meets UL94, V0 Lead-free packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Figure 16. SOD882 dimension definitions D INDEX AREA (D/2 x E/2) E A A1 b1 INDEX AREA (D/2 x E/2) b2 L1 OPTIONAL PIN # 1 ID L2 e Table 3. SOD882 dimension values Dimensions Ref. Min. A A1 b1 b2 D E e L1 L2 0.45 0.45 0.40 0.00 0.20 0.20 Millimeters Typ. 0.47 Max. 0.50 0.05 0.25 0.25 1.00 0.60 0.65 0.50 0.50 0.55 0.55 0.018 0.018 0.30 0.30 Min. 0.016 0.000 0.008 0.008 Inches Typ. 0.019 Max. 0.020 0.002 0.010 0.010 0.039 0.024 0.026 0.020 0.020 0.022 0.022 0.012 0.012 6/13 Doc ID 16937 Rev 1 ESDAVLC8-1BM2, ESDAVLC8-1BT2 Package information Figure 17. SOD882 footprint in mm (inches) Figure 18. SOD882 marking 0.55 0.022 0.55 0.022 0.020 0.50 Pin1 I Pin 2 0.40 0.016 Note: Product marking may be rotated by 90 for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 19. SOD882T dimension definitions D INDEX AREA (D/2 x E/2) E A b1 INDEX AREA (D/2 x E/2) A1 b2 L1 OPTIONAL PIN # 1 ID L2 e Table 4. SOD882T dimension values Dimensions Ref. Min. A A1 b1 b2 D E e L1 L2 0.45 0.45 0.30 0.00 0.20 0.20 Millimeters Typ. Max. 0.40 0.05 0.25 0.25 1.00 0.60 0.65 0.50 0.50 0.55 0.55 0.018 0.018 0.30 0.30 Min. 0.012 0.000 0.008 0.008 Inches Typ. Max. 0.016 0.002 0.010 0.010 0.039 0.024 0.026 0.020 0.020 0.022 0.022 0.012 0.012 Doc ID 16937 Rev 1 7/13 Package information ESDAVLC8-1BM2, ESDAVLC8-1BT2 Figure 20. SOD882T footprint Figure 21. SOD882T marking 0.55 0.022 0.55 0.022 0.020 0.50 Pin1 J Pin 2 0.40 0.016 Note: Product marking may be rotated by 90 for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 22. Tape and reel specifications 0.20 0.05 1.15 0.05 8.0 + 0.3 /-0.1 0.59 0.04 0.70 0.05 2.0 0.10 All dimensions in mm User direction of unreeling 8/13 Doc ID 16937 Rev 1 3.5 - 0.05 X X X X X X X 1.75 0.1 Cathode bar 2.0 0.05 4.0 0.1 O 1.50 0.10 ESDAVLC8-1BM2, ESDAVLC8-1BT2 Recommendation on PCB assembly 4 4.1 Recommendation on PCB assembly Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 23. Stencil opening dimensions L T W b) General design rule Stencil thickness (T) = 75 ~ 125 m W Aspect Ratio = ---- 1.5 T LxW Aspect Area = --------------------------- 0.66 2T ( L + W ) 2. Reference design a) b) c) Stencil opening thickness: 100 m Stencil opening for central exposed pad: Opening to footprint ratio is 50%. Stencil opening for leads: Opening to footprint ratio is 90%. Figure 24. Recommended stencil window position Package footprint Lead footprint on PCB Lead footprint on PCB Stencil window position 0.39 mm Stencil window position 0.45 mm 0.05 mm 0.05 mm Doc ID 16937 Rev 1 9/13 Recommendation on PCB assembly ESDAVLC8-1BM2, ESDAVLC8-1BT2 4.2 Solder paste 1. 2. 3. 4. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. "No clean" solder paste is recommended. Offers a high tack force to resist component movement during high speed. Solder paste with fine particles: powder particle size is 20-45 m. 4.3 Placement 1. 2. 3. 4. Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. Standard tolerance of 0.05 mm is recommended. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 5. 6. 4.4 PCB design preference 1. 2. To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 10/13 Doc ID 16937 Rev 1 ESDAVLC8-1BM2, ESDAVLC8-1BT2 Recommendation on PCB assembly 4.5 Reflow profile Figure 25. ST ECOPACK(R) recommended soldering reflow profile for PCB mounting Note: Minimize air convection currents in the reflow oven to avoid component movement. Doc ID 16937 Rev 1 11/13 Ordering information ESDAVLC8-1BM2, ESDAVLC8-1BT2 5 Ordering information Table 5. Ordering information Marking(1) I J Package SOD882 SOD882T Weight 0.92 mg 0.76 mg Base qty 12000 12000 Delivery mode Tape and reel Tape and reel Order code ESDAVLC8-1BM2 ESDAVLC8-1BT2 1. The marking can be rotated by 90 to diferentiate assembly location 6 Revision history Table 6. Date 22-Jan-2010 Document revision history Revision 1 Initial release. Changes 12/13 Doc ID 16937 Rev 1 ESDAVLC8-1BM2, ESDAVLC8-1BT2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 16937 Rev 1 13/13 |
Price & Availability of ESDAVLC8-1BM2
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |