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Micropower RRIO Operational Amplifier ADA4092-4
FEATURES
Single-supply operation: 2.7 V to 36 V Wide input voltage range Rail-to-rail output swing Low supply current: 200 A/amplifier Wide bandwidth: 1.4 MHz High phase margin: 69 Slew rate: 0.4 V/s Low offset voltage: 1.50 mV maximum No phase reversal Overvoltage protection (OVP) 25 V above/below supply rails at 5 V 12 V above/below supply rails at 15 V
PIN CONFIGURATION
OUTA 1 -INA +INA
2 3 14 13
OUTD -IND +IND -V +INC -INC OUTC
08803-001
ADA4092-4
TOP VIEW (Not to Scale)
12 11 10 9 8
+V 4 +INB 5 -INB OUTB
6 7
Figure 1. 14-Lead TSSOP (RU-14)
APPLICATIONS
Industrial process control Battery-powered instrumentation Power supply control and protection Telecommunications Remote sensors Low voltage strain gage amplifiers DAC output amplifiers
GENERAL DESCRIPTION
The ADA4092-4 quad is a micropower, single-supply, 1.4 MHz bandwidth amplifier featuring rail-to-rail inputs and outputs. It is guaranteed to operate from a +2.7 V to +30 V single supply as well as from 1.35 V to 15 V dual supplies. The ADA4092-4 features a unique input stage that allows the input voltage to exceed either supply safely without any phase reversal or latch-up; this is called overvoltage protection (OVP). Applications for these amplifiers include portable telecommunications equipment, power supply control and protection, and interface for transducers with wide output ranges. Sensors requiring a rail-to-rail input amplifier include Hall effect, piezoelectric, and resistive transducers. The ability to swing rail-to-rail at both the input and output enables designers, for example, to build multistage filters in single-supply systems and to maintain high signal-to-noise ratios (SNR). The ADA4092-4 is specified over the extended industrial temperature range of -40C to +125C. The ADA4092-4 is part of the growing selection of 36 V, low power op amps from Analog Devices, Inc., see Table 1. The ADA4092-4 is available in the 14-lead TSSOP surface-mount package. Table 1. Low Power, 36 V Operational Amplifiers
Family Single Dual Quad Rail-to-Rail I/O RRIO Precision ADA4091-2 ADA4091-4 PJFET AD8682 AD8684 Low Noise OP1177 OP2177 OP4177
ADA4092-4
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 (c)2010 Analog Devices, Inc. All rights reserved.
ADA4092-4 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configuration ............................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Specifications ............................................................... 3 Absolute Maximum Ratings ............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution...................................................................................6 Typical Performance Characteristics ..............................................7 Theory of Operation ...................................................................... 15 Input Stage ................................................................................... 15 Output Stage................................................................................ 15 Input Overvoltage Protection ................................................... 16 Comparator Operation .............................................................. 16 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 17
REVISION HISTORY
5/10--Rev. 0 to Rev. A Changes to Data Sheet Title, General Description, and Table 1 ......................................................................................... 1 4/10--Revision 0: Initial Version
Rev. A | Page 2 of 20
ADA4092-4 SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
VSY = 1.5 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol VOS -40C TA +125C VOS/T IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain IVR CMRR AVO VCM = -1.5 V to +1.5 V -40C TA +125C RL = 100 k, VO = -1.2 V to +1.2 V -40C TA +125C RL = 10 k, VO = -1.2 V to +1.2 V -40C TA +125C RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C to +125C RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C Source/sink f = 1 MHz, AV = +1 VSY = 2.7 V to 36 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 100 k, CL = 30 pF To 0.01% Test Conditions/Comments Min -1.5 -2.5 -60 -60 -275 -4 -5 -75 -1.5 70 68 106 101 92 85 1.485 1.480 1.470 1.455 Typ +0.2 3 -45 +60 +275 +4 +5 +75 +1.5 Max +1.5 +2.5 Unit mV mV V/C nA nA nA nA nA nA V dB dB dB dB dB dB V V V V V V V V mA dB dB A A V/s s MHz Degrees V p-p nV/Hz
+1
85 113 94
OUTPUT CHARACTERISTICS Output Voltage High
VOH
1.495 1.480 -1.497 -1.495 30 130 -1.490 -1.480 -1.485 -1.475
Output Voltage Low
VOL
Short-Circuit Limit Closed-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density
ISC ZOUT PSRR ISY
98 90
112 165 200 300
SR tS GBP M en p-p en
0.4 25 1.2 66 0.8 30
0.1 Hz to 10 Hz f = 1 kHz
Rev. A | Page 3 of 20
ADA4092-4
VSY = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 3.
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol VOS -40C TA +125C VOS/T IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain IVR CMRR AVO VCM = -5.0 V to +5.0 V -40C TA +125C RL = 100 k, VO = 4.7 V -40C TA +125C RL = 10 k, VO = 4.7 V -40C TA +125C RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C Source/sink f = 1 MHz, AV = +1 VSY = 2.7 V to 36 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 100 k, CL = 30 pF To 0.01% Test Conditions/Comments Min -1.5 -2.5 -60 -80 -350 -4 -7 -100 -5 82 78 113 106 98 90 4.980 4.975 4.945 4.900 Typ +0.2 3 -53 +80 +350 +4 +7 +100 +5 Max +1.5 +2.5 Unit mV mV V/C nA nA nA nA nA nA V dB dB dB dB dB dB V V V V V V V V mA dB dB A A V/s s MHz Degrees V p-p nV/Hz
+1
95 117 100
OUTPUT CHARACTERISTICS Output Voltage High
VOH
4.990 4.960 -4.997 -4.990 20 90 -4.990 -4.980 -4.980 -4.975
Output Voltage Low
VOL
Short-Circuit Limit Closed-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density
ISC ZOUT PSRR ISY
98 90
112 180 225 300
SR tS GBP M en p-p en
0.4 25 1.3 67 0.8 30
0.1 Hz to 10 Hz f = 1 kHz
Rev. A | Page 4 of 20
ADA4092-4
VSY = 15.0 V, VCM = 0 V, VO = 0 V, TA = 25C, unless otherwise noted. Table 4.
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Symbol VOS -40C TA +125C VOS/T IB -40C TA +85C -40C TA +125C Input Offset Current IOS -40C TA +85C -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain IVR CMRR AVO VCM = -15.0 V to +15.0 V -40C TA +125C RL = 100 k, VO = 14.7 V -40C TA +125C RL = 10 k, VO = 14.7 V -40C TA +125C RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C RL = 100 k to GND -40C TA +125C RL = 10 k to GND -40C TA +125C Source/sink f = 1 MHz, AV = +1 VSY = 2.7 V to 36 V -40C TA +125C IO = 0 mA -40C TA +125C RL = 100 k, CL = 30 pF To 0.01% Test Conditions/Comments Min -1.5 -2.5 -60 -80 -500 -4 -10 -140 -15 90 87 116 108 102 93 14.970 14.950 14.900 14.800 Typ +0.2 3 -50 +80 +500 +4 +10 +140 +15 Max +1.5 +2.5 Unit mV mV V/C nA nA nA nA nA nA V dB dB dB dB dB dB V V V V V V V V mA dB dB A A V/s s MHz Degrees dB V p-p nV/Hz
+1
103 118 104
OUTPUT CHARACTERISTICS Output Voltage High
VOH
14.980 14.915 -14.985 -14.970 20 68 -14.980 -14.965 -14.950 -14.940
Output Voltage Low
VOL
Short-Circuit Limit Closed-Loop Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier DYNAMIC PERFORMANCE Slew Rate Settling Time Gain Bandwidth Product Phase Margin Channel Separation NOISE PERFORMANCE Voltage Noise Voltage Noise Density
ISC ZOUT PSRR ISY
98 90
112 200 250 350
SR tS GBP M CS en p-p en
f = 1 kHz 0.1 Hz to 10 Hz f = 1 kHz
0.4 25 1.4 69 100 0.8 30
Rev. A | Page 5 of 20
ADA4092-4 ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Supply Voltage Input Voltage Differential Input Voltage Input Current Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) Rating 36 V Refer to the Input Overvoltage Protection section VSY 5 mA Indefinite -65C to +150C -40C to +125C -65C to +150C 300C
THERMAL RESISTANCE
JA is specified for the device soldered on a 4-layer JEDEC standard printed circuit board (PCB) with zero airflow. Table 6. Thermal Resistance
Package Type 14-Lead TSSOP (RU-14) JA 112 JC 35 Unit C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. A | Page 6 of 20
ADA4092-4 TYPICAL PERFORMANCE CHARACTERISTICS
180 160 140 ADA4092-4 VSY = 1.5V TA = 25C
40 35 ADA4092-4 VSY = 1.5V TA = 25C
120 100 80 60 40 20 0
NUMBER OF AMPLIFIERS
30 25 20 15 10 5
08803-005 08803-007 08803-006
NUMBER OF PARTS
0
200
400
600
-800
-600
-400
-200
800
1000
-1200
-1000
1200
-2
08803-002
-1
0
1
2 3 4 TCVOS (V/C)
5
6
7
8
OFFSET VOLTAGE (V)
Figure 2. Input Offset Voltage Distribution, 3 V
180 160 140 ADA4092-4 VSY = 5V TA = 25C
70
0
Figure 5. TCVOS Distribution, 3 V
60
ADA4092-4 VSY = 5V TA = 25C
NUMBER OF AMPLIFIERS
NUMBER OF PARTS
50
120 100 80 60 40 20 0
40
30
20
10
0
200
400
600
800
1000
-800
-600
-400
-1200
-1000
-200
1200
-2
08803-003
-1
0
1
2 3 4 TCVOS (V/C)
5
6
7
8
OFFSET VOLTAGE (V)
0
Figure 3. Input Offset Voltage Distribution, 10 V
180 160 140 ADA4092-4 VSY = 15V TA = 25C
70
Figure 6. TCVOS Distribution, 10 V
60
ADA4092-4 VSY = 15V TA = 25C
NUMBER OF AMPLIFIERS
NUMBER OF PARTS
50
120 100 80 60 40 20
40
30
20
10
0
200
400
600
800
1000
-800
-600
-400
-1200
-1000
-200
1200
-2
08803-004
-1
0
1
2 3 4 TCVOS (V/C)
5
6
7
8
OFFSET VOLTAGE (V)
0
Figure 4. Input Offset Voltage Distribution, 30 V
Rev. A | Page 7 of 20
Figure 7. TCVOS Distribution, 30 V
ADA4092-4
600
60
500
40
400
VOS (V)
20
300 ADA4092-4 VSY = 1.5V TA = 25C
IB (nA)
ADA4092-4 VSY = 1.5V T = 25C
IOS
IB-
0
200
100
-20 IB+ -40 -1.5
08803-008
-1.0
-0.5
0 VCM (V)
0.5
1.0
1.5
-1.0
-0.5
0 VCM (V)
0.5
1.0
1.5
Figure 8. Input Offset Voltage vs. Common-Mode Voltage, 3 V
600
Figure 11. Input Bias Current vs. Common-Mode Voltage, 3 V
60
500
40
ADA4092-4 VSY = 5V T = 25C
400
VOS (V)
20
IB (nA)
300 ADA4092-4 VSY = 5V TA = 25C
IOS 0 IB- -20 IB+
200
100
08803-009
-4
-3
-2
-1
0 1 VCM (V)
2
3
4
5
-4
-3
-2
-1
0 VCM (V)
1
2
3
4
5
Figure 9. Input Offset Voltage vs. Common-Mode Voltage, 10 V
600
Figure 12. Input Bias Current vs. Common-Mode Voltage, 10 V
60
500
40 ADA4092-4 VSY = 15V T = 25C
400
VOS (V)
20
300 ADA4092-4 VSY = 15V TA = 25C
IOS
IB (nA)
0
200
IB-
100
-20
IB+
08803-010
-10
-5
0 VCM (V)
5
10
15
-10
-05
0 VCM (V)
5
10
15
Figure 10. Input Offset Voltage vs. Common-Mode Voltage, 30 V
Figure 13. Input Bias Current vs. Common-Mode Voltage, 30 V
Rev. A | Page 8 of 20
08803-013
0 -15
-40 -15
08803-012
0 -5
-40 -5
08803-011
0 -1.5
ADA4092-4
10k ADA4092-4 VSY = 1.5V TA = 25C 1k
120 100
GAIN (dB) AND PHASE (Degrees)
PHASE 80 60 40 20 0 -20 -40 -60 ADA4092-4 VSY = 1.5V TA = 25C
08803-017 08803-019
08803-018
VOUT TO RAIL (mV)
GAIN
100
VDD - VOH 10 VOL - VSS
08803-014
1 0.001
-80
0.01 0.1 1 10 100
1k
10k
100k FREQUENCY (Hz)
1M
10M
LOAD CURRENT (mA)
Figure 14. Dropout Voltage vs. Load Current, 3 V
10k ADA4092-4 VSY = 5V TA = 25C 1k
Figure 17. Open-Loop Gain and Phase vs. Frequency, 3 V
120 100
GAIN (dB) AND PHASE (Degrees)
80 60 40 20 0 -20 -40 -60 -80 ADA4092-4 VSY = 5V TA = 25C GAIN
PHASE
VOUT TO RAIL (mV)
100 VDD - VOH VOL - VSS 10
0.01
0.1
1
10
100
08803-015
1 0.001
-100 1k 10k 100k FREQUENCY (Hz) 1M 10M
LOAD CURRENT (mA)
Figure 15. Dropout Voltage vs. Load Current, 10 V
10k ADA4092-4 VSY = 15V TA = 25C 1k
Figure 18. Open-Loop Gain and Phase vs. Frequency, 10 V
140 120
GAIN (dB) AND PHASE (Degrees)
100 PHASE 80 60 40 20 0 -20 -40 -60 ADA4092-4 VSY = 15V TA = 25C GAIN
VOUT TO RAIL (mV)
100
VDD - VOH 10 VOL - VSS
0.01
0.1
1
10
100
08803-016
1 0.001
-80 1k 10k 100k FREQUENCY (Hz) 1M 10M LOAD CURRENT (mA)
Figure 16. Dropout Voltage vs. Load Current, 30 V
Figure 19. Open-Loop Gain and Phase vs. Frequency, 30 V
Rev. A | Page 9 of 20
ADA4092-4
50 GAIN = +100 40 ADA4092-4 VSY = 1.5V TA = 25C
1k ADA4092-4 VSY = 1.5V TA = 25C
CLOSED-LOOP GAIN (dB)
30
100
20
ZOUT ()
GAIN = +10
AV = +100 10 AV = +10 1 AV = +1
10 GAIN = +1 0
-10
0.1
10
100
1k
10k
100k
1M
10M
08803-020
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Closed-Loop Gain vs. Frequency, 3 V
50 GAIN = +100 40 ADA4092-4 VSY = 5V TA = 25C
Figure 23. Closed-Loop Output Impedance vs. Frequency, 3 V
1k
ADA4092-4 VSY = 5V TA = 25C
CLOSED-LOOP GAIN (dB)
30
100
ZOUT ()
GAIN = +10 20
AV = +100 10 AV = +10 1 AV = +1
10 GAIN = +1 0
-10
0.1
10
100
1k
10k
100k
1M
10M
08803-021
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. Closed-Loop Gain vs. Frequency, 10 V
50 GAIN = +100 40
CLOSED-LOOP GAIN (dB)
Figure 24. Closed-Loop Output Impedance vs. Frequency, 10 V
1k
ADA4092-4 VSY = 15V TA = 25C 100
ADA4092-4 VSY = 15V TA = 25C
30 GAIN = +10
ZOUT ()
20
AV = +100 10 AV = +10 1
10 GAIN = +1 0
-10
AV = +1 0.1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
08803-025
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 22. Closed-Loop Gain vs. Frequency, 30 V
08803-022
-20
Figure 25. Output Impedance vs. Frequency, 30 V
Rev. A | Page 10 of 20
08803-024
-20
08803-023
-20
ADA4092-4
90 80 70
80 120 100
60
PSRR+
CMRR (dB)
PSRR (dB)
50 40 30 20 10 0 100 ADA4092-4 VSY = 1.5V TA = 25C
60 40 20 0 -20 100 ADA4092-4 VSY = 1.5V TA = 25C
08803-029 08803-031 08803-030
PSRR-
08803-026
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26. CMRR vs. Frequency, 3 V
100 90
100 120
Figure 29. PSRR vs. Frequency, 3 V
80 70
80 PSRR+
CMRR (dB)
PSRR (dB)
60 50 40 30 20 ADA4092-4 VSY = 5V TA = 25C
60 40 20 0 ADA4092-4 VSY = 5V TA = 25C
PSRR-
10
08803-027
0 100
1k
10k
100k
1M
10M
-20 100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 27. CMRR vs. Frequency, 10 V
100 90 80 70
80 120
Figure 30. PSRR vs. Frequency, 10 V
100
PSRR+
CMRR (dB)
PSRR (dB)
60 50 40 30 20 ADA4092-4 VSY = 15V TA = 25C
60 40 20 0 ADA4092-4 VSY = 15V TA = 25C PSRR-
10
08803-028
0 100
1k
10k
100k
1M
10M
-20 100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 28. CMRR vs. Frequency, 30 V
Figure 31. PSRR vs. Frequency, 30 V
Rev. A | Page 11 of 20
ADA4092-4
2.0 1.5 1.0
0.02 0.06
0.04
0.5
VOUT (V)
0 -0.5 -1.0 -1.5 -2.0 ADA4092-4 VSY = 1.5V TA = 25C RL = 100k CL = 100pF
VOUT (V)
0
-0.02
-0.04
ADA4092-4 VSY = 1.5V TA = 25C RL = 100k CL = 100pF
08803-032
0
10
20
30
40 TIME (s)
50
60
70
80
0
2
4
6
8
10
12
14
16
18
TIME (s)
Figure 32. Large Signal Transient Response, 3 V
6
Figure 35. Small Signal Transient Response, 3 V
0.06
4
0.04
2
0.02
VOUT (V)
0 ADA4092-4 VSY = 5V TA = 25C RL = 100k CL = 100pF
VOUT (V)
0
-2
-0.02
-4
-0.04
ADA4092-4 VSY = 5V TA = 25C RL = 100k CL = 100pF
08803-033
0
20
40
60
80 TIME (s)
100
120
140
160
0
2
4
6
8
10
12
14
16
18
TIME (s)
Figure 33. Large Signal Transient Response, 10 V
2.0 1.5
0.04 0.06
Figure 36. Small Signal Transient Response, 10 V
1.0
0.02
0.5
VOUT (V)
0 -0.5 -1.0 -1.5 -2.0 0 40 80 TIME (s) 120 160 200 ADA4092-4 VSY = 15V TA = 25C RL = 100k CL = 100pF
VOUT (V)
0
-0.02
-0.04
ADA4092-4 VSY = 15V TA = 25C RL = 100k CL = 100pF
08803-034
0
2
4
6
8
10
12
14
16
18
TIME (s)
Figure 34. Large Signal Transient Response, 30 V
Figure 37. Small Signal Transient Response, 30 V
Rev. A | Page 12 of 20
08803-037
-0.06
08803-036
-6
-0.06
08803-035
-0.06
ADA4092-4
1.6 1.4 1.2 1.0 0 -0.2 -0.4 -0.6
VOUT (V)
0.8 0.6 0.4 0.2 0
VOUT (V)
ADA4092-4 VSY = 1.5V TA = 25C
-0.8 -1.0 -1.2 -1.4 -1.6
ADA4092-4 VSY = 1.5V TA = 25C
08803-038
0
10
20
30
40
50
60
70
80
90
0
10
20
30
40
50 TIME (s)
60
70
80
90
100
TIME (s)
Figure 38. Positive Overload Recovery, 3 V
6 5 4 -2 0
Figure 41. Negative Overload Recovery, 3 V
-1
VOUT (V)
3 2 1 0 -1 ADA4092-4 VSY = 5V TA = 25C
VOUT (V)
-3
ADA4092-4 VSY = 5V TA = 25C
-4
-5
08803-039
0
10
20
30
40 TIME (s)
50
60
70
90
0
10
20
30
40
50
60
70
80
90
TIME (s)
Figure 39. Positive Overload Recovery, 10 V
16 14 12 10
-6 0 -2 -4
Figure 42. Negative Overload Recovery, 10 V
VOUT (V)
8 6 4 2 0
08803-040
VOUT (V)
ADA4092-4 VSY = 15V TA = 25C
-8 -10 -12 -14 -16
ADA4092-4 VSY = 15V TA = 25C
0
10
20
30
40
50
60
70
80
90
0
10
20
30
40 TIME (s)
50
60
70
80
TIME (s)
Figure 40. Positive Overload Recovery, 30 V
Figure 43. Negative Overload Recovery, 30 V
Rev. A | Page 13 of 20
08803-043
-2
08803-042
-6
08803-041
ADA4092-4
0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3
08803-044
1000
ADA4092-4 VSY = 15V TA = 25C
ADA4092-4 VSY = 15V T = 25C
en (nV/Hz)
0 1 2 3 4 5 TIME (s) 6 7 8 9 10
VOUT (V)
100
-0.4
0.10
1
10
100
1000
FREQUENCY (Hz)
Figure 44. Peak-to-Peak Voltage Noise
200 180
-50 -60
Figure 46. Voltage Noise Density
140
CHANNEL SEPARATION (dB)
160
-70 -80 -90 -100 -110 -120 -130 -140 ADA4092-4 VSY = 1.5V, 5V, 15V TA = 25C
ISUPPLY (A)
120 100 80 60 40 20 0 0 4 8 12 16 20 24 28 32 36
08803-045
ADA4092-4 TA = 25C
20
100
1k FREQUENCY (Hz)
10k
50k
VSUPPLY (V)
Figure 45. Supply Current vs. Supply Voltage
Figure 47. Channel Separation vs. Frequency
Rev. A | Page 14 of 20
08803-047
08803-046
10 0.01
ADA4092-4 THEORY OF OPERATION
The ADA4092-4 is a single-supply, micropower amplifier featuring rail-to-rail inputs and outputs. To achieve wide input and output ranges, these amplifiers employ unique input and output stages. A common practice in bipolar amplifiers to protect the input transistors from large differential voltages is to include series resistors and differential diodes. See Figure 49 for the full input protection circuitry. These diodes turn on whenever the differential voltage exceeds approximately 0.6 V. In this condition, current flows between the input pins, limited only by the two 5 k resistors. Evaluate each application carefully to make sure that the increase in current does not affect performance.
INPUT STAGE
In Figure 48, the input stage comprises two differential pairs, a PNP pair (PNP input stage) and an NPN pair (NPN input stage). These input stages do not work in parallel. Instead, only one stage is on for any given input common-mode signal level. The PNP stage (Transistor Q1 and Transistor Q2) is required to ensure that the amplifier remains in the linear region when the input voltage approaches and reaches the negative rail. Alternatively, the NPN stage (Transistor Q5 and Transistor Q6) is needed for input voltages up to, and including, the positive rail. For the majority of the input common-mode range, the PNP stage is active, as shown in Figure 8 through Figure 13. Notice that the VOS shifts and that the bias current switches direction at approximately 1.5 V below the positive rail. At voltages below this level, the bias current flows out of the ADA4092-4 input, from the PNP input stage. However, above this voltage, the bias current enters the device due to the NPN stage. The actual mechanism within the amplifier for switching between the input stages comprises Q3, Q4, and Q7. As the input common-mode voltage increases, the emitters of Q1 and Q2 follow that voltage plus a diode drop. Eventually, the emitters of Q1 and Q2 are high enough to turn on Q3, which diverts the tail current away from the PNP input stage, turning it off. The tail current of the PNP pair is diverted to the Q4/Q7 current mirror to activate the NPN input stage, as shown in Figure 48.
OUTPUT STAGE
The output stage in the ADA4092-4 device uses a PNP and an NPN transistor, as do most output stages. However, Q32 and Q33, the output transistors, connect with their collectors to an output pin to achieve the rail-to-rail output swing. As the output voltage approaches either the positive or the negative rail, these transistors begin to saturate. Thus, the final limit on output voltage is the saturation voltage of these transistors, which is about 50 mV. The output stage has inherent gain arising from the transistor output impedance, as well as any external load impedance; consequently, the open-loop gain of the op amp is dependent on the load resistance and decreases when the output voltage is close to either rail.
-IN
Q32
Q3
+IN
Q1 Q2
Q5 Q6 Q8 Q10
Q12 Q14
Q16
Q17 OUT
Q9
Q11
Q13
Q15
Q18
Q19
Q33
08803-124
Q4
Q7
Figure 48. Simplified Schematic Without Input Protection (See Figure 49)
Rev. A | Page 15 of 20
ADA4092-4
INPUT OVERVOLTAGE PROTECTION
The ADA4092-4 has two different ESD circuits for enhanced protection, as shown in Figure 49. Therefore, consider two conditions to determine which case is the limiting factor. 1. Consider, for example, that when operating on 15 V, the inputs can go +42 V above the negative supply rail. With the -V pin equal to -15 V, +42 V above this supply (the negative supply) is +27 V. 2. There is a restriction on the input current of 5 mA through a 5 k resistor to the ESD structure to the positive rail. In the first condition, +27 V through the 5 k resistor to +15 V gives a current of 2.4 mA. Thus, the DIAC is the limiting factor. If the ADA4092-4 supply voltages are changed to 5 V, then -5 V + 42 V = +37 V. However, +5 V + (5 k x 5 mA) = 30 V. Thus, the normal resistor diode structure is the limitation when running on lower supply voltages. Additional resistance can be added externally in series with each input to protect against higher peak voltages; however, the additional thermal noise of the resistors must be considered. The flatband voltage noise of the ADA4092-4 is approximately 25 nV/Hz, and a 5 k resistor has a noise of 9 nV/Hz. Adding an additional 5 k resistor increases the total noise by less than 15% root sum square (rss). Therefore, maintain resistor values below this value (5 k) when overall noise performance is critical. Note that this represents input protection under abnormal conditions only. The correct amplifier operation input voltage range (IVR) is specified in Table 2, Table 3, and Table 4.
08803-123
+V
D3 R1 D7 R2 D8 D5 D6 D4
D1 D2
-V
Figure 49. Complete Input Protection Network
One circuit is a series resistor of 5 k to the internal inputs and diodes (D1 and D2 or D5 and D6) from the internal inputs to the supply rails. The other protection circuit is a circuit with two DIACs (D3 and D4 or D7 and D8) to the supply rails. A DIAC can be considered a bidirectional Zener diode with a transfer characteristic, as shown in Figure 50.
5 4 3
COMPARATOR OPERATION
Although op amps are quite different from comparators, occasionally an unused section of a dual or a quad op amp can be pressed into service as a comparator; however, this is not recommended. For rail-to-rail output op amps, the output stage is generally a ratioed current mirror with bipolar or MOSFET transistors. With the part operating open loop, the second stage increases the current drive to the ratioed mirror to close the loop, but it cannot, which results in an increase in supply current. With three of the op amps operating normally and the fourth one in comparator mode, the supply current increases by about 200 A (see Figure 51).
1000 ONE COMPARATOR, VOUT HIGH 900 800 700 NORMAL OPERATION 600 ONE COMPARATOR, VOUT LOW
CURRENT (mA)
2 1 0 -1 -2
08803-100
-3 -50
-40
-30
-20
-10
0
10
20
30
40
50
VOLTAGE (V)
Figure 50. DIAC Transfer Characteristic
For a worst-case design analysis, consider two cases. The ADA4092-4 has a normal ESD structure from the internal op amp inputs to the supply rails. In addition, it has 42 V DIACs from the external inputs to the rails, as shown in Figure 48.
ISY (A)
500 400 300 200 100
08803-051
0 0 4 8 12 16 20 VSY (V) 24 28 32 36
Figure 51. Comparator Supply Current
Rev. A | Page 16 of 20
ADA4092-4 OUTLINE DIMENSIONS
5.10 5.00 4.90
14
8
4.50 4.40 4.30
1 7
6.40 BSC
PIN 1 0.65 BSC 1.05 1.00 0.80 0.15 0.05 COPLANARITY 0.10 1.20 MAX
0.20 0.09 8 0
0.30 0.19
SEATING PLANE
0.75 0.60 0.45
061908-A
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 52. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
ORDERING GUIDE
Model 1 ADA4092-4ARUZ ADA4092-4ARUZ-RL
1
Temperature Range -40C to +125C -40C to +125C
Package Description 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP]
Package Option RU-14 RU-14
Z = RoHS Compliant Part.
Rev. A | Page 17 of 20
ADA4092-4 NOTES
Rev. A | Page 18 of 20
ADA4092-4 NOTES
Rev. A | Page 19 of 20
ADA4092-4 NOTES
(c)2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08803-0-5/10(A)
Rev. A | Page 20 of 20

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