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| 5-channel 3-LD Driver for Optical Disk Drive CXA2765ER Description The CXA2765ER is a laser driver IC that can drive optical disk lasers capable of writing the three formats of CD, DVD and BD. (Applications: Writable 3-wavelength optical disk drive) Features Supports power save mode with register setting LDOFF LD drivers Three LD drivers for CD, DVD and BD Maximum driving current OUTBD: Total = 450mA (Each channel: 150mA, 200mA, 150mA, 50mA, 150mA) OUT1, OUT2: Total = 800mA (Each channel: 180mA, 400mA, 300mA, 150mA, 180mA) Driver current noise: 0.4nA/ Hz (Read) 5-channel control allows generation of a 5-value recording waveform Register setting of high-frequency modulator (HFM) frequency and amplitude Frequency: 200MHz to 600MHz, 8 bits Amplitude: 0mAp-p to 100mAp-p, 8 bits IOP monitor using the VIOPMON pin (BD only) VOP monitor using the VIOPMON pin Register setting of HFM spectrum diffusion function (Modulation frequency: 2 bits, diffusion frequency: 2 bits) Package 32-pin VQFN (Plastic) Structure CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E06825C79 CXA2765ER Absolute Maximum Ratings Supply voltage VCC VCC_LDR VCC_LDB Storage temperature Junction temperature OUTBD pin voltage Tstg Tjmax OUTBD_OFF 6 6 10.0 -65 to +150 150 <7 V V V C C (When BD_LD is OFF) V (When BD_LD is OFF) Operating Conditions Supply voltage VCC VCC_LDR VCC_LDB Operating temperature OUTBD pin voltage Topr OUTBD_ON 4.5 to 6 4.5 to 6 5 to 9 -10 Topr 150 - Tj <5 V V V C (When BD_LD is ON) (When BD_LD is ON) V -2- CXA2765ER Block Diagram and Pin Configuration GND1 32 31 30 Current AMP 29 Current AMP 28 Current AMP 27 Current AMP 26 Current AMP 25 OUTBD Bias VCC 1 To all blocks OUTEN2 2 IINR IIN5 IIN4 IIN3 IIN2 IR 24 VCC_LDB Driver xOUTEN2 3 IOP 23 GND_LD OUTEN3 4 VOPMON 22 VIOPMON xOUTEN3 5 Driver 21 OUT2 OUTEN4 6 20 VCC_LDR xOUTEN4 7 Driver 19 OUT1 OUTEN5 8 To all blocks Mode control 18 LDEN xOUTEN5 9 HFM Serial interface and Status register 17 SEN 10 OSCEN 11 xOSCEN 12 RDIS 13 GND2 14 VD3 15 SDIO 16 SCLK -3- CXA2765ER Pin Description Pin No. 1 2 Pin voltage [V] 4.5 to 6.0 -- Symbol VCC OUTEN2 I/O -- I Equivalent circuit -- Description Supply voltage for input signal, bias and timing blocks IIN2 setting current control signal input (positive logic): LVDS/CMOS Fix to GND when not used. IIN2 setting current control signal input (negative logic): LVDS Not used in single input mode. Fix to VCC when not used. IIN3 setting current control signal input (positive logic): LVDS/CMOS Fix to GND when not used. IIN3 setting current control signal input (negative logic): LVDS Not used in single input mode. Fix to VCC when not used. IIN4 setting current control signal input (positive logic): LVDS/CMOS Fix to GND when not used. 3 xOUTEN2 I -- 4 OUTEN3 I -- 5 xOUTEN3 I -- VCC 1 6 OUTEN4 I -- 2 4 6 8 3 5 7 9 500 7 xOUTEN4 I -- 10 11 IIN4 setting current control signal input (negative logic): LVDS Not used in single input mode. Fix to VCC when not used. 13 GND2 8 OUTEN5 I -- IIN5 setting current control signal input (positive logic): LVDS/CMOS Fix to GND when not used. IIN5 setting current control signal input (negative logic): LVDS Not used in single input mode. Fix to VCC when not used. HFM control signal input (positive logic): LVDS Not used in single input mode. Fix to GND when not used. HFM control signal input (negative logic): LVDS/CMOS Fix to VCC when not used. 9 xOUTEN5 I -- 10 OSCEN I -- 11 xOSCEN I -- VCC 1 100k 12 RDIS I -- 500 12 IINR setting current control signal input (negative logic) (with pull-up resistor) 13 GND2 -4- CXA2765ER Pin No. 13 Symbol GND2 I/O -- Pin voltage [V] -- Equivalent circuit -- VCC 1 Description Timing block GND 14 VD3 -- 3.3 10 14 Voltage decoupling for serial register circuit (Connect to GND through 0.1F.) 13 GND2 VCC 1 14 15 SDIO I/O -- 500 15 Serial register data I/O 13 GND2 VCC 1 14 16 SCLK I -- 500 16 Serial register clock input (with pull-down resistor) 50k 13 GND2 VCC 1 17 SEN I -- 14 Serial register chip select input (with pull-down resistor) 500 17 18 50k 18 LDEN I -- 13 GND2 LDEN control (with pull-down resistor) High: LD enabled Low: Power save -5- CXA2765ER Pin No. 19 Symbol I/O Pin voltage [V] -- Equivalent circuit Description OUT1 O VCC_LDR 20 Laser driving output 1 20 VCC_LDR -- 4.5 to 6.0 19 21 Supply voltage for output stage 21 OUT2 O -- GND_LD 23 Laser driving output 2 VCC_LDR 20 22 VIOPMON O -- 500 22 200 Monitor output 23 GND_LD 23 GND_LD -- -- 24 VCC_LDB 9k VCC_LDR 20 Output stage GND 24 VCC_LDB -- 5 to 9 25 20k Supply voltage for blue-violet LD 25 OUTBD O -- GND_LD 23 Laser driving output (for BD) VCC 1 26 IINR I -- 500 26 740 Current setting R 31 GND1 -6- CXA2765ER Pin No. 27 Symbol I/O Pin voltage [V] -- Equivalent circuit Description IIN2 I VCC 1 Current setting 2 28 IIN3 I -- 500 27 28 29 1k Current setting 3 29 IIN4 I -- GND1 31 Current setting 4 VCC 1 30 IIN5 I -- 500 30 740 Current setting 5 31 GND1 31 GND1 -- -- -- Input signal block and bias block GND VCC 1 32 IR -- 1.25 500 500 32 Reference current setting resistor connection (Connect to GND through 22k.) 31 GND1 -7- CXA2765ER Electrical Characteristics (VCC = VCC_LDR = 5V, VCC_LDB = 8V, Ta = 25C) TEST No. Item Symbol Min. Typ. Max. Unit Conditions 240mA 120mA 40mA 2 ICC2 5 12 19 mA 3 Current consumption 3 (CD, DVD_Read) ICC3 21 31 41 mA 4 Current consumption 4 (CD, DVD_Write) ICC4 26 38 50 mA 5 Current consumption 5 (BD_STANDBY) ICC5 7 10 13 mA LDEN = High and LDM = 03 IINR, 2, 3, 4, 5 = 0 RDIS = OSCEN = OUTEN2, 3, 4, 5 = Disable RDIS, OSCEN = Enable OUTBD = 40mA, modulation amplitude = 20mAp-p Current consumption excluding the OUTBD pin current. RDIS, OUTEN2, OUTEN3 = Enable (IOUTR, IOUT2, IOUT3) IOUTR = 40mA (Duty = 100%) IOUT2 = 60mA (Duty = 25%) IOUT3 = 30mA (Duty = 50%) Current consumption excluding the OUTBD pin current. 60mA 30mA 40mA 6 Current consumption 6 (BD_Read) ICC6 14 20 26 mA 7 Current consumption 7 (BD_Write) ICC7 16 23 30 mA -8- CXA2765ER TEST No. Item Symbol Min. Typ. Max. Unit Conditions Tersf Tsref Tel (HOST) SEN Twlsc Tcc Twhsc 70% 50% Tcdh 70% 20% (HOST) SCLK 50% 20% 20% Tcds (HOST) SDIO Tedh Tcdd (CXA2765ER) SDIO Serial Interface Timing -9- CXA2765ER TEST No. Item Symbol Min. Typ. Max. Unit Conditions 51 IMINR_BD 0 -- 2.3 mA 52 IMIN2_BD 0 -- 2.7 mA 53 IMIN3_BD 0 -- 2.0 mA 54 IMIN4_BD 0 -- 0.7 mA 55 IMIN5_BD 0 -- 3.0 mA nA/ Hz 56 RNS1 -- 0.31 -- - 10 - CXA2765ER TEST No. Item Symbol Min. Typ. Max. Unit nA/ Hz Conditions OUT1, 2 = 40mA, OSCEN = Enable (20mAp-p, 350MHz) 16.5MHz noise, HFMP = 32d RDIS, OUTEN2 = Enable IOUTR = 40mA (Duty = 100%) IOUT2 = 40mA (Duty = 50%) 16.5MHz noise OUTEN5, OUTEN2 = Enable IOUT5 = 40mA (Duty = 100%) IOUT2 = 40mA (Duty = 50%) 16.5MHz noise OUTBD = 40mA, OSCEN = Disable 16.5MHz noise, HFMP = 79d OUTBD = 40mA, OSCEN = Enable (20mAp-p, 350MHz) 16.5MHz noise, HFMP = 79d RDIS, OUTEN2 = Enable IOUTR = 40mA (Duty = 100%) IOUT2 = 40mA (Duty = 50%) 16.5MHz noise OUTEN5, OUTEN2 = Enable IOUT5 = 40mA (Duty = 100%) IOUT2 = 40mA (Duty = 50%) 16.5MHz noise 57 Read noise 2 (CD, DVD) RNS2 -- 0.42 -- 58 Write noise 1 (CD, DVD) WNS1 -- 2.4 -- nA/ Hz 59 Write noise 2 (CD, DVD) WNS2 -- 2.8 -- nA/ Hz 60 Read noise 1 (BD) RNS1_BD -- 0.46 -- nA/ Hz nA/ Hz 61 Read noise 2 (BD) RNS2_BD -- 0.47 -- 62 Write noise 1 (BD) WNS1_BD -- 1.8 -- nA/ Hz 63 Write noise 2 (BD) WNS2_BD -- 2.4 -- nA/ Hz - 11 - CXA2765ER TEST No. Item Symbol Min. Typ. Max. Unit Conditions 74 75 76 77 78 79 80 Input resistance R, 5 Input resistance 2, 3, 4 Input current R, 2, 3, 4, 5 I/O band R I/O band 2, 3, 4, 5 I/O gain R (CD, DVD) I/O gain 5 (CD, DVD) ZINR ZINW IIN FBANDR FBANDW GAINR GAIN5 518 700 0 -- -- 235 235 740 1000 -- 370 2.35 262 262 962 1300 1 -- -- 289 289 mA kHz MHz A/A A/A IINR/5 input resistance IIN2/3/4 input resistance IINR/2/3/4/5 input current IINR = 200A input IIN2/3/4/5 = 400A input Gain from IINR input to OUT1/2 output (IINR = 100A to 200A, OUT1/2 = 2.5V) Gain from IIN5 input to OUT1/2 output (IIN5 = 100A to 200A, OUT1/2 = 2.5V) Gain from IIN2 input to OUT1/2 output (IINR = 200A, IIN2 = 100A to 200A, OUT1/2 = 2.5V) Gain from IIN3 input to OUT1/2 output (IINR = 200A, IIN3 = 100A to 200A, OUT1/2 = 2.5V) Gain from IIN4 input to OUT1/2 output (IINR = 200A, IIN4 = 100A to 200A, OUT1/2 = 2.5V) Fix IINR to 200A, and measure the offset at IIN2/3/4 = 600A in reference to IIN2/3/4 = 100A to 200A, respectively. OUT1/2 = 2.5V IIN5/IINR gain ratio IIN3/IIN2 gain ratio IIN4/IIN2 gain ratio Gain from IINR input to OUTBD output (IINR = 100A to 200A, OUTBD = 2.5V) Gain from IIN5 input to OUTBD output (IIN5 = 100A to 200A, OUTBD = 2.5V) Gain from IIN2 input to OUTBD output (IINR = 200A, IIN2 = 100A to 200A, OUTBD = 2.5V) Gain from IIN3 input to OUTBD output (IINR = 200A, IIN3 = 100A to 200A, OUTBD = 2.5V) Gain from IIN4 input to OUTBD output (IINR = 200A, IIN4 = 100A to 200A, OUTBD = 2.5V) Fix IINR to 200A, and measure the offset at IIN2/3/4 = 600A in reference to IIN2/3/4 = 100A to 200A, respectively. OUTBD = 2.5V IIN5/IINR gain ratio IIN3/IIN2 gain ratio IIN4/IIN2 gain ratio 81 I/O gain 2 (CD, DVD) GAIN2 504 560 616 A/A 82 I/O gain 3 (CD, DVD) GAIN3 405 450 495 A/A 83 I/O gain 4 (CD, DVD) GAIN4 202 225 248 A/A 84 I/O linearity 2, 3, 4 (CD, DVD) I/O gain ratio 1 (CD, DVD) I/O gain ratio 2 (CD, DVD) I/O gain ratio 3 (CD, DVD) I/O gain R (BD) I/O gain 5 (BD) LINE -3 -- 3 % 85 86 87 88 89 GaRa1 GaRa2 GaRa3 GAINR_BD GAIN5_BD 0.9 0.72 0.36 180 180 1 0.8 0.4 200 200 1.1 0.88 0.44 221 221 -- -- -- A/A A/A 90 I/O gain 2 (BD) GAIN2_BD 238 265 291 A/A 91 I/O gain 3 (BD) GAIN3_BD 180 200 220 A/A 92 I/O gain 4 (BD) GAIN4_BD 59 66 73 A/A 93 I/O linearity 2, 3, 4 (BD) LINE_BD -3 -- 3 % 94 95 96 I/O gain ratio 1 (BD) I/O gain ratio 2 (BD) I/O gain ratio 3 (BD) GaRa1_BD GaRa2_BD GaRa3_BD 0.91 0.67 0.22 1 0.75 0.25 1.12 0.83 0.28 -- -- -- - 12 - CXA2765ER TEST No. Item Symbol Min. Typ. Max. Unit Conditions -0.0035 600 10 -- 100 MHz % %/C mAp-p HFMF = 0 to 255dec HFMF = 80dec (@350MHz) HFMF = 80dec (@350MHz) HFMF = 80dec (@350MHz), HFMP = 0 to 255dec Load = 5 HFMF = 80dec (@350MHz), HFMP = 31 to 255dec, LDCR2 = 00 Load = 10 OSCEN Disable Enable OSCEN Enable Disable -- 101 102 103 VARIA_BD OSCRES1 OSCRES2 0 -- -- -- -- -- 70 11 11 mAp-p ns ns 108 VmoMin 0 0.7 1.1 V 109 VmoDC 3.9 4 4.1 V 110 111 112 VmoPls VmoHd VmoMax_BD 3.8 -72 2.4 4 -53.5 2.5 4.1 -25 2.6 V mV/s V 113 VmoMin_BD 0 -- 0.15 V 114 VmoDC_BD 0.4 0.5 0.6 V 115 116 117 118 VmoPls_BD VmoHd_BD TmoVout Tmotemp 0.4 23 -- -- 0.5 54 1.34 3.5 0.7 73 -- -- V mV/s V mV/C 119 Iratio_BD 0.914 1 1.053 % - 13 - CXA2765ER Example of Representative Characteristics High-frequency Modulation Characteristics Control characteristics of HFMF and modulation frequency HFMP = 80d LDCR = 255d 700 600 Modulation frequency [MHz] 500 400 300 200 100 0 0 32 64 96 128 160 192 224 256 Serial address 79h HFMF [dec] - 14 - CXA2765ER Electrical Characteristics Measurement Circuit 22k 0.1 0.1 0.1 0.1 32 IR 0.1 1 VCC 31 GND1 30 IIN5 29 IIN4 28 IIN3 27 IIN2 26 IINR OUTBD 25 10 VCC_LDB 24 0.1 GND_LD 23 VIOPMON 22 OUT2 21 5 VCC_LDR 20 2 OUTEN2 100 3 xOUTEN2 4 OUTEN3 100 5 xOUTEN3 CXA2765ER 6 OUTEN4 100 7 xOUTEN4 0.1 0.1 OUT1 19 5 8 OUTEN5 100 9 xOUTEN5 xOSCEN OSCEN GND2 SCLK SDIO RDIS VD3 LDEN 18 LDEN SEN 17 SEN (Serial data) 10 100 11 12 13 14 0.1 15 16 50 Serial data VCC VCC_LDR VCC_LDB 22 1 22 1 22 1 GND GND GND - 15 - SCLK SDIO CXA2765ER Serial Interface The CXA2765ER performs IC control via the serial interface. The serial interface specifications are shown below. Serial Address Bit Definition Bit A7 A6 to 0 Bit definition Read/write select bit 0: Serial interface write mode 1: Serial interface read mode Register address select bit Transmission and reception are performed in 16-bit units consisting of 8 address bits and 8 data bits. Both the address and data are MSB first. In the address, the A[7] bit switches between read and write mode, and the A[6:0] bits are the register address. The read/write timing charts are shown below. Timing Chart in Write Mode SEN (Pin 17) 1 SCLK (Pin 16) MSB SDIO (Pin 15) LSB MSB LSB High Low 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 High Low A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Address Data High Low The data written in the register is reflected to the various IC internal functions at the rising edge of the 16th (last) SCLK signal. Timing Chart in Read Mode SEN (Pin 17) 1 SCLK (Pin 16) MSB SDIO (Pin 15) LSB MSB LSB 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 High Low High Low Address Data (Output data from the CXA2765ER) MSB High Low A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Note) Depending on the flexible PC board condition, when the SDIO line and the SEN line use adjacent wiring, SDIO signal fluctuations may be transmitted to the SEN line and make the control status unstable, with the result that correct data cannot be read and written during serial transfer. - 16 - CXA2765ER Address Map (SDIO/SEN/SCLK) Address 78 79 7A 7B 7C 7D Name MODELDD HFMP HFMF EMISEL LDCR CHSEL Definition LDD status (LDOFF/CD/DVD/BD) Transfer skew check, input logic selection, and power supply monitor circuit control Modulation amplitude setting (CD/DVD: 0 to 100mAp-p, BD: 0 to 70mAp-p) Modulation frequency setting (200MHz to 600MHz) HFM spectrum diffusion setting, monitor control Output waveform adjustment Channel control method selection Bit Map Serial Address 78h Bit 7 6 Symbol -- EMVCCDIS Don't care Power supply monitor circuit disable 0: Enable 1: Disable CH5 input logic level selection 0: Differential input 1: Single input CH2 to CH4 input logic level selection 0: Differential input 1: Single input OSC CH input logic level selection 0: Differential input 1: Single input Skew check function 0: Normal operation 1: Transfer skew check mode LDD output selection 00: LDOFF (Power save) 01: LD1 10: LD2 11: BD Bit definition 5 SEL_CH5 4 SEL_CH2-4 3 SEL_OSC 2 SKEW 1-0 LDM - 17 - CXA2765ER Serial Address 79h Bit definition Bit Symbol HFM amplitude setting CD/DVD Resolution = 0.4mAp-p 0d: 0mAp-p to 128d: 50mAp-p to 255d: 100mAp-p BD Resolution = 0.3mAp-p 31d: 0mAp-p to 128d: 30mAp-p to 255d: 70mAp-p 7-0 HFMP Serial Address 7Ah Bit 7-0 Symbol HFMF Bit definition HFM frequency setting 0d: 200MHz to 255d: 600MHz Serial Address 7Bh Bit Symbol Bit definition V/I monitor output selection 000: OFF (monitor circuit power save) 001: VOP monitor output in accordance with LDM 010: Temperature sensor output 011: EMI countermeasure circuit period measurement mode 100: IOP output (BD_Read + MOD only) 101: MODFDAC measurement mode 110: MODADAC measurement mode 111: EMI countermeasure circuit spread measurement mode HFM spectrum diffusion circuit enable 0: Disable 1: Enable HFM spectrum diffusion - modulation frequency 00: 0.01% (350MHz conversion = 35kHz) 01: 0.02% (350MHz conversion = 70kHz) 10: 0.04% (350MHz conversion = 140kHz) 11: 0.08% (350MHz conversion = 280kHz) HFM spectrum diffusion - diffusion frequency 00: 0.2% (350MHz conversion = 0.7MHz) 01: 0.4% (350MHz conversion = 1.4MHz) 10: 0.8% (350MHz conversion = 2.8MHz) 11: 1.6% (350MHz conversion = 5.6MHz) 7-5 VIMON 4 EMIEN 3-2 EMIP 1-0 EMIS - 18 - CXA2765ER Serial Address 7Ch Bit 7 Symbol LDCR5 Bit definition (BD) LDD buffer current 0: Small current 1: Large current (fast waveform) LDD buffer signal current ratio 0: 1:4 1: 2:4 (fast waveform) LDD buffer bias current 0: Small bias current 1: Large bias current (fast waveform) Snubber 2 (both Tr and Tf) 00: Slow waveform 01: 10: 11: Fast waveform Snubber 1 (Tr only) 000: Slow waveform 001: 010: 011: 100: 101: 110: 111: Fast waveform Bit definition (DVD/CD) Ringing adjustment (Tr only) 0: Small 1: Large (fast waveform) -- 6 LDCR4 5 LDCR3 -- 4-3 LDCR2 -- 2-0 LDCR1 Overshoot adjustment (Tr only) 000: Small 001: 010: 011: 100: 101: 110: 111: Large (fast waveform) Serial Address 7Dh Bit 7 6 Symbol -- CH5EN Bit definition -- Channel 5 register control 0: OFF 1: ON Channel 4 register control 0: OFF 1: ON Channel 3 register control 0: OFF 1: ON Channel 2 register control 0: OFF 1: ON Read channel register control 0: OFF 1: ON Channel OSC register control 0: OFF 1: ON Channel control method selection 0: Normal (pin control) 1: Register control mode 5 CH4EN 4 CH3EN 3 CH2EN 2 REN 1 OSCEN 0 CH_CONT Note) When data is not written to address 78h to 7Dh after power-on, the registers at addresses 78h to 7Dh are undetermined. - 19 - CXA2765ER Description of Operation 1. Power-on and power-off sequences The following sequences are recommended to protect the laser when turning the power on and off. Power-on sequence VCC 5V power supply ON VCC_LDR 5V power supply ON (These power supplies may be turned on simultaneously or in any order.) (LDEN = Low) VCC_LDB 8V power supply ON (LDEN = Low) Register settings (LDEN = Low) LDEN = High Turn on the VCC_LDB 8V power supply after the VCC 5V and VCC_LDR 5V power supplies have risen to 1V or more. The IC control status is unstable when the VCC 5V and VCC_LDR 5V power supplies are less than 1V, so if the VCC_LDB 8V power supply rises to 7V or more in this condition, current of approximately 10mA may flow to the laser. Power-off sequence Select "00" with register LDM[1:0] or set LDEN = Low. VCC_LDB 8V power supply OFF VCC 5V power supply OFF VCC_LDR 5V power supply OFF When LDEN is Low, current does not flow to the laser for any power-off sequence, but the above sequence is recommended. Note) When the power is forcibly turned off during laser emission, current of the set level or more may flow to the laser. The conditions for current of the set level or more flowing to the laser are VCC < 3/5 x VCC_LDR and VCC_LDR 2V (shaded area in the figure below). To avoid problems, VCC_LDR should be turned off first, or VCC and VCC_LDR should be turned off at approximately the same time. In addition, current of the set level or more does not flow to the laser regardless of the VCC_LDB 8V power-off order. VCC_LDR VCC 5 Supply voltage [V] VCC < 3/5 x VCC_LDR and VCC_LDR 2V 3 2 0 Time Fig. 1. VCC and VCC_LDR Power-off - 20 - CXA2765ER 2. LD driving current setting The currents controlled by the current setting pins IINR, IIN2, IIN3, IIN4 and IIN5 are output from the OUT1, OUT2 and OUTBD pins. The output driving currents from the OUT pins can be set independently for IINR, IIN2, IIN3, IIN4 and IIN5 by RDIS, OUTEN and xOUTEN. Note that output switching for OUT1 (Pin 19), OUT2 (Pin 21) and OUTBD (Pin 25) is performed by serial address 78h bit[1:0] LDM. 3. Modulator circuit Output modulation is turned on and off by the OSCEN and xOSCEN pins. The modulation frequency can be varied by serial address 7Ah bit[7:0] HFMF, and the modulation amplitude can be varied by serial address 79h bit[7:0] HFMP. Modulation Amplitude Setting CD/DVD mode Modulation amplitude [mAp-p] Modulation amplitude [mAp-p] BD mode 0 HFMP DAC setting [dec] 0 31 HFMP DAC setting [dec] Modulation Level Adjustment CD/DVD mode Imod Modulation level [mAp-p] Modulation level [mAp-p] Iread BD mode Imod Iread IINR input current [mA] 1/2Imod Iread < 1/2Imod Iread > 1/2Imod IINR input current [mA] 1/2Imod Iread < 1/2Imod Iread > 1/2Imod 4. IR pin The IR pin external resistor should be fixed to 22k. The IR pin aims to reduce variance in the modulation frequency that depends on the internal resistance, and is designed based on fixed resistance of 22k. - 21 - CXA2765ER Description of Functions Logic Tables Output control (Differential input) (X: Don't care) LDEN RDIS OUTEN2 OUTEN3 OUTEN4 OUTEN5 XOSCEN OUT output (OUT1/OUT2 /OUTBD) L X X X X X X PS H H L L L L H OFF H L L L L L H H L L L L L L H L L L L L H H L L L L H H IINR + IIN5 H L H L L H H H L H H L H H H L H L H H H H L H H H H H IINR IINR (Modulation IINR ON) IINR + IIN5 + IINR + IIN5 + IINR + IIN5 + IINR + IIN5 + IIN2 + IIN3 + IIN2 IIN2 + IIN3 IIN2 + IIN4 IIN4 Power save LD OFF IIN3 IIN2 IIN4 IIN3 IIN4 OUT output IIN5 IINR 0mA Output control (Single input) (X: Don't care) LDEN RDIS OUTEN2 OUTEN3 OUTEN4 OUTEN5 XOSCEN OUT output (OUT1/OUT2 /OUTBD) L X X X X X X PS H H L L L L H OFF H L L L L X H H L L L L X L H L L L L X H H H L L L H H IIN5 H H H L L H H IIN5 + IIN2 H H H H L H H H H H L H H H H H H H H H H IINR IINR (Modulation IINR ON) IIN5 + IIN2 + IIN5 + IIN2 + IIN5 + IIN2 + IIN3 IIN4 IIN3 + IIN4 Power save LD OFF IIN3 IIN2 IIN4 IIN3 IIN4 OUT output IIN5 IINR 0mA Note) When serial address 78h bit[5] SEL_CH5 is set High (single input), the IINR channel and the IIN5 channel cannot be added to prevent glitches. - 22 - CXA2765ER Modulation control DVD/CD mode (X: Don't care) LDEN RDIS OUTEN2 OUTEN3 OUTEN4 OUTEN5 XOSCEN Modulation output (OUT1/OUT2) L X X X X X X PS H L H H H H H H L L L L L L H H H L L L L H H L H L L L H H L L H L L H H L L L H L H L H L L L L H H H H L L L Modulation Modulation Modulation Modulation Modulation Modulation Modulation Modulation ON ON ON ON OFF ON ON ON (IIN5) (IINR, IIN2) (IIN2, IIN3) (IIN4) (IINR) (IIN2) (IIN3) Note) 1. Modulation control is independent of the data timing signal. 2. Modulation is not output from the OUT pin without the input current to IINR. BD mode (X: Don't care) LDEN RDIS OUTEN2 OUTEN3 OUTEN4 OUTEN5 XOSCEN Modulation output (OUTBD) L X X X X X X PS H X X X X X H H L X X X X L Modulation Modulation OFF ON (IINR) Note) Modulation is not output from the OUT pin without the input current to IINR. - 23 - CXA2765ER Power Supply Monitor Circuit The CXA2765ER has a built-in power supply monitor circuit to ensure safe laser emission. This function monitors the two supply voltages VCC (Pin 1) and VCC_LDR (Pin 20). See the "Electrical Characteristics" table for the respective threshold values. When this function detects that either of these power supplies has dropped, it outputs the LDOFF (power save) signal and turns off the laser driving current. The power supply monitor circuit function can be enabled or disabled by serial address 78h bit[6] EMVCCDIS. VCC VCC_LDR (Pin 1) (Pin 20) LDOFF EMVCCDIS (Register) Power Supply Monitor Circuit Block Diagram VOP Monitor Function The VOP voltage at the laser end can be monitored. When serial address 7Bh bit[7:5] are set to "001", the peak hold voltage (CD/DVD) or the bottom hold voltage (BD) is output from VIOPMON (Pin 22). LDEN1 DVD Driver OUT1 (Pin 19) LDEN2 CD Driver OUT2 (Pin 21) VCC_LDB (Pin 24) OUTBD (Pin 25) 10k Bottom Hold 10k Peak Hold VIOPMON (Pin 22) VIOPMON (Register) BD Driver BDEN VOP Monitor Block Diagram - 24 - CXA2765ER Skew Check Function Normal mode or skew check mode can be selected by serial address 78h bit[2] SKEW. The skew check mode is the function that detects the timing offset of recording signals input to the CXA2765ER that occurs between channels due to the effects of the flexible PC board and other factors. It can detect the timing offset between a total of 5 channels (4 write channels and one OSC channel). The AND of the recording signals for each channel input to the CXA2765ER is output from the IIN2 channel path. The AND is output, so when the timing is offset between channels, the recording waveform pulse width narrows and the output recording power drops. Adjust the timing of the recording signal for each channel to maximize the output recording power. Write strategy generator (WSG) output LDD input (before adjustment) LDD input (after adjustment) OUTEN2 Transfer via Flexible PC Board OUTEN2 OUTEN2 OUTEN3 OUTEN3 OUTEN3 LDD output LDD output OUTEN2 2 xOUTEN2 3 In Skew Mode to Drive OUTEN3 4 xOUTEN3 5 OUTEN4 6 xOUTEN4 7 OUTEN5 8 xOUTEN5 9 OSCEN 10 xOSCEN 11 Disable Disable Disable Disable - 25 - IIN2 IIN3 IIN4 IIN5 HFM CXA2765ER HFM Spectrum Diffusion Function The HFM spectrum diffusion function is enabled by selecting "1" at Bit4 EMIEN of serial address 7Bh, and the HFM frequency is diffused as shown in the figure below. HFM spectrum Frequency Modulation frequency + diffusion frequency (HFMF) (EMIS) HFM Spectrum Diffusion Frequency Measurement When serial address 7Bh bit[7:5] are set to "011" or "111", the HFM spectrum diffusion modulation frequency (EMIP) and diffusion frequency (EMIS) can be measured at VIOPMON (Pin 22). Modulation frequency EMIS HFMF setting EMIP Time - 26 - CXA2765ER Channel control Pin control or bit[6:1] register control can be selected by serial address 7Dh bit[0] CH_CONT. SEL Low: A High: B OSC_EN SEL B A OUT_EN2 SEL B A OUT_EN3 SEL B A OUT_EN4 SEL B A OUT_EN5 A SEL B RDIS_EN SEL B A RDIS (Pin 12) REN (reg) SEL B CH_CONT (reg) A OSCEN (Pin 10) OSCEN (reg) OUTEN2 (Pin 2) CH2EN (reg) OUTEN3 (Pin 4) CH3EN (reg) OUTEN4 (Pin 6) CH4EN (reg) OUTEN5 (Pin 8) CH5EN (reg) SEL_CH5 (reg) Read channel and cool channel glitch countermeasures in single input mode When serial address 78h bit[5] SEL_CH5 is set High (single input), a timing signal which has had glitch countermeasures applied by the read channel and cool channel is output on OUT_EN5. Therefore, the read channel and cool channel cannot be added in single input mode. When set Low (differential input (LVDS)), the cool channel can be added to the read channel to generate the write power. - 27 - CXA2765ER Changes in the output waveform characteristics by the register settings The waveform characteristics (rise time (tr), fall time (tf), overshoot (OVS+), undershoot (OVS-)) of the output LD driving current change greatly according to the LDD, the LD and the LD load (in the mounted condition) connected to each output pin OUT1 (Pin 19), OUT2 (Pin 21) and OUTBD (Pin 25). The CXA2765ER can adjust the LDD output waveform characteristics by the register settings. These controls are performed by Serial Address 7Ch. However, in BD mode the current consumption of the 5V block increases as the LDCR5, LDCR4 and LDCR3 settings are increased (faster waveform). In addition, take care in LDCR2 setting because it affects high-frequency modulation amplitude. Modulation amplitude will be larger as LDCR2 setting changes from 00 to 11. In DVD/CD mode the current consumption of the 5 V block increases as the LDCR5 and LDCR1 settings are increased (faster waveform). LDCR1 = 111 LDCR3 = 1 LDCR2 = 11 LDCR3 = 0 LDCR1 = 000 LDCR2 = 00 LDCR2 = 00 LDCR4 = 1 LDCR5 = 1 LDCR2 = 11 LDCR4 = 0 LDCR5 = 0 LDCR1 = 111 LDCR5 = 1 LDCR1 = 000 LDCR5 = 0 - 28 - CXA2765ER Notes on Operation Make the wiring as short as possible between the output OUT pins (Pins 19, 21 and 25) and the laser diode, and between the VCC_LDR pin and the external decoupling capacitor. As the wiring length increases, the effects of the wiring inductance cause the output waveform overshoot and undershoot to increase. The VCC_LDR pin's external decoupling capacitance ground can be grounded to the GND grounding the load from the OUT pin. This reverses the phase of the drive waveform at the OUT and VCC_LDR and moves in the direction that suppresses overshoots and undershoots. Place the external resistor connected to the IR pin as close to the IC as possible. As the wiring length between the IR pin and the external resistor increases, external disturbance easily enters the reference current generated by the IR pin, and may cause noise to worsen or other problems. In addition, when capacitance is applied to the IR pin, the phase margin with the internal circuits is reduced and oscillation easily occurs. Temperature guarantee Thermal resistance (j-a) when the CXA2765ER is mounted on PWB varies according to the set (PWB) and because it is difficult to predict along with the tendency for higher power for power consumption (PO), the following points should be considered when using. Use in a range that the junction temperature (Tj) does not exceed 150C (Tjmax). Also, Use with the thermal resistance (j-a) of the PWB mounting lowered so that power consumption (PO) is below allowable power dissipation (PD). It is possible to lower the thermal resistance (j-a) when mounted on PWB by widening the GND region with the set PWB or releasing heat to the set chassis, etc. Find the thermal resistance (j-a) when mounted on PWB and power consumption (PO) using the following method. PO = (ICC x VCC) - (IOP x VOP): DVD/CD mode PO = (ICC x VCC) + (IOP x VOP): BD mode ICC: IC current consumption when operating (including IOP in DVD/CD mode) IOP: Output drive current flowed from the OUT pin to the laser diode VOP: Operating voltage of the laser diode Thermal resistance (j-a) when mounted on PWB The thermal resistance (c-a) is easily obtained by measuring the package surface temperature using a thermo couple or a radiation thermometer. In order to improve the precision of measurement, it is desired to calculate by the following formula. Package surface temperature when IOP is variable/PO Assume the thermal resistance (j-c) to be approximately 2C/W. Thermal resistance (j-a) is j-a = j-c + c-a Allowable power dissipation (PD) PO [W] PD = (150C - Ambient temperature)/j-a - 29 - CXA2765ER Application Circuit 1 Current DAC 0.1 0.1 0.1 0.1 22k 32 IR 0.1 1 VCC 31 GND1 30 IIN5 29 IIN4 28 IIN3 27 IIN2 26 IINR 0.1 LD for BD OUTBD 25 2 OUTEN2 VCC_LDB 24 0.1 3 xOUTEN2 GND_LD 23 4 OUTEN3 VIOPMON 22 Timing control logic (LVDS or CMOS) 5 xOUTEN3 CXA2765ER OUT2 21 LD for CD 6 OUTEN4 VCC_LDR 20 0.1 7 xOUTEN4 OUT1 19 LD for DVD Mode control logic (CMOS) 8 OUTEN5 LDEN 18 9 xOUTEN5 xOSCEN OSCEN GND2 SCLK 16 SDIO RDIS VD3 SEN 17 10 11 12 13 14 0.1 15 Serial interface Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. - 30 - CXA2765ER Application Circuit 2 Current DAC 0.1 0.1 0.1 0.1 22k 32 IR 0.1 1 VCC 31 GND1 30 IIN5 29 IIN4 28 IIN3 27 IIN2 26 IINR 0.1 LD for BD OUTBD 25 2 OUTEN2 VCC_LDB 24 0.1 3 xOUTEN2 GND_LD 23 4 OUTEN3 VIOPMON 22 Timing control logic (LVDS or CMOS) 5 xOUTEN3 CXA2765ER OUT2 21 LD for CD 6 OUTEN4 VCC_LDR 20 0.1 7 xOUTEN4 OUT1 19 LD for DVD 8 OUTEN5 LDEN 18 Mode control logic (CMOS) xOSCEN 9 xOUTEN5 OSCEN SEN 17 GND2 SCLK 16 Serial interface SDIO 15 0.1 RDIS VD3 14 10 11 12 13 Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. - 31 - CXA2765ER Package Outline (Unit: mm) LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m - 32 - Sony Corporation |
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