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XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary APPLICATIONS Step-Down DC/DC Converters Built-in P-channel MOSFET Built-in Synchronous N-channel MOSFET (No Schottky Barrier Diode Required) High Efficiency Oscillation Frequency: : 94% (VIN=5.0V, VOUT=3.3V) : 1.0MHz, 2.0MHz (Small Inductor for High Frequency Selectable) October 7, 2004 V2 Green Operation Compatible HDD : 0.23 : 0.25 Notebook computers CD-R / RW, DVD PDAs, Portable communication modems Digital cameras, Video recorders Various general-purpose power supplies Synchronized with an External Clock Signal Ceramic Capacitor Compatible MSOP-10 / USP-10 Packages GENERAL DESCRIPTION The XC9223/9224 series are synchronous step-down DC/DC converters with a 0.23 (TYP.) P-channel driver transistor and a synchronous 0.25 (TYP.) N-channel switching transistor built-in. A highly efficient and stable current can be supplied up to 1.0A by reducing ON resistance of the built-in transistor. With a high switching frequency of 1.0MHz or 2.0MHz, a small inductor is selectable; therefore, the XC9223/9224 series are ideally suited to applications with height limitation such as HDD or space-saving applications. Current limit value can be chosen either 1.5A (MIN.) when the LIM pin is high level, or 0.5A (MIN.) when the LIM pin is low level for using the power supply which current limit value differs such as USB or AC adapter. With the MODE/SYNC pin, the XC9223/9224 series provide mode selection of the fixed PWM control or automatically switching current limit PFM/PWM control. As for preventing unwanted switching noise, the XC9223/9224 series can be synchronized with an external clock signal within the range of 25% toward an internal clock signal via the MODE/SYNC pin. For protection against heat damage of the ICs, the XC9223/9224 series build in three protection functions: integral latch protection, thermal shutdown, and short-circuit protection. With the built-in U.V.L.O. (Under Voltage Lock Out) function, the internal P-channel driver transistor is forced OFF when input voltage becomes 1.8V or lower. The series' detector function monitors the discretional voltage by external resistors. FEATURES Input Voltage Range Output Voltage Range : 2.2V ~ 6.0V : 0.8V ~ VIN Can be set freely with 0.8V (+2%) of reference voltage by the external resistors. Oscillation Frequency Output Current Maximum Current Limit Controls Protection Circuits : 1MHz, 2MHz ( 15% accuracy) : 1.0A : 0.5A (MIN.) when LIM pin='L' : 1.5A (MIN.) when LIM pin='H' : PWM/PFM externally switching : Synchronized with an external clock signal : Thermal shutdown : Integral latch method (over current limit) : Short-circuit protection Soft-Start Time Voltage Detector : 3mS (TYP.) internally set : 0.712V detect, N-ch open drain output TYPICAL APPLICATION CIRCUIT CIN TYPICAL PERFOMANCE CHARACTERICSTICS Efficiency vs. Output Current VIN=5.0V, FOSC=2.0MHz L=2.0H(CDRH4D28C), CIN=10F(ceramic), CL=10F(ceramic) VIN VDIN 1 2 3 VDOUT 4 5 VIN VDIN AGND VDOUT FB PGND LX CE MODE/ SYNC LIM 10 9 8 7 6 CE L CFB RFB1 VOUT MODE/SYNC LIM Efficiency: EFFI (%) CL (ceramic) 100 90 80 70 60 50 40 30 20 10 0 1 VOUT=3.3V VOUT=1.5V RFB2 Output Current: IOUT (mA) 1000 10000 10 100 Data Sheet 1 DC000019 XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary PIN CONFIGURATION VIN 1 VDIN 2 AGND 3 VDOUT 4 FB 5 10 PGND 9 LX 8 CE 7 MODE/SYNC 6 LIM PGND 10 LX 9 CE 8 MODE/SYNC 7 LIM 6 1 VIN 2 VDIN 3 AGND 4 VDOUT 5 FB MSOP-10 (TOP VIEW) USP-10 (BOTTOM VIEW) * Please short the AGND pin and the PGND pin (pin no. 3 and 10) before use. * For mounting intensity and heat dissipation, please refer to recommended mounting pattern and recommended metal mask when soldering the pad of USP-10. PIN ASSIGNMENT PIN NUMBER 1 2 3 4 5 6 7 8 9 10 PIN NAME VIN VDIN AGND VDOUT FB LIM MODE/SYNC CE LX PGND FUNCTIONS Input Voltage Detector Input Analog Ground VD Output Output Voltage Monitor Over Current Limit Setting Mode Switch / External Clock Input Chip Enable Switch Power Ground PRODUCT CLASSIFICATION Ordering Information XC9223B 12345 XC9224B 12345 DESIGNATOR 1 3 2 DC/DC Oscillation Frequency 2 A Package D 4 5 R Device Orientation L Data Sheet 2 DC000019 XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary PACKAGING INFORMATION MSOP-10 0.15+0.01 - USP-10 0.53+0.10 - 2.7+0.05 3.00+0.10 - 4.90+0.10 - MAX 0.6 2.6+0.06 . 3.00+0.10 0.15 0.25+0.06 0.30 . - 0~ 5 O 0.86+0.05 - (1.50) 2.30 (0.5) 0.2+0.05 (0.1) Soldering fillet surface is not formed because the sides of the pins are not plated. (0.2) (0.5) BLOCK DIAGRAM 0.075+0.025 - LIM Current Limit PFM VIN Error Amp. FB Comparator PWM Logic Buffer Driver Current Feedback LX CE Vref with Soft-Start, CE PGND Ramp Wave Generator, OCS VD Thermal Shutdown MODE/ SYNC PMW/PFM AGND VDOUT VDIN Data Sheet 3 DC000019 XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary ABSOLUTE MAXIMUM RATINGS Ta=25 OC PARAMETER VIN Pin Voltage VDIN Pin Voltage VDOUT Pin Voltage VDOUT Pin Current FB Pin Voltage LIM Pin Voltage MODE/SYNC Pin Voltage CE Pin Voltage LX Pin Voltage LX Pin Current Power Dissipation MSOP-10 USP-10 SYMBOL VIN VDIN VDOUT IDOUT VFB VLIM VMODE/SYNC VCE VLX ILX Pd Topr Tstg RATINGS - 0.3 ~ 6.5 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 50 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 - 0.3 ~ VDD + 0.3 2000 350* 150 - 40 ~ + 85 - 55 ~ + 125 UNITS V V V mA V V V V V mA mW O O Operating Temperature Range Storage Temperature Range C C * When implemented on a PCB. Data Sheet 4 DC000019 XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary ELECTRICIAL CHARACTERISTICS XC9223B081xx PARAMETER Input Voltage FB Voltage Output Voltage Range Maximum Output Current (*1) U.V.L.O. Voltage (*2) Supply Current 1 Supply Current 2 Stand-by Current Oscillation Frequency External Clock Signal Synchronized Frequency External Clock Signal Duty Maximum Duty Ratio Minimum Duty Ratio PFM Switch Current Efficiency (*3) Lx SW "H" On Resistance (*4) Lx SW "L" On Resistance (*4) Current Limit 1 Current Limit 2 Integral Latch Time (*5, *6) Short Detect Voltage Soft-Start Time Thermal Shutdown Temperature Hysteresis Temperature CE "H" Voltage CE "L" Voltage MODE/SYNC "H" Voltage MODE/SYNC "L" Voltage LIM "H" Voltage LIM "L" Voltage CE "H" Current CE "L" Current MODE/SYNC "H" Current MODE/SYNC "L" Current LIM "H" Current LIM "L" Current FB "H" Current FB "L" Current Lx SW "H" Leak Current Lx SW "L" Leak Current (*7) Data Sheet Topr=25OC SYMBOL VIN VFB VOUTSET IOUTMAX VUVLO IDD1 IDD2 ISTB FOSC FB=VFB x 0.9, Voltage which Lx pin voltage holding "L" level FB=VFB x 0.9 FB=VFB x 1.1 (Oscillation stops) CE=0V Connected to external components, IOUT=10mA Connected external components, SYNCOSC SYNCDTY MAXDTY MINDTY IPFM EFFI RLxH RLxL ILIM1 ILIM2 TLAT VSHORT TSS TTSD THYS VCEH VCEL VMODE/SYNCH VMODE/SYNCL VLIMH VLIML ICEH ICEL IMODE/SYNCH IMODE/SYNCL ILIMH ILIML IFBH IFBL ILxH ILxL VIN=CE=6.0V VIN=6.0V, CE=0V VIN=CE=MODE/SYNC=6.0V VIN=CE=6.0V, MODE/SYNC=0V VIN=CE=LIM=6.0V VIN=CE=6.0V, LIM=0V VIN=CE=FB=6.0V VIN=CE=6.0V, FB=0V VIN=LX=6.0V, VCE=0V VIN=6.0V, LX=CE=0V 5 FB=VFB x 0.9, Voltage which Lx becomes "H" when voltage applied to CE FB=VFB x 0.9, Voltage which Lx becomes "L" when voltage applied to CE LIM=0V, FB=VFB x 0.9 Current which Lx starts oscillation LIM=VIN, FB=VFB x 0.9 Current which Lx starts oscillation FB=VFB x 0.9, Short Lx by 1 resistance FB Voltage which Lx becomes "L" Connected to external components, CE=0V VIN, IOUT=1mA FB=VFB x 0.9 FB=VFB x 1.1 Connected to external components, MODE/SYNC=0V, IOUT=0.1mA Connected to external components, CE=VIN=5.0V, VOUT=3.3V, IOUT=200mA FB=VFB x 0.9, ILx=100mA IOUT=10mA, apply an external clock signal to the MODE/SYNC 25 100 0.5 1.5 1.2 1.2 1.2 -0.1 -0.1 -0.1 -0.1 -1.0 150 94 0.23 0.25 6 0.4 3 150 20 75 0 0.4 0.4 0.4 0.1 0.1 0.1 0.1 1.0 % % % mA % A A ms V ms O O CONDITIONS MIN. 2.2 0.784 0.8 1.0 0.85 TYP. 0.800 1.8 380 30 1.00 MAX. 6.0 0.816 VIN 1.0 1.15 UNIT V V V A V A A A MHz CIRCUIT - 0.75 - 1.25 MHz -DC000019 C C V V V V V V A A A A A A A A A A XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary ELECTRICIAL CHARACTERISTICS (Continued) XC9223B081xx (Continued) PARAMETER Detect Voltage VOLTAGE DETECTOR Release Voltage Hysteresis Voltage Output Current Delay Time VDIN "H" Current VDIN "L" Current VDOUT "H" Current VDOUT "L" Current SYMBOL VDF VDR VHYS IDOUT TDLY IVDINH IVDINL IVDOUTH IVDOUTL CONDITIONS Voltage which VDOUT becomes "H" "L" Voltage which VDOUT becomes "L" "H" VHYS=(VDR-VDF)/VDF x 100 VDIN=VDF x 0.9, apply 0.5V to VDOUT Time until VDOUT becomes "L" VIN=CE=VDIN=6.0V VIN=CE=6.0V, VDIN=0V VIN=VDIN=VDOUT=6.0V VIN=VDIN=6.0V, VDOUT=0V "H" MIN. -0.1 -1.0 TYP. 0.700 0.745 6 2.5 2 MAX. 0.1 1.0 UNIT V V % mA ms A A A A Topr=25OC CIRCUIT - Test Condition: Unless otherwise stated, VIN=3.6V. NOTE: *1: When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes. If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance. *2: Including hysteresis operating voltage range. *3: EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100 *4: On resistance ()= Lx pin measurement voltage / 100mA *5: Time until it short-circuits Lx with GND through 1 of resistance from a state of operation and is set to Lx=Low from current limit pulse generating. *6: Integral latch circuit: Latch time may become longer and latch operation may not work when VIN is 3.0V or more. *7: When temperature is high, a current of approximately 50A (maximum) may leak. OPERATIONAL EXPLANATION Each unit of the XC9223/9224 series consists of a reference voltage source, a ramp wave circuit, error amplifier, PWM comparator, phase compensation circuit, output voltage adjustment resistors, P-channel MOS driver transistor, N-channel MOS synchronous rectification switching transistor, current limiter circuit, U.V.L.O. circuit and others. The series compares, using the error amplifier, the internal reference voltage to the CE pin with the voltage fedback from the VOUT pin via resistors RFB1 and RFB2. Phase compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the turn-on time during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The current feedback circuit monitors the P-channel MOS driver transistor current for each switching operation, and modulates the error amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage. Clock pulses Data Sheet 6 DC000019 XC9223/9224 Series 1A Driver Transistor Built-In Step-Down DC/DC Converters Preliminary OPERATIONAL EXPLANATION (Continued) Limit < # mS Limit > # mS Current Limit LEVEL IDOUT 0mA DCOUT VSS LX CE Restart VIN MODE/SYNC pin becomes the PWM mode automatically. MODE/SYNC pin stops synchronizing with the external clock and switches to the internal clock operation. Data Sheet 7 DC000019 |
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