 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| VND5E050J-E VND5E050K-E Double channel high side driver for automotive applications Features Max supply voltage Operating voltage range Max On-State resistance (per ch.) Current limitation (typ) Off state supply current (1) Typical value with all loads connected. VCC VCC RON ILIMH IS 41V 4.5 to 28V 50 m 27 A 2 A(1) PowerSSO-12 PowerSSO-24 General - Inrush current active management by power limitation - Very low stand-by current - 3.0V CMOS compatible inputs - Optimized electromagnetic emissions - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC european directive Diagnostic functions - Open Drain status output - On-state open load detection - Off-state open load detection - Output short to Vcc detection - Overload and short to ground (power limitation) indication - Thermal shutdown indication Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Over-temperature shutdown with autorestart (thermal shutdown) - Reverse battery protected(a) - Electrostatic discharge protection Application All types of resistive, inductive and capacitive loads Description The VND5E050J-E and VND5E050K-E are double channel high-side drivers manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-12 and PowerSSO-24 packages. The VND5E050J-E and VND5E050K-E are designed to drive automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS-compatible interface with any microcontroller. The devices integrate advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over-temperature shut-off with auto-restart and over-voltage active clamp. A dedicated active low digital status pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground, over-temperature indication, short-circuit to VCC diagnosis and ON & OFF state open-load detection. The diagnostic feedback of the whole device can be disabled by pulling the STAT_DIS pin up, thus allowing wired-ORing with other similar devices. (a )See Application schematic on page 22. February 2008 Rev 1 1/40 www.st.com 40 Contents VND5E050J-E / VND5E050K-E Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 2.2 2.3 2.4 2.5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 3.1.1 3.1.2 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 3.2 3.3 3.4 3.5 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 4.2 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.1 5.2 5.3 5.4 5.5 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6 7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 2/40 VND5E050J-E / VND5E050K-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 18. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Status pin (VSD=0V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Openload detection (8V List of figures VND5E050J-E / VND5E050K-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Open Load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open Load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 TJ evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Maximum turn-Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25 PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 26 PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON). . . . . 27 Thermal fitting model of a double channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 27 PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 29 PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30 Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30 PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSSO-12 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 PowerSSO-24 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4/40 VND5E050J-E / VND5E050K-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram VCC S ignal C lamp Undervoltage C ontrol & Diagnostic 1 P ower C lamp IN1 IN2 DR IV E R V ON Limitation Over temp. C urrent Limitation OF F S tate Open load ON S tate Open load CH 1 C ONTROL & DIAG NOS TIC C hannels 2 CH 2 S T_ DIS OUT2 S T1 S T2 OUT1 LOG IC OVE R LOAD P R OTE C TION (AC TIV E P OWE R LIMITATION) G ND Table 1. Name VCC OUTPUTn GND INPUTn STATUSn STAT_DIS Pin function Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Open Drain digital diagnostic pin. Active high CMOS compatible pin, to disable the STATUS pin. 5/40 Block diagram and pin description Figure 2. Configuration diagram (top view) TAB = Vcc GND STAT_DIS INPUT 1 STATUS 1 STATUS 2 INPUT 2 1 2 3 4 5 6 12 11 10 9 8 7 Vcc OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 Vcc VCC GND. N.C. STAT_DIS INPUT1 STATUS1 N.C. STATUS2 N.C. INPUT2 N.C. VCC VND5E050J-E / VND5E050K-E OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 TAB = VCC PowerSSO-12 PowerSSO-24 Table 2. Suggested connections for unused and not connected pins Status X Not allowed N.C. X X Output X Not allowed Input X Through 10K resistor STAT_DIS X Through 10K resistor Connection / pin Floating To ground 6/40 VND5E050J-E / VND5E050K-E Electrical specifications 2 Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC VFn ISD STAT_DIS VSD IINn INPUTn VINn GND IGND STATUSn VSTATn ISTATn OUTPUTn VOUTn IOUTn Note: VFn = VOUTn - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse DC output current DC input current DC status current Maximum switching energy (L=3 mH; RL=0; Vbat=13.5V; Tjstart=150C; IOUT = IlimL(Typ.)) Absolute maximum ratings Parameter Value 41 0.3 200 Internally limited 15 +10 / -1 +10 / -1 +10 / -1 104 Unit V V mA A A mA mA mA mJ ISTAT_DIS DC status disable current EMAX 7/40 Electrical specifications Table 3. Symbol VND5E050J-E / VND5E050K-E Absolute maximum ratings (continued) Parameter Electrostatic discharge (Human Body Model: R=1.5K; C=100pF) - INPUT - STATUS - STAT_DIS - OUTPUT - VCC Charge device model (CDM-AEC-Q100-011) Junction operating temperature Storage temperature Value Unit VESD 4000 4000 4000 5000 5000 750 -40 to 150 - 55 to 150 V V V V V V C C VESD Tj Tstg 2.2 Thermal data Table 4. Symbol Thermal data Value Parameter PowerSSO-12 PowerSSO-24 2.8 See Figure 40 C/W C/W Thermal resistance junction-case (max.) (with one channel ON) Thermal resistance junction-ambient (max.) Unit Rthj-case Rthj-amb 2.8 See Figure 36 8/40 VND5E050J-E / VND5E050K-E Electrical specifications 2.3 Electrical characteristics Values specified in this section are for 8V . Power section Parameter Operating supply voltage Undervoltage shutdown Undervoltage shutdown hysteresis On state resistance(2) Clamp voltage IOUT=2A; Tj=25C IOUT=2A; Tj=150C IOUT=2A; VCC=5V; Tj=25C IS=20mA Off State; VCC=13V; Tj=25C; VIN=VOUT= 0V On State; VCC=13V; VIN=5V; IOUT=0A VIN=VOUT=0V; VCC=13V; Tj=25C VIN=VOUT=0V; VCC=13V; Tj=125C -IOUT=2 A; Tj=150C 0 0 41 46 Test conditions Min. 4.5 Typ. 13 3.5 0.5 50 100 65 52 Max. 28 4.5 Unit V V V m m m V RON Vclamp IS Supply current 2(1) 3 5(1) 6 A mA IL(off1) Off state output current(2) 0.01 3 5 0.7 A VF Output - VCC diode voltage(2) V (1) PowerMOS leakage included. (2) For each channel. Table 6. Symbol td(on) td(off) Switching (VCC = 13V; Tj = 25C) Parameter Turn- On delay time Turn- Off delay time Turn- On voltage slope Turn- Off voltage slope Switching energy losses during twon Switching energy losses during twoff Test conditions RL= 6.5 (see Figure 6) RL= 6.5 (see Figure 6) RL= 6.5 RL= 6.5 RL= 6.5 (see Figure 6) RL= 6.5 (see Figure 6) Min. Typ. 20 40 See Figure 26 See Figure 28 0.21 0.28 Max. Unit s s V/ s V/ s mJ mJ dVOUT/dt(on) dVOUT/dt(off) WON WOFF 9/40 Electrical specifications Table 7. Symbol VSTAT ILSTAT CSTAT VSCL VND5E050J-E / VND5E050K-E Status pin (VSD=0V) Parameter Status low output voltage Status leakage current Status pin input capacitance Status clamp voltage Test conditions ISTAT=1.6 mA, VSD=0V Normal Operation or VSD=5V, VSTAT = 5V Normal Operation or VSD=5V, VSTAT = 5V ISTAT = 1mA ISTAT = -1mA 5.5 -0.7 Min. Typ. Max 0.5 10 100 7 Unit V A pF V V Table 8. Symbol IlimH IlimL TTSD TR TRS THYST tSDL VDEMAG VON Protections (1) Parameter DC short circuit current Short circuit current during thermal cycling Shutdown temperature Reset temperature Thermal reset of STATUS Thermal hysteresis (TTSD-TR) Status delay in overload conditions Turn-off output voltage clamp Output voltage drop limitation Tj>TTSD (see Figure 4) IOUT=2A; VIN=0; L=6mH IOUT=0.1A; Tj= -40C...+150C VCC-41 VCC-46 25 Test conditions VCC=13V;5V (1) To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 10/40 VND5E050J-E / VND5E050K-E Table 9. Symbol IOL tDOL(on) Electrical specifications Openload detection (8V tPOL Delay between INPUT falling edge and STATUS = 0A (see Figure 4) I rising edge in open load OUT condition Openload OFF state voltage detection threshold Output short circuit to VCC detection delay at turn Off Off state output current(1) Delay response from output rising edge to STATUS falling edge in open load VIN = 0V; 200 500 1200 s VOL 2 4 V tDSTKON See Figure 4 VIN= 0V; VOUT= 4V (see Section 3.4: Open load detection in Off state) 180 tPOL s IL(off2) -75 0 A td_vol VIN= 0V; VOUT= 4V 20 s (1) For each channel. Table 10. Symbol VIL IIL VIH IIH VI(hyst) VICL VSDL ISDL VSDH ISDH VSD(hyst) VSDCL Logic input Parameter Input low level Low level input current Input high level High level input current Input hysteresis voltage Input clamp voltage STAT_DIS low level voltage Low level STAT_DIS current STAT_DIS high level voltage High level STAT_DIS current STAT_DIS hysteresis voltage STAT_DIS clamp voltage ISD=1mA ISD=-1mA VSD = 2.1 V 0.25 5.5 -0.7 7 VSD = 0.9 V 1 2.1 10 IIN = 1mA IIN = -1mA VIN = 2.1 V 0.25 5.5 7 -0.7 0.9 VIN =0.9 V 1 2.1 10 Test conditions Min. Typ. Max. 0.9 Unit V A V A V V V V A V A V V V 11/40 Electrical specifications Figure 4. Status timings VND5E050J-E / VND5E050K-E OPEN LOAD STATUS TIMING (without external pull-up) VIN IOUT < IOL VOUT < VOL OPEN LOAD STATUS TIMING (with external pull-up) VIN IOUT < IOL VOUT > VOL VSTAT tDOL(on) tPOL VSTAT tDOL(on) OUTPUT STUCK TO VCC VIN IOUT > IOL VOUT > VOL OVER TEMP STATUS TIMING Tj > TTSD VIN VSTAT tDOL(on) tDSTKON VSTAT tSDL tSDL Figure 5. Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Iout Von/Ron(T) 12/40 VND5E050J-E / VND5E050K-E Figure 6. Switching characteristics VOUT Electrical specifications 80% dVOUT/dt(on) tr 10% 90% dVOUT/dt(off) tf t INPUT td(on) td(off) t Table 11. Truth table Input L H L H L H H H L H L H Output L H L L L L X (no power limitation) Cycling (power limitation) H H L H Sense (VCSD=0V)(1) H H H L X X H L L(2) H H (3) L Conditions Normal operation Overtemperature Undervoltage Overload & Short circuit to GND Output voltage > VOL Output current < IOL (1) If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit. (2) The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge. (3) The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge. 13/40 Electrical specifications Table 12. ISO 7637-2: 2004(E) Test pulse 1 2a 3a 3b 4 5b(2) ISO 7637-2: 2004(E) Test pulse 1 2a 3a 3b 4 5b(2) III C C C C C C III -75V +37V -100V +75V -6V +65V VND5E050J-E / VND5E050K-E Electrical transient requirements Test levels IV -100V +50V -150V +100V -7V +87V Number of pulses or test times 5000 pulses 5000 pulses 1h 1h 1 pulse 1 pulse Test level results(1) IV C C C C C C Burst cycle/pulse repetition time 0.5 s 0.2 s 90 ms 90 ms 5s 5s 100 ms 100 ms Delays and Impedance 2 ms, 10 50 s, 2 0.1 s, 50 0.1 s, 50 100 ms, 0.01 400 ms, 2 (1) The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. (2) Valid in case of external load dump clamp: 40V maximum referred to ground. Class C E Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. 14/40 VND5E050J-E / VND5E050K-E Electrical specifications 2.4 Waveforms Figure 7. Normal operation Normal operation INPUT Nominal load Nominal load IOUT VSTATUS VST_DIS Figure 8. Undervoltage shutdown Undervoltage shut-down VUSDhyst VCC VUSD INPUT IOUT UNDEFINED VSTATUS VST_DIS 15/40 Electrical specifications Figure 9. Overload or Short to GND VND5E050J-E / VND5E050K-E Overload or Short to GND INPUT ILimH > IOUT Power Limitation Thermal cycling ILimL > VSTATUS VST_DIS Figure 10. Intermittent Overload Intermittent Overload INPUT ILimH > IOUT Overload ILimL > Nominal load VSTATUS VST_DIS 16/40 VND5E050J-E / VND5E050K-E Figure 11. Open Load with external pull-up Electrical specifications Open Load with external pull-up INPUT VPU > VOL VOL VOUT IOUT tDOL(on) VSTATUS VST_DIS Figure 12. Open Load without external pull-up Open Load without external pull-up INPUT VOUT IOUT < IOL IOUT IOL tDOL(on) VSTATUS tPOL VST_DIS 17/40 Electrical specifications Figure 13. Short to VCC VND5E050J-E / VND5E050K-E Short to V CC Resistive Short to VCC Hard Short to VCC INPUT VOUT > VOL VOL IOUT > IOL VOUT > VOL VOUT IOUT IOL IOUT < IOL tDSTK(on) VSTATUS tDOL(on) VST_DIS Figure 14. TJ evolution in Overload or Short to GND TJ evolution in Overload or Short to GND INPUT Self-limitation of fast thermal transients TTSD TR THYST TJ_START TJ ILimH > Power Limitation < ILimL IOUT 18/40 VND5E050J-E / VND5E050K-E Electrical specifications 2.5 Electrical characteristics curves Figure 16. High level input current Iih (A) 5 4,5 600 Figure 15. Off state output current Iloff (nA) 700 500 Off State Vcc=13V Vin=Vout=0V Vin=2.1V 4 3,5 3 2,5 400 300 2 1,5 1 200 100 0,5 0 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 17. Input clamp voltage Vicl (V) 7 6,8 Figure 18. Input high level Vih (V) 4 3,5 3 lin=1mA 6,6 6,4 6,2 6 5,8 5,6 2,5 2 1,5 1 5,4 5,2 5 -50 -25 0 25 50 75 100 125 150 175 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 19. Input low level Vil (V) 2 1,8 1,6 1,4 1,2 1 0,8 0,6 0,4 0,2 0 -50 -25 0 25 50 75 100 125 150 175 Figure 20. Low level STAT_DIS current Isdl (A) 5 4,5 Vsd= 0.9V 4 3,5 3 2,5 2 1,5 1 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 19/40 Electrical specifications VND5E050J-E / VND5E050K-E Figure 21. On state resistance vs Tcase Ron (mOhm) 300 Figure 22. High level STAT_DIS current Isdh (A) 5 4,5 250 Iout= 2A Vcc=13V Vsd= 2.1V 4 3,5 3 200 150 2,5 2 100 1,5 1 0,5 50 0 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 23. On state resistance vs VCC Ron (mOhm) 100 Figure 24. Low level input current Iil (A) 5 4,5 Tc=150C 80 4 3,5 Vin=0.9V Tc=125C 60 3 Tc=25C 40 2,5 2 1,5 Tc=-40C 20 1 0,5 0 0 5 10 15 20 25 30 35 40 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 25. ILIM vs Tcase Ilimh (A) 40 Figure 26. Turn-On voltage slope (dVout/dt )On (V/ms) 1000 900 35 Vcc=13V 800 700 600 Vcc=13V RI=6.5 Ohm 30 25 500 400 20 300 200 100 15 10 -50 -25 0 25 50 75 100 125 150 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 20/40 VND5E050J-E / VND5E050K-E Electrical specifications Figure 27. Undervoltage shutdown Vusd (V) 8 7 Figure 28. Turn-Off voltage slope (dVout/dt )Off (V/ms) 600 550 500 6 5 450 400 350 Vcc=13V RI= 6.5 Ohm 4 3 300 250 200 2 1 150 100 50 0 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 29. STAT_DIS clamp voltage Vsdcl(V) 10 9 8 7 6 5 4 3 Figure 30. High level STAT_DIS voltage VsdH(V) 4 3,5 Isd = 1 mA 3 2,5 2 1,5 1 2 1 0 -50 -25 0 25 50 75 100 125 150 175 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 31. Low level STAT_DIS voltage VsdL(V) 3 2,5 2 1,5 1 0,5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 21/40 Application information VND5E050J-E / VND5E050K-E 3 Application information Figure 32. Application schematic +5V +5V VCC Rprot STAT_DIS Dld Rprot C OUTPUT Rprot STATUS GND INPUT VGND RGND DGND Note: Channel 2 has the same internal circuit as channel 1. 3.1 3.1.1 GND protection network against reverse battery Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. 2. RGND 600mV / (IS(on)max). RGND (- CC) / (-IGND) V where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. 22/40 VND5E050J-E / VND5E050K-E Application information If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND=1k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift ( 600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 180k . Recommended values: Rprot =10k . 23/40 Application information VND5E050J-E / VND5E050K-E 3.4 Open load detection in Off state Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the Electrical Characteristics section. Figure 33. Open load detection in Off state V batt. VCC RPU INP UT DRI VER + LOGI C OUT + S TATUS VOL R IL(off2) VPU RL G ROUND 24/40 VND5E050J-E / VND5E050K-E Application information 3.5 Maximum demagnetization energy (VCC = 13.5V) Figure 34. Maximum turn-Off current versus inductance (for each channel) 100 A B 10 C I (A) 1 0,1 1 L (mH) 10 100 A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 25/40 Package and PCB thermal data VND5E050J-E / VND5E050K-E 4 4.1 Package and PCB thermal data PowerSSO-12 thermal data Figure 35. PowerSSO-12 PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/W) 70 65 60 55 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 26/40 VND5E050J-E / VND5E050K-E Package and PCB thermal data Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse (one channel ON) ZTH (C/W) 100 Footprint 2 cm2 8 cm2 10 1 0,1 0,0001 0,001 0,01 0,1 1 Time (s) 10 100 1000 Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tP/T Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-12 (b) (b )The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 27/40 Package and PCB thermal data Table 13. PowerSSO-12 thermal parameters Footprint 0.7 2.8 4 8 22 26 0.001 0.0025 0.05 0.2 0.27 3 VND5E050J-E / VND5E050K-E Area/island (cm2) R1= R7 (C/W) R2= R8 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1= C7 (W.s/C) C2= C8 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) 2 8 8 15 20 7 10 15 0.1 0.8 6 0.1 1 9 28/40 VND5E050J-E / VND5E050K-E Package and PCB thermal data 4.2 PowerSSO-24 thermal data Figure 39. PowerSSO-24 PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 40. Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/ W) 55 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^ 2) 29/40 Package and PCB thermal data VND5E050J-E / VND5E050K-E Figure 41. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON) Equation 2: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tP/T Figure 42. Thermal fitting model of a double channel HSD in PowerSSO-24 (c) (c )The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 30/40 VND5E050J-E / VND5E050K-E Table 14. PowerSSO-24 thermal parameters Footprint 0.4 2 6 7.7 9 28 0.001 0.0022 0.025 0.75 1 2.2 Package and PCB thermal data Area/island (cm2) R1=R7 (C/W) R2=R8 (C/W) R3 (C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1=C7 (W.s/C) C2=C8 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) 2 8 9 17 8 10 4 5 9 17 31/40 Package and packing information VND5E050J-E / VND5E050K-E 5 5.1 Package and packing information ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 5.2 PowerSSO-12 package information Figure 43. PowerSSO-12 package dimensions 32/40 VND5E050J-E / VND5E050K-E Table 15. PowerSSO-12 mechanical data Package and packing information Millimeters Symbol Min. A A1 A2 B C D E e H h L k X Y ddd 5.8 0.25 0.4 0 1.9 3.6 1.25 0 1.10 0.23 0.19 4.8 3.8 0.8 6.2 0.5 1.27 8 2.5 4.2 0.1 Typ. Max. 1.62 0.1 1.65 0.41 0.25 5.0 4.0 33/40 Package and packing information VND5E050J-E / VND5E050K-E 5.3 PowerSSO-24 package information Figure 44. PowerSSO-24 package dimensions Table 16. PowerSSO-24 mechanical data Millimeters Symbol Min. A A2 a1 b c D E e e3 G G1 2.15 2.15 0 0.33 0.23 10.10 7.4 0.8 8.8 0.1 0.06 Typ. Max. 2.47 2.40 0.075 0.51 0.32 10.50 7.6 34/40 VND5E050J-E / VND5E050K-E Table 16. Package and packing information PowerSSO-24 mechanical data (continued) Millimeters Symbol Min. H h L N X Y 4.1 6.5 0.55 10.1 Typ. Max. 10.5 0.4 0.85 10deg 4.7 7.1 35/40 Package and packing information VND5E050J-E / VND5E050K-E 5.4 PowerSSO-12 packing information Figure 45. PowerSSO-12 tube shipment (no suffix) B C A Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. 100 2000 532 1.85 6.75 0.6 Figure 46. PowerSSO-12 tape and reel shipment (suffix "TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing All dimensions are in mm. End W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components 36/40 VND5E050J-E / VND5E050K-E Package and packing information 5.5 PowerSSO-24 packing information Figure 47. PowerSS0-24 tube shipment (no suffix) C B Base Qty Bulk Qty Tube length (0.5) A B C (0.1) All dimensions are in mm. 49 1225 532 3.5 13.8 0.6 A Figure 48. PowerSSO-24 tape and reel shipment (suffix "TR") REEL DIMENSIONS Base Qty Bulk Qty A (max) B (min) C ( 0.2) F G (+2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing All dimensions are in mm. Start Top cover tape No components Components 500mm min No components W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End 500mm min Empty components pockets sealed with cover tape. User direction of feed 37/40 Order codes VND5E050J-E / VND5E050K-E 6 Order codes Table 17. Device summary Order codes Package Part number (Tube) PowerSSO-12 PowerSSO-24 VND5E050J-E VND5E050K-E Part number (Tape & reel) VND5E050JTR-E VND5E050KTR-E 38/40 VND5E050J-E / VND5E050K-E Revision history 7 Revision history Table 18. Date 04-Feb-2008 Document revision history Revision 1 Initial release. Changes 39/40 VND5E050J-E / VND5E050K-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 40/40 |
Price & Availability of VND5E050KTR-E
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |