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| SSG4424 13.8A, 30V,RDS(ON) 9m[ Elektronische Bauelemente N-Channel Enhancement Mode Power Mos.FET RoHS Compliant Product SOP-8 Description 0.40 0.90 0.19 0.25 45 o ruggedized device design, Ultra low on-resistance and cost-effectiveness. The SOP-8 is universally preferred for all commercial industrial surface mount application and suited for low voltage applications such as DC/DC converters. 0.35 0.49 1.27 Typ. 0.375 REF 6.20 5.80 0.25 3.80 4.00 4.80 5.00 0.10 0.25 Features * Low on-resistance * Simple drive requirement D 8 D 7 D 6 D 5 0 o 8 o 1.35 1.75 Dimensions in millimeters D * Fast switching Characteristic Date Code 4424SC G 1 S 2 S 3 S 4 G S Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 Symbol VDS VGS ID@TA=25 C ID@TA=70 C IDM PD@TA=25 C o o o Ratings 30 20 13.8 11 50 2.5 0.02 Unit V V A A A W W/ C o o 3 Total Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 C Thermal Data Parameter Thermal Resistance Junction-ambient 3 Symbol Rthj-a Ratings 50 o Unit C /W http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 1 of 4 SSG4424 Elektronische Bauelemente 13.8A, 30V,RDS(ON) 9m[ N-Channel Enhancement Mode Power Mos.FET Electrical Characteristics( Tj=25 oC Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70 oC) Static Drain-Source On-Resistance2 2 Symbol BVDSS BVDS/ Tj VGS(th) IGSS IDSS Min. 30 _ Typ. _ Max. _ _ Unit V V/ oC V nA uA uA Test Condition VGS=0V, ID=250uA Reference to 25 oC,ID=1mA VDS=VGS, ID=250uA VGS= 20V VDS=30V,VGS=0 VDS=24V,VGS=0 VGS=10V, ID=13A VGS=4.5V, ID=10A 0.02 _ _ _ _ 1.0 _ _ _ _ 3.0 100 1 25 9 14 35 _ _ _ _ 23 6 15 13 9 35 17 1920 410 300 21 0.9 RDS(ON) Qg Qgs Qgd Td(ON) Tr Td(Off) Tf Ciss Coss Crss Gfs Rg _ _ _ _ _ _ _ _ _ _ _ m[ Total Gate Charge Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time 2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Forward Transconductance Gate Resistance nC ID=10A VDS=15V VGS=5V _ _ _ _ VDD=25V ID=1A nS VGS=5V RG=3.3 [ RD=25 [ 3070 _ _ pF VGS=0V VDS=15V f=1.0MHz _ _ S [ VDS=10V, ID=13A _ _ f=1.0MHz Source-Drain Diode Parameter Forward On Voltage2 Reverse Recovery Time 2 Symbol VDS Trr Qrr Min. _ Typ. _ Max. 1.2 Unit V Test Condition IS=2.1A, VGS=0V. Is=13A, VGS=0V dl/dt=100A/uS _ _ 33 26 _ _ nS nC Reverse Recovery Charge Notes: 1.Pulse width limited by safe operating area. 2.Pulse widthO 300us, dutycycleO2%. 3.Surface mounted on 1 inch2 copper pad of FR4 board; 270 OC/W when mounted on min. copper pad. http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 2 of 4 SSG4424 Elektronische Bauelemente 13.8A, 30V,RDS(ON) 9m[ N-Channel Enhancement Mode Power Mos.FET Characteristics Curve Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature http://www.SeCoSGmbH.com/ Fig 5. Forward Characteristics of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 3 of 4 SSG4424 Elektronische Bauelemente 13.8A, 30V,RDS(ON) 9m[ N-Channel Enhancement Mode Power Mos.FET Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance Fig 11. Switching Time Circuit Fig 12. Gate Charge Waveform http://www.SeCoSGmbH.com/ Any changing of specification will not be informed individual 01-Jun-2002 Rev. A Page 4 of 4 |
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