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STW75NF30
N-channel 300 V, 0.037 , 60 A, TO-247 low gate charge STripFETTM Power MOSFET
Features
Type STW75NF30

VDSS 300 V
RDS(on) max < 0.045
ID 60 A
pW 320 W
Exceptional dv/dt capability Low gate charge 100% Avalanche tested
TO-247
2 1 3
Application
Switching applications
Description
This Power MOSFET series realized with STMicroelectronics unique STripFETTM process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency isolated DC-DC converters Figure 1. Internal schematic diagram
Table 1.
Device summary
Order code STW75NF30 Marking 75NF30 Package TO-247 Packaging Tube
July 2008
Rev 3
1/12
www.st.com 12
Contents
STW75NF30
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) .......................... 6
3 4 5
Test circuits
.............................................. 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STW75NF30
Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID ID IDM
(1)
Absolute maximum ratings
Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25 C Drain current (continuous) at TC = 100 C Drain current (pulsed) Derating factor Value 300 20 60 37.8 240 2.56 12 320 -55 to 150 Unit V V A A A W/C V/ns W C
dv/dt(2) PTOT TJ Tstg
Peak diode recovery voltage slope Total dissipation at TC = 25 C Operating junction temperature Storage temperature
1. Pulse width limited by safe operating area 2. ISD 60A, di/dt 200A/s, VDD 80% V(BR)DSS
Table 2.
Symbol Rthj-case Rthj-amb Tl
Thermal resistance
Parameter Thermal resistance junction-case max Thermal resistance junction-ambient max Maximum lead temperature for soldering purpose Value 0.39 50 300 Unit C/W C/W C
Table 3.
Symbol IAR EAS
Avalanche characteristics
Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by TJ max) Single pulse avalanche energy (starting TJ = 25 C, ID = IAR, VDD = 50 V) Max. value 50 400 Unit A mJ
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Electrical characteristics
STW75NF30
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 4.
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on)
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1 mA, VGS = 0 VDS = Max rating, VDS = Max rating @125 C VDS = 20 V VDS = VGS, ID = 250 A VGS= 10 V, ID= 30 A 2 3 0.037 Min. 300 1 10 100 4 0.045 Typ. Max. Unit V A A nA V
Table 5.
Symbol gfs(1) Ciss Coss Crss Coss eq.(2) RG Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse Transfer Capacitance Equivalent output capacitance Intrinsic gate resistance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS = 15 V, ID = 30 A VDS = 25 V, f = 1 MHz, VGS = 0 Min. Typ. 40 5930 837 110 462 1.55 164 36 69 Max. Unit S pF pF pF pF nC nC nC
VDS = 0 to 240 V, VGS = 0 f = 1 MHz open drain VDD = 240 V, ID = 30 A, VGS = 10 V (see Figure 15)
1. Pulsed: pulse duration = 300s, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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STW75NF30 Table 6.
Symbol td(on) tr td(off) tf
Electrical characteristics Switching times
Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 150 V, ID = 30 A RG = 4.7 , VGS = 10 V, (see Figure 14) Min. Typ. 115 87 141 101 Max. Unit ns ns ns ns
Table 7.
Symbol ISD ISDM
(1)
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 60 A, VGS = 0 ISD = 60 A,VDD = 60 V di/dt = 100 A/s (see Figure 19) ISD =60 A, VDD = 60 V di/dt = 100 A/s Tj = 150C (see Figure 19) 252 2.5 20 316 3.7 23.2 Test conditions Min. Typ. Max. 60 240 1.6 Unit A A V ns C A ns C A
VSD(2) trr Qrr IRRM trr Qrr IRRM
1. Pulse with limited by maximum temperature 2. Pulsed: pulse duration = 300s, duty cycle 1.5%
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Electrical characteristics
STW75NF30
2.1
Figure 2.
ID (A)
Electrical characteristics (curves)
Safe operating area
AM00116v1
Figure 3.
Thermal impedance
10s
10
2
10 1
ea ) ar (on is DS th R in x na io y m t ra b pe d O mite li
is
100s
1ms 10ms
10 0
10-1 10-1
10 0
10 1
10 2
VDS(V)
Figure 4.
Output characteristics
AM00117v1
Figure 5.
Transfer characteristics
AM00118v1
ID(A) 180 160 140
6V
ID(A) 180 160 140 120 100 80
VGS=10V
120 100 80 60 40 20
4V 5V
60 40 20 0 2 4 6 VGS(V)
0
10
20
VDS(V)
Figure 6.
BVDSS (norm) 1.15 1.05 1.0
Normalized BVDSS vs temperature
AM00124v1
Figure 7.
Static drain-source on resistance
AM00122v1
RDS(on) () 0.035
0.0345
0.95 0.9 0.85 0.8
0.0335 0.034
-75 -50 -25
0
25 50 75 100 125 150 TJ(C)
5
10
15
20
25
30
ID(A)
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STW75NF30 Figure 8.
VGS (V) 12 10 8 10 3 6 4 2 101 10-1 10 0 10 2
Electrical characteristics Gate charge vs gate-source voltage Figure 9.
AM00119v1
Capacitance variations
AM00120v1
VGS=10V ID=60A VDD=240V
C (pF) 10 4
Ciss
Coss Crss
0
50
100
150
200
Qg(nC)
10 1
10 2 VDS(V)
Figure 10. Normalized gate threshold volatge vs temperature
VGS(th) (norm) 1.1 1.0 0.9
AM00125v1
Figure 11. Normalized on resistancevs temperature
RDS(on) 2.5 2.0 1.5
AM00126v1
0.8 0.7 0.6 0.5
1.0 0.5 0 -75 -50 -25
-75 -50 -25 0
25 50 75 100 125 150 TJ(C)
0
25
50
75 100 125 150 TJ(C)
Figure 12. Source-drain diode forward characteristics
VDS (V) 0.9 0.8 0.7 0.6 0.5 0.4 0 150C
AM00123v1
Figure 13. Maximum avalanche energy vs temperature
AM00121v1
TJ=-50C 25C
EAS (mJ) 400 350 300 250 200 150 100 50 0
10
20
30
40
50
60
ISD(A)
0
30
60
90
120 TJ(C)
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Test circuits
STW75NF30
3
Test circuits
Figure 15. Gate charge test circuit
Figure 14. Switching times test circuit for resistive load
Figure 16. Test circuit for inductive load Figure 17. Unclamped inductive load test switching and diode recovery times circuit
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
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STW75NF30
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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Package mechanical data
STW75NF30
TO-247 Mechanical data
mm. Min. 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.20 3.70 18.50 3.55 4.50 5.50 3.65 5.50 14.80 4.30 Typ Max. 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75
Dim. A A1 b b1 b2 c D E e L L1 L2 oP oR S
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STW75NF30
Revision history
5
Revision history
Table 8.
Date 23-Oct-2007 27-May-2008 15-Jul-2008
Document revision history
Revision 1 2 3 First release New value inserted in Table 5: Dynamic Document status promoted from preliminary data to datasheet Changes
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STW75NF30
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