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| SR176 13.56 MHz, 176-bit short range contactless user EEPROM with 64-bit Unique ID Not For New Design Features ISO 14443-2 Type B air interface compliant ISO 14443-3 Type B frame format compliant 13.56 MHz carrier frequency 847.5 kHz subcarrier frequency 106 Kbit/s data transfer Data transfer - ASK modulation from Reader to Tag - BPSK coding from Tag to Reader 176-bit EEPROM with Write Protect feature 64-bit Unique Identifier READ BLOCK and WRITE BLOCK (16 bits) Internal tuning capacitor Self-timed programming cycle 5 ms programming time (typical) More than 100 000 Erase/Write cycles More than 40 year data retention Packages - ECOPACK(R) (RoHS compliant) Antenna (A5) Antenna (A4) Antenna (A3) Wafer April 2007 Rev 4 1/35 www.st.com 1 This is information on a product still in production but not recommended for new designs. Contents SR176 Contents 1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.0.1 AC1, AC0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 Input data transfer from the Reader to the SR176 (request frame) . . . . . . 8 Character transmission format for request frame . . . . . . . . . . . . . . . . . . . . 8 Request start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Request end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Output data transfer from the SR176 to the Reader (answer frame) . . . . . 9 Character transmission format for answer frames . . . . . . . . . . . . . . . . . . 10 Answer start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Answer end of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Transmission frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 4.2 Device identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Device selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Device operations (instructions) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 INITIATE() . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SELECT(Chip_ID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 COMPLETION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 READ_BLOCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Read the 64-bit UID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 WRITE_BLOCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PROTECT_BLOCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 GET_PROTECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Power-on state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/35 SR176 Contents 6 7 8 9 10 SR176 command summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 DC and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Appendix A ISO 14443 Type B CRC calculation . . . . . . . . . . . . . . . . . . . . . . . . . 33 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 3/35 List of tables SR176 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Bits in the LOCK_REG parameter, and in the OTP LOCK_REG Register . . . . . . . . . . . . . 21 Chip_ID and LOCK_REG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 A3 antenna specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 A4 antenna specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 A5 antenna specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4/35 SR176 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Pad connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Die floor plan. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Received wave using ASK modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SR176 request frame character format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Request start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Request End Of Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Emitted wave using BPSK subcarrier modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Answer start of frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Answer end of frame. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Example of a complete transmission frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 SR176 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 State transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 INITIATE request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 INITIATE response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8-bit Chip_ID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 INITIATE frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SELECT request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SELECT response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8-bit Chip_ID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SELECT frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . . . . . . 17 COMPLETION request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 COMPLETION frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . 17 READ_BLOCK request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 READ_BLOCK response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 READ_BLOCK frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . 19 64-bit UID storage format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 64-bit unique identifier of the SR176 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 WRITE_BLOCK request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 WRITE_BLOCK frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . 20 PROTECT_BLOCK request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PROTECT_BLOCK frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . 22 GET_PROTECTION request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 GET_PROTECTION response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 GET_PROTECTION frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . 23 INITIATE frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SELECT frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . . . . . . 24 COMPLETION frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . 24 READ_BLOCK frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . . 24 WRITE_BLOCK frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . . . . 24 PROTECT_BLOCK frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . 24 GET_PROTECTION frame exchange between Reader and SR176 . . . . . . . . . . . . . . . . . 25 ASK modulated signal from the Reader to the contactless device . . . . . . . . . . . . . . . . . . . 28 Frame transmission between the Reader and the contactless device . . . . . . . . . . . . . . . . 28 Data jitter on the frame transmitted by the Reader in ASK . . . . . . . . . . . . . . . . . . . . . . . . . 28 A3 antenna specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 A4 antenna specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 A5 antenna specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5/35 Description SR176 1 Description The SR176 is a contactless memory, powered by an externally transmitted radio wave. It contains 176 bits of user EEPROM, fabricated with STMicroelectronics CMOS technology. The memory is organized as 16 blocks of 16 bits, of which 11 blocks are user accessible. The SR176 is accessed via the 13.56 MHz carrier. Incoming data are demodulated and decoded from the received Amplitude Shift Keying modulation signal (ASK). The modulation index of this signal is 10%. Outgoing data are generated by load variation using Bit Phase Shift Keying (BPSK) of a 847.5 kHz subcarrier. The Data transfer rate between the SR176 and the reader is 106 Kbit/s in both reception and emission modes. The SR176 follows the ISO 14443-2 Type B recommendation for radio frequency power and signal interfacing. Figure 1. Pad connections SR176 Power Supply Regulator 176 bit USER EEPROM ASK Demodulator BPSK Load Modulator AC1 AC0 AI09057 The SR176 is principally designed for short range applications, such as object identification, that need a low cost and non-reusable tag. The SR176 does not include any anticollision mechanism. It provides an "addressed" selection mechanism to cope with cases where more than one tag is present within the range of the reader. Table 1. AC1 AC0 Signal names Antenna coil Antenna coil The SR176 contactless EEPROM offers read and write random access in block mode. One block is composed by 16 bits. The device has an instruction set containing seven commands: READ_BLOCK WRITE_BLOCK INITIATE SELECT COMPLETION PROTECT_BLOCK GET_PROTECTION. 6/35 SR176 Signal description The memory array of the SR176 is divided into two main areas: the unique identifier (UID) and the User EEPROM. The UID is a 64-bit unique identifier, written by ST during product manufacture. The User EEPROM is divided into areas which can be write-protected so that they behave as ROM. The write protection is activated using an OTP lock bits register. It is possible to program the SR176 4-bit chip_ID used by the SELECT command. Its default value is fixed at the value 0 (0000b) by ST. When correctly set, up to sixteen SR176 devices can be selected individually. Figure 2. Die floor plan AC0 AC1 AI09782 2 2.0.1 Signal description AC1, AC0 AC1 and AC0 pads must be directly bonded to the antenna. 7/35 Data transfer SR176 3 3.1 Data transfer Input data transfer from the Reader to the SR176 (request frame) The reader that accesses the SR176 must generate a 13.56 MHz sinusoidal carrier wave on its antenna, with enough energy to "tele-power" the SR176 device. The energy received on the SR176 antenna is transformed to a power supply voltage by a regulator, and to data bits through the ASK demodulator. To decode correctly the information sent to the SR176, the reader must use a 10% amplitude modulation of the 13.56 MHz wave, as represented (though not to scale) in Figure 3. The data transfer rate is 106 Kbit/second. Figure 3. Received wave using ASK modulation Data Bit Transmit to the SR176 13.5MHz 10% ASK Modulation Generated by the Reader One bit time is 1/106kHz AI09058 3.2 Character transmission format for request frame Data Bytes are transmitted and received by the SR176 as 10-bit characters, as shown in Figure 4, with the least significant bit (b0) transmitted first. These characters, with the addition of the Start Of Frame (SOF) and the End Of Frame (EOF), are grouped to form a Command Frame as shown in Figure 10. The frame includes an SOF, instructions, addresses, data, a CRC and an EOF as defined by ISO 14443-3 Type B. If an error is detected during the data transfer, no error frame is generated by the SR176, and the instruction is not executed. Each bit duration is referred to as an ETU (Elementary Time Unit). One ETU is equal to 9.44 s (1/106 kHz). 3.3 Request start of frame The SOF, as shown in Figure 5, consists of: one falling edge followed by 10 ETUs at logic 0 followed by one single rising edge followed by at least 2 ETUs (but no more than 3 ETUs) at logic 1. 8/35 SR176 Data transfer 3.4 Request end of frame The EOF, as shown in Figure 6, consists of: one falling edge followed by 10 ETUs set to logic 0 followed by one single rising edge SR176 request frame character format b0 1 ETU Start "0" b1 LSb b2 b3 b4 b5 b6 b7 b8 MSb b9 Stop "1" Figure 4. Information Byte ai07664 Table 2. Bit b0 b1 to b8 b9 Bit description Description Start bit used to synchronize the transmission Information Byte (command, address or data or CRC) Stop bit used to indicate the end of a character Value b0 = 0 Information Byte sent, least significant bit first b9 = 1 Figure 5. Request start of frame b0 b1 0 b2 0 b3 0 b4 0 b5 0 b6 0 b7 0 b8 0 b9 0 b10 1 b11 1 ETU 0 ai07665 Figure 6. Request End Of Frame b0 ETU 0 b1 0 b2 0 b3 0 b4 0 b5 0 b6 0 b7 0 b8 0 b9 0 ai07666 3.5 Output data transfer from the SR176 to the Reader (answer frame) The SR176 uses load modulation to return data to the reader. This modulation is achieved by modifying the SR176 current flow in its antenna. With appropriate detector circuitry, the reader is able to decode the information from the SR176. The data is transmitted using a BPSK coding of a 847.5 kHz subcarrier frequency, fS, as specified in ISO 14443-2 Type B, and as shown in Figure 7. 9/35 Data transfer SR176 3.6 Character transmission format for answer frames The character format is the same as for the input data transfer (Figure 4). The transmitted frames include an SOF, data, a CRC and an EOF (as shown in Figure 10). Like the input data transfer, in case of error, the reader does not emit any error code to the SR176, but must be able to detect and manage this situation. The data transfer rate is 106 Kbit/second. 3.7 Answer start of frame The SOF, as shown in Figure 8, consists of: 10 ETUs at logic 0 2 ETUs at logic 1 3.8 Answer end of frame The EOF, as shown in Figure 9, consists of: 10 ETUs at logic 0 2 ETUs at logic 1 Emitted wave using BPSK subcarrier modulation Data Bit to Transmit to the Reader Figure 7. 847.5kHz BPSK Modulation Generated by the SR176 Or BPSK Modulation at 847.5kHz During One Bit Time (1/106kHz) AI09059 Figure 8. Answer start of frame b0 b1 0 b2 0 b3 0 b4 0 b5 0 b6 0 b7 0 b8 0 b9 0 b10 1 b11 1 ETU 0 ai07665 Figure 9. Answer end of frame b0 b1 0 b2 0 b3 0 b4 0 b5 0 b6 0 b7 0 b8 0 b9 0 b10 1 b11 1 ETU 0 ai07665 10/35 SR176 Data transfer 3.9 Transmission frame Between the Request and the Answer data transfer, there is a guard time without ASK and BPSK modulation, for a minimum period of t0 =128/fS. This delay allows the reader to switch from transmission to reception mode, and is applied after each frame. After t0, the 13.56 MHz carrier frequency is modulated by the SR176 at 847.5 kHz for a period of t1 = 128/fS, to allow the reader to synchronize. After t1, the first phase transition generated by the SR176 represent the start bit (`0') of the Answer SOF. After the falling edge of the Answer EOF, the reader has to wait for the minimum delay, t2, before sending a new Request Frame to the SR176. Figure 10. Example of a complete transmission frame Sent by the Reader SOF 12 bits at 106kb/s Cmd 10 bits Data 10 bits tDR CRC 10 bits CRC 10 bits EOF 10 bits fS=847.5kHz Sy nc t0 128/fS t1 128/fS SOF 12 bits Data CRC CRC EOF 10 bits 10 bits 10 bits 12 bits t2 SOF Sent by the SR176 Input Data Transfer using ASK Output Data Transfer using 847kHz BPSK AI09060 3.10 CRC The 16-bit CRC that is used by the SR176 follows the ISO 14443 Type B recommendation. For further information, see Appendix A. The initial register content is all ones: FFFFh. A two-byte CRC is appended to each Request and each Answer, within each frame, before the EOF. The CRC is calculated on all the Bytes after the SOF, up to the CRC field. On reception of a Request from a reader, the SR176 verifies that the CRC value is valid. If it is invalid, it discards the frame and does not answer the reader. On reception of an Answer from the SR176, it is recommended that the reader verify that the CRC value is valid. If it is invalid, that choice of actions that are to be performed are the responsibility of the reader designer. The CRC is transmitted least significant byte first. Each byte is transmitted least significant bit first. Figure 11. CRC transmission rules LSByte LSbit MSbit LSbit MSByte MSbit CRC 16 (8 bits) CRC 16 (8 bits) ai07667 11/35 Memory mapping SR176 4 Memory mapping The SR176 is organized as 16 blocks of 16 bits, as shown in Figure 12. The first four blocks, from location 0 to 3, are used to store read-only data. They store the 64-bit UID. This value cannot be modified. Blocks from locations 4 to 14 offer a 176-bit EEPROM user area in which the application can store its data values. Block 15 contains the OTP LOCK_REG and the programmed Chip_ID. The PROTECT_BLOCK command is used to lock write access to blocks 4 to 15 in groups of two blocks. The GET_PROTECTION command gives the status of the protection of blocks 4 to 15. Figure 12. SR176 memory mapping Block Address 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 OTP LOCK_REG MSb b15 16-bit block b8 b7 UID0 UID1 UID2 UID3 User Area User Area User Area Lockable EEPROM User Area User Area Lockable EEPROM User Area User Area Lockable EEPROM User Area User Area Lockable EEPROM User Area User Area Lockable EEPROM Reserved Chip_ID ai07699 LSb b0 Description 64-bit UID ROM Lockable EEPROM 4.1 Device identification The SR176 has a 64-bit Unique Identifier (UID) which is written by STMicroelectronics during the manufacturing process. The UID is unique for each tag and cannot be altered. It is stored in a Read Only Memory area (ROM). In the SR176, the UID is stored in the first four blocks of the memory in blocks 0 to 3. 12/35 SR176 Memory mapping 4.2 Device selection After introducing the device in the reader's electromagnetic field, the SR176 has to be activated by a INITIATE command. After this command, the SR176 is in the ACTIVE state and waits for a SELECT command, as shown in Figure 13. The SELECT command specifies a 4-bit Chip_ID as a parameter. If the Chip-ID of the SR176 matches this parameter, the SR176 goes in the SELECTED state, and memory blocks become available for READ_BLOCK and WRITE_BLOCK commands up to the reception of a COMPLETION command. If the Chip_ID does not match, the SR176 returns to, or stays in, the DESELECTED state. Write access rights are activated by the SELECT command. After the Power On of the SR176, if the INITIATE command is not send or is not correctly generated, memory blocks will not be activated, and the SR176 will not respond to any command. 13/35 Device operations (instructions) SR176 5 Device operations (instructions) All instructions, data and the CRC are transmitted to the SR176 in 10-bit character format using ASK modulation. The start bit (b0 of the 10 bits) is sent first. The command frame received by the SR176 on the antenna is demodulated by the 10% ASK demodulator, and is decoded by internal logic. Prior to any operation, the SR176 must have been previously activated by an INITIATE command (as shown in Figure 13). Each frame transmitted to the SR176 must start with a Start Of Frame, followed by one or more data characters, and is ended by two CRC bytes and the End Of Frame. When an invalid frame is decoded by the SR176 (because of a wrong instruction or CRC error), the memory does not send any error code. When a valid frame is received, the SR176 may have to send back data to the reader. For this, it sends 10-bit characters back, with SOF, CRC and EOF, using the BPSK coding. The transfer is ended by the SR176 sending the EOF. Figure 13. State transition diagram POWER-OFF Out of Field READY In Field INITIATE() ACTIVE Out of Field Out of Field SELECT(Chip_ID) SELECT(Chip_ID) SELECTED COMPLETION Out of Field DEACTIVATED DESELECTED SELECT( = Chip_ID) / SELECT(Chip_ID) READ_BLOCK() WRITE_BLOCK() PROTECT_BLOCK() GET_PROTECTION() AI09063B 14/35 SR176 Device operations (instructions) 5.1 INITIATE() Command Code = 06h,00h Prior to any other command, the SR176 must be activated by an INITIATE command. All other commands sent to the SR176 before the INITIATE are ignored. In response to receiving the INITIATE command, the SR176 sends back its Chip_ID, using an 8-bit format (Figure 17). Upon receiving a valid INITIATE command, the SR176 switches to the ACTIVE state, where it will not answer to any new INITIATE command. Once In the ACTIVE state, the SR176 will remain in this state until it receives a valid SELECT command. Request parameters (Figure 14): none Chip_ID (formatted as shown in Figure 16) Response parameters (Figure 15): Figure 14. INITIATE request format SOF 06h INITIATE 00h CRCL 8 bits CRCH 8 bits EOF AI07670B Figure 15. INITIATE response format SOF Chip_ID 4 reserved bits + 4-bit ID CRCL 8 bits CRCH 8 bits EOF AI07701B Figure 16. 8-bit Chip_ID format b7 b6 b5 b4 b3 b3 b2 Block 15 4-bit Chip_ID of the SR176 AI07700B b1 b0 b0 Reserved bits (block 15) Figure 17. INITIATE frame exchange between Reader and SR176 Reader SOF SR176 06h 00h CRCL CRCH EOF t0 t1 SOF Chip_ID CRCL CRCH EOF AI09783 15/35 Device operations (instructions) SR176 5.2 SELECT(Chip_ID) Command Code = 0Eh,(X.ID)h Prior to any memory access, the SR176 must have been set in the SELECTED state by a SELECT() command. All other commands sent to the SR176 before the SELECT(), except INITIATE(), are ignored. In response to receiving the SELECT() command, the SR176 sends back its Chip_ID, using an 8-bit format (Figure 21). Any SR176 that is already in the SELECTED state, and which receives a SELECT() command that does not match its Chip_ID, is automatically put in the DESELECTED state. The SR176 stays in the SELECTED state up to the reception of a COMPLETION or a SELECT with a non-matching Chip_ID. After a PROTECT_BLOCK command, it is necessary to send a new SELECT command in order to load enable the write access again in the internal logic. If a SELECT is not send, the SR176 keeps the previous write access rights. Request parameters (Figure 18): Chip_ID (formatted as shown in Figure 20) Chip_ID (formatted as shown in Figure 20) Response parameters (Figure 19): Figure 18. SELECT request format SOF SELECT 0Eh Chip_ID 4 reserved bits + 4-bit ID CRCL 8 bits CRCH 8 bits EOF AI07702B Figure 19. SELECT response format SOF Chip_ID 4 reserved bit + 4-bit ID CRCL 8 bits CRCH 8 bits EOF AI07703B Figure 20. 8-bit Chip_ID format b7 b6 b5 b4 b3 b3 b2 Block 15 4-bit Chip_ID of the SR176 AI07704B b1 b0 b0 Test bits (block 15) 16/35 SR176 Device operations (instructions) Figure 21. SELECT frame exchange between Reader and SR176 Reader SR176 SOF 0Eh Chip_ID CRCL CRCH EOF t0 t1 SOF Chip_ID CRCL CRCH EOF AI09784 5.3 COMPLETION Command Code = 0Fh When the COMPLETION command is received, the SR176 is put in the DEACTIVED state, and does not decode any new commands up to a Power-Off, and a new Power-On has occurred. This allows a new SR176 to be activated by an INITIATE command, without needing to remove the previous ones. The SR176 does not generate any response when it executes a COMPLETION command (Figure 23). Prior to any COMPLETION command, the SR176 must have been put in the SELECTED mode by a SELECT command. A SR176 which was not selected does not interpret this command. Request parameters (Figure 22): none Figure 22. COMPLETION request format SOF COMPLETION 0Fh CRCL 8 bits CRCH 8 bits EOF AI07679B Figure 23. COMPLETION frame exchange between Reader and SR176 Reader SR176 SOF 0Fh CRCL CRCH EOF No Response AI09785 17/35 Device operations (instructions) SR176 5.4 READ_BLOCK Command Code = 08h,(X.AD) When receiving the READ_BLOCK command, the SR176 reads the requested block and sends back its 16-bit value in response (Figure 26). The AD value of the four least significant bits of the address code, (X.AD) (b3 to b0) represents the block address to be read. For example, address 06h sends back the value of block 6. Prior to any READ_BLOCK command, the SR176 must have been set into the SELECTED state. Request parameters (Figure 24): ADDRESS: to specify an address block from 00h to 0Eh DATAL: least significant Byte DATAH: most significant Byte Response parameters (Figure 25): 5.5 Read the 64-bit UID To read the complete 64-bit UID value from the SR176, the reader must provide a sequence of four READ_BLOCK commands, in the following order (Figure 27): READ_BLOCK @ 0 to get UID0 READ_BLOCK @ 1 to get UID1 READ_BLOCK @ 2 to get UID2 READ_BLOCK @ 3 to get UID3 Figure 24. READ_BLOCK request format SOF READ_BLOCK 08h ADDRESS 4 zero-bits + 4-bit address CRCL 8 bits CRCH 8 bits AI07705B EOF Figure 25. READ_BLOCK response format SOF DATAL 8 bits DATAH 8 bits CRCL 8 bits CRCH 8 bits EOF AI07706B 18/35 SR176 Device operations (instructions) Figure 26. READ_BLOCK frame exchange between Reader and SR176 Reader SOF SR176 08h ADDR CRCL CRCH EOF t0 t1 SOF DATAL DATAH CRCL CRCH EOF AI07707B Figure 27. 64-bit UID storage format b63 b15 UID3 b0 b15 UID2 b0 b15 UID1 b0 b15 UID0 b0 b0 AI07708B Unique Identifier (UID) Members of the SR176 family are uniquely identified by a 64-bit Unique Identifier (UID). This is used for addressing each SR176 device uniquely after the anticollision loop. The UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. It is a read-only code, and comprises (as summarized in Figure 28): an 8-bit prefix, with the most significant bits set to D0h an 8-bit IC Manufacturer code (ISO/IEC 7816-6/AM1) set to 02h (for STMicroelectronics) a 6-bit IC code set to 00 0010b = 2d for SR176 a 42-bit Unique Serial Number Figure 28. 64-bit unique identifier of the SR176 Most significant bits 63 55 47 41 D0h 02h 2d Least significant bits 0 Unique Serial Number AI14078 19/35 Device operations (instructions) SR176 5.6 WRITE_BLOCK Command Code = 09h,(X.AD) Prior to any WRITE_BLOCK command, the SR176 must have been set into the SELECTED state. When executing the WRITE_BLOCK command, the SR176 overwrites the contents of the addressed block with the 16-bit value that was sent in the command, provided that the block is available and not write protected. The AD value of the four least significant bits of the address code (X.AD) (b3 to b0) represents the block address. For example, address 06h specifies that the data should be written in block 6. The SR176 does not generate any response when it executes a WRITE_BLOCK command (Figure 30). The reader must check after the programming time, tW, that the data bits were correctly programmed. Block addresses between 0 to 3 cannot be accessed using the WRITE_BLOCK command (the command has no effect on these blocks). Write access to block 15 is described in the section on the PROTECT_BLOCK command. Request parameters (Figure 29): ADDRESS: address block from 4 to 14 DATAL: least significant Byte DATAH: most significant Byte Figure 29. WRITE_BLOCK request format SOF WRITE_BLOCK ADDRESS DATAL 8 bIts DATAH 8 bIts CRCL 8 bIts CRCH 8 bIts AI07709B EOF 09h 4 zero-bits + 4-bit address Figure 30. WRITE_BLOCK frame exchange between Reader and SR176 Reader SR176 SOF 09h ADDR DATAL DATAH CRCL CRCH EOF No Response AI07710B 20/35 SR176 Device operations (instructions) 5.7 PROTECT_BLOCK Command Code = 09h,0Fh,00h,LOCK_REG Prior to any PROTECT_BLOCK command, the SR176 must have been set into the SELECTED state. The PROTECT_BLOCK command allows the write access to be blocked to memory blocks 4 to 15. It must be followed by a SELECT() command. This re-initializes the write protection conditions to blocks 4 to 15. Until then, the new protection setting is not taken into account by the SR176 logic. The SR176 does not generate any response when it executes a PROTECT_BLOCK command (Figure 32). The reader must use the GET_PROTECTION command to get the information on the protection status. The OTP LOCK_REG controls the write-protection on blocks 4 to 15, and is, itself, OneTime Programmable. Each `1' in the LOCK_REG parameter indicates that the corresponding bit in the OTP LOCK_REG should be set. Each `0' indicates that the corresponding bit should be left unchanged. Once a bit in the OTP LOCK_REG has been set to `1', it is not possible to reset it to `0' and the corresponding memory blocks are forever write protected (and behaves like ROM). Request parameters (Figure 31): LOCK_REG (Table 3) Figure 31. PROTECT_BLOCK request format SOF PROTECT_BLOCK LOCK_REG 00h 8 bIts CRCL 8 bIts CRCH 8 bIts AI07711B EOF 09h 0Fh Table 3. Bits in the LOCK_REG parameter, and in the OTP LOCK_REG Register Meaning 1: set b15 of Block 15 to `1' 0: leave it unchanged 1: set b14 of Block 15 to `1' 0: leave it unchanged 1: set b13 of Block 15 to `1' 0: leave it unchanged 1: set b12 of Block 15 to `1' 0: leave it unchanged 1: set b11 of Block 15 to `1' 0: leave it unchanged 1: set b10 of Block 15 to `1' 0: leave it unchanged 1: set b9 of Block 15 to `1' 0: leave it unchanged 1: set b8 of Block 15 to `1' 0: leave it unchanged Block 15 Bit b15 b14 b13 b12 b11 b10 b9 b8 Meaning 1: Write-Protect Blocks 14 and 15 0: Allow write access 1: Write-Protect Blocks 12 and 13 0: Allow write access 1: Write-Protect Blocks 10 and 11 0: Allow write access 1: Write-Protect Blocks 8 and 9 0: Allow write access 1: Write-Protect Blocks 6 and 7 0: Allow write access 1: Write-Protect Blocks 4 and 5 0: Allow write access 1: Write-Protect Blocks 2 and 3 0: Allow write access 1: Write-Protect Blocks 0 and 1 0: Allow write access Lock Reg Parameter Bit b7 b6 b5 b4 b3 b2 b1 b0 21/35 Device operations (instructions) Figure 32. PROTECT_BLOCK frame exchange between Reader and SR176 Reader SR176 SOF 09h 0Fh 00h LOCK_REG CRCL CRCH EOF No Response SR176 AI07712B 5.8 GET_PROTECTION Command Code = 08h,0Fh Prior to any GET_PROTECTION, the SR176 must have been set into the SELECTED state. GET_PROTECTION allows the protection status of memory blocks 4 to 15 to be read. When receiving the GET_PROTECTION command, the SR176 responds with the 16-bit value of block 15 (Figure 35). It gives the status of the LOCK_REG and the Chip_ID of the SR176. Request parameters (Figure 33): none Chip_ID: least significant Byte LOCK_REG: most significant Byte Response parameters (Figure 34): Figure 33. GET_PROTECTION request format SOF PROTECT_BLOCK 08h 0Fh CRCL 8 bits CRCH 8 bits EOF AI07713B Figure 34. GET_PROTECTION response format SOF Chip_ID 8 bits LOCK_REG 8 bits CRCL 8 bits CRCH 8 bits AI07714B EOF 22/35 SR176 Table 4. Block 15 bits b15 b14 b13 b12 b11 b10 b9 b8 b4 to b7 b0 to b3 Device operations (instructions) Chip_ID and LOCK_REG Response parameter bits LOCK_REG b7 LOCK_REG b6 LOCK_REG b5 LOCK_REG b4 LOCK_REG b3 LOCK_REG b2 LOCK_REG b1 LOCK_REG b0 Chip_ID b4 to b7 Chip_ID b0 to b3 Meaning 1: Blocks 14 and 15 are write-protected (0: indicates that write-access is allowed) 1: Blocks 12 and 13 are write-protected (0: indicates that write-access is allowed) 1: Blocks 10 and 11 are write-protected (0: indicates that write-access is allowed) 1: Blocks 8 and 9 are write-protected (0: indicates that write-access is allowed) 1: Blocks 6 and 7 are write-protected (0: indicates that write-access is allowed) 1: Blocks 4 and 5 are write-protected (0: indicates that write-access is allowed) 1: Blocks 2 and 3 are write-protected (0: indicates that write-access is allowed) 1: Blocks 0 and 1 are write-protected (0: indicates that write-access is allowed) Reserved Chip_ID (Value from 0h to Fh) Figure 35. GET_PROTECTION frame exchange between Reader and SR176 Reader SR176 SOF 08h 0Fh CRCL CRCH EOF t0 t1 SOF Chip_ID LOCK_REG CRCL CRCH EOF AI07716B 5.9 Power-on state After Power-on, the SR176 is in the following state: The device is in the low power mode. The device is deselected. The device presents its highest impedance to the reader antenna field. It will not answer to any command except INITIATE. 23/35 SR176 command summary SR176 6 SR176 command summary Figure 36. INITIATE frame exchange between Reader and SR176 Reader SOF SR176 06h 00h CRCL CRCH EOF t0 t1 SOF Chip_ID CRCL CRCH EOF AI09783 Figure 37. SELECT frame exchange between Reader and SR176 Reader SR176 SOF 0Eh Chip_ID CRCL CRCH EOF t0 t1 SOF Chip_ID CRCL CRCH EOF AI09784 Figure 38. COMPLETION frame exchange between Reader and SR176 Reader SR176 SOF 0Fh CRCL CRCH EOF No Response AI09785 Figure 39. READ_BLOCK frame exchange between Reader and SR176 Reader SOF SR176 08h ADDR CRCL CRCH EOF t0 t1 SOF DATAL DATAH CRCL CRCH EOF AI07707B Figure 40. WRITE_BLOCK frame exchange between Reader and SR176 Reader SR176 SOF 09h ADDR DATAL DATAH CRCL CRCH EOF No Response AI07710B Figure 41. PROTECT_BLOCK frame exchange between Reader and SR176 Reader SR176 SOF 09h 0Fh 00h LOCK_REG CRCL CRCH EOF No Response AI07712B 24/35 SR176 SR176 command summary Figure 42. GET_PROTECTION frame exchange between Reader and SR176 Reader SR176 SOF 08h 0Fh CRCL CRCH EOF t0 t1 SOF Chip_ID LOCK_REG CRCL CRCH EOF AI07716B 25/35 Maximum rating SR176 7 Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 5. Symbol Absolute maximum ratings Parameter Min. 15 Wafer Max. 25 23 Unit C months TSTG, hSTG, tSTG kept in its antistatic bag Storage conditions 15 A3, A4, A5 40% 25 60% 2 C RH years mA V V V V ICC VMAX Supply current on AC0 / AC1 Input voltage on AC0 / AC1 Machine model(1) -20 -7 -100 -1000 -4000 20 7 100 1000 4000 VESD Electrostatic Discharge Voltage Human Body model(1) Human Body model(2) 1. Mil. Std. 883 - Method 3015. 2. ESD test: ISO 10373-6 for proximity cards. 26/35 SR176 DC and ac parameters 8 DC and ac parameters This section summarizes the operating and measurement conditions, and the dc and ac characteristics of the device. The parameters in the dc and ac characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 6. Symbol TA Operating conditions Parameter Wafer Ambient operating temperature A3, A4, A5 -20 85 C Min. -20 Max. 85 Unit C Table 7. Symbol VCC VRET CTUN DC characteristics Parameter Regulated voltage Retromodulation induced voltage Internal tuning capacitor ISO 10373-6 13.56 MHz Condition Min 2.5 20 64 Typ Max 3.5 Unit V mV pF Table 8. Symbol fCC MICARRIER tRFR, tRFF tRFSBL tJIT tMIN CD fS t0 t1 t2 tDR tDA tW AC characteristics(1) Parameter External RF signal frequency Carrier modulation index 10% rise and fall time 10% modulation pulse width ASK modulation data jitter Minimum time from carrier generation to first data Subcarrier frequency Antenna reversal delay Synchronization delay Answer to new request delay Time between request characters Time between answer characters Programming time for WRITE MI=(A-B)/(A+B) 10% to 90% ETU = 128/fCC Coupler to SR176 From H-field Min fCC/16 128/fS 128/fS 14 ETU Coupler to SR176 SR176 to Coupler 132 0 0 5 57 -2 40 847.5 151 151 Condition Min 13.553 10 0.5 9.44 +2 Max 13.567 14 1.5 Unit MHz % s s s s kHz s s s s s ms 1. All timing measurements were performed on a reference antenna with the following characteristics: External size: 75 mm x 48 mm Number of turns: 3 Width of conductor: 1 mm Space between 2 conductors: 0.4 mm Value of the coil: 1.4 H Tuning Frequency: 14.4 MHz. 27/35 DC and ac parameters Figure 43. ASK modulated signal from the Reader to the contactless device SR176 A B tRFF tRFR fCC tRFSBL tMIN CD AI09061B Figure 44. Frame transmission between the Reader and the contactless device tDR tDR 1 0 DATA 1 EOF Frame Transmitted by the Reader in ASK Frame Transmitted by the SR176 in BPSK t0 847.5kHz SOF 11 0 DATA 1 0 CRC 10 t1 tDA tDA tDA AI09786 Figure 45. Data jitter on the frame transmitted by the Reader in ASK tJIT tJIT tJIT tJIT tJIT 0 START tRFSBL tRFSBL tRFSBL tRFSBL tRFSBL AI09787 28/35 SR176 Package mechanical 9 Package mechanical In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 46. A3 antenna specification A A1 B B1 AI09046B Table 9. Symbol A B A1 B1 A3 antenna specification Parameter Coil width Coil length Inlay width Inlay length Overall thickness of copper antenna coil Silicon thickness Type 38 38 43 43 110 180 40 15.1 0.5 114 MHz A/m dbA/m Min 37.5 37.5 42.5 42.5 90 165 Max 38.5 38.5 43.5 43.5 130 195 Unit mm mm mm mm m m Q FNOM PA Unloaded Q value Unloaded free-air resonance H-field energy for device operation 29/35 Package mechanical Figure 47. A4 antenna specification SR176 A A1 B B1 AI07696B Table 10. Symbol A B A1 B1 A4 antenna specification Parameter Coil width Coil length Inlay width Inlay length Overall thickness of copper antenna coil Silicon thickness Type 15 15 19 19 110 180 30 14.5 1.5 123.5 MHz A/m dbA/m Min 14.5 14.5 18.5 18.5 90 165 Max 15.5 15.5 19.5 19.5 130 195 Unit mm mm mm mm m m Q FNOM PA Unloaded Q value Unloaded free-air resonance H-field energy for device operation 30/35 SR176 Figure 48. A5 antenna specification Package mechanical A A1 B B1 AI09071B Table 11. Symbol A B A1 B1 A5 antenna specification Parameter Coil width Coil length Inlay width Inlay length Overall thickness of copper antenna coil Silicon thickness Type 42 65 46 70 140 180 30 14.8 0.25 108 MHz A/m dbA/m Min 41.5 64.5 45.5 69.5 130 165 Max 42.5 65.5 46.5 70.5 150 195 Unit mm mm mm mm m m Q FNOM PA Unloaded Q value Unloaded free-air resonance H-field energy for device operation 31/35 Part numbering SR176 10 Part numbering Table 12. Example: Ordering information scheme SR176 - W4 / XXX Device type SR176 Package W4 = 180 m 15 m Unsawn Wafer SBN18 = 180 m 15 m Bumped and Sawn Wafer on 8-inch Frame A3T = 38 mm x 38 mm Copper Antenna on Continuous Tape A3S = 38 mm x 38 mm Copper Singulated Adhesive Antenna on Tape A4T = 15 mm x 15 mm Copper Antenna on Continuous Tape A4S = 15 mm x 15 mm Copper Singulated Adhesive Antenna on Tape A5T = 42 mm x 65 mm Copper Antenna on Continuous Tape A5S = 42 mm x 65 mm Copper Singulated Adhesive Antenna on Tape Customer code XXX = Given by STMicroelectronics Note: Devices are shipped from the factory with the memory content bits erased to 1. for a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 32/35 SR176 ISO 14443 Type B CRC calculation Appendix A ISO 14443 Type B CRC calculation #include 33/35 Revision history SR176 Revision history Table 13. Date 23-Sep-2002 04-Oct-2004 29-Nov-2004 Document revision history Revision 1.0 2.0 3.0 Document written First public release of full datasheet INITIATE() command specified. Document reformatted. Small text changes. Document status changed from Datasheet to Nor For New Design. All antennas are ECOPACK(R) compliant. Unique Identifier (UID) on page 19 added. CTUN min and max values removed, typical value added in Table 7: DC characteristics. Changes 10-Apr-2007 4 34/35 SR176 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 35/35 |
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