 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| STG6684 High isolation dual SPDT analog switch Features Ultra high off-isolation: -80 dB (typ) at 1 Mhz Ultra low power dissipation: ICC = 0.2 A (max.) at TA = 85 C RPEAK on Tn = 1.30 max (TA = 25 C) at VCC = 4.3 V RPEAK on Sn = 0.55 max (TA = 25 C) at VCC = 4.3 V Wide operating voltage range: VCC (opr) = 1.65 to 4.3 V single supply 4.3 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V Typical bandwidth (-3 dB) at 65 MHz on Sn channel, 58 MHz on the Tn channel Latch-up performance exceeds 100 mA per JESD 78, Class II ESD performance exceeds JESD22 2000-V Human body model (A114-A) The switch Tn is "on" (connected to common port Dn) when the SELn input is held high and "off" (high impedance state exists between the two ports) when SELn is held low. Additional key features are fast switching speed, break-before-make delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. QFN10L (1.8 x 1.4 mm) Description The STG6684 is a high-speed CMOS low voltage dual analog SPDT (single pole dual throw) switch or 2:1 multiplexer/de-multiplexer switch fabricated in silicon gate C2MOS technology. The STG6684 is designed to operate from 1.65 to 4.3 V, making this device ideal for portable applications. The SELn inputs are provided to control the switch operation. The switch Sn is ON (connected to common ports Dn) when the SELn input is held low and OFF (high impedance state exists between the two ports) when SELn is held high. Table 1. Device summary Order code STG6684QTR Package QFN10L (1.8 x 1.4 mm) Packaging Tape and reel January 2008 Rev 1 1/24 www.st.com 24 Table of contents STG6684 Table of contents 1 2 3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 5 6 7 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 STG6684 Pin settings 1 Pin settings Figure 1. Pin connection (top through view) D1 SEL1 9 8 10 S1 T1 VCC 1 GND T2 S2 2 7 3 4 5 6 SEL2 Table 2. 1 2 3 4 5 6 7 8 9 10 Pin description Symbol S1 T1 VCC SEL2 D2 S2 T2 GND SEL1 D1 Name and function Independent channel Independent channel Positive supply voltage Selection control Common channel Independent channel Independent channel Ground (0 V) Selection control Common channel Pin number D2 3/24 Logic diagram STG6684 2 Logic diagram Figure 2. Logic block diagram SEL1 S1 D1 T1 S2 D2 T2 SEL2 Table 3. Truth table SELn L H Switch Sn Sn is connected to Dn OFF(1) Switch Tn OFF(1) Tn is connected to Dn 1. High impedance 4/24 STG6684 Maximum rating 3 Maximum rating Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Symbol VCC VI VIC VO IIKC IIK IOK IO IOP Supply voltage DC input voltage DC control input voltage DC output voltage DC input diode current on control pin (VSEL < 0 V) DC input diode current (VSEL < 0 V) DC output diode current DC output current DC output current peak (pulse at 1 ms, 10% duty cycle) Absolute maximum ratings Parameter Value -0.5 to 5.5 -0.5 to VCC + 0.5 -0.5 to 5.5 -0.5 to VCC + 0.5 - 50 50 20 300 500 100 1120 -65 to 150 300 Unit V V V V mA mA mA mA mA mA mW C C ICC or IGND DC VCC or ground current PD TSTG TL Power dissipation at TA=70 C(1) Storage temperature Lead temperature (10 sec) 1. Derate above 70 C by 18.5 mW/C 5/24 Maximum rating STG6684 3.1 Recommended operating conditions Table 5. Symbol VCC VI VIC VO Top Supply voltage Input voltage Control input voltage Output voltage Operating temperature VCC = 1.65 V to 2.7 V VCC = 3.0 V to 4.3 V Recommended operating conditions Parameter Value 1.65 to 4.3 0 to VCC 0 to 4.3 0 to VCC -40 to 85 0 to 20 ns/V 0 to 10 Unit V V V V C dt/dv Input rise and fall time control input 6/24 STG6684 Electrical characteristics 4 Electrical characteristics Table 6. Symbol DC specifications Value Parameter VCC (V) Test condition TA = 25 C Min 1.65 -1.95 High level input voltage 2.3 -2.5 2.7 -3.0 3.3 -3.6 4.3 1.65 -1.95 2.3 -2.5 Low level input voltage 2.7 -3.0 3.3 -3.6 4.3 4.3 3.6 1.10 1.15 VS = 0 V to VCC IS = 100 mA 1.25 1.35 2.20 0.45 0.48 VS = 0 V to VCC IS = 100 mA 0.51 0.54 0.84 10 14 VS at RPEAK IS = 100 mA 14 15 30 7 7 VS at RPEAK IS = 100 mA 8 9 12 m m 0.65 VCC 1.2 1.3 1.4 1.5 0.25 0.25 0.25 0.30 0.40 1.3 1.4 1.5 1.6 2.9 0.55 0.58 0.62 0.70 1.10 Typ Max -40 to 85 C Unit Min 0.65 VCC 1.2 1.3 1.4 1.5 0.25 0.25 0.25 0.30 0.40 1.5 1.6 1.8 1.9 3.5 0.62 0.65 0.70 0.80 1.30 V V Max VIH VIL RPEAK, Switch Tn ON Tn resistance 3.0 2.7 1.8 4.3 3.6 RPEAK, Sn Switch SnON resistance 3.0 2.7 1.8 4.3 RON, Tn ON resistance match between Tn channels(1) 3.6 3.0 2.7 1.8 4.3 RON, Sn ON resistance match between Sn channels(1) 3.6 3.0 2.7 1.8 7/24 Electrical characteristics Table 6. Symbol STG6684 DC specifications Value Parameter VCC (V) 4.3 Test condition TA = 25 C Min Typ 0.45 0.45 VS = 0 to VCC IS = 100 mA 0.50 0.55 1.10 0.15 0.15 VS = 0 to VCC IS = 100 mA 0.15 0.15 0.35 VS = 0.3 or 4 V Max 0.50 0.50 0.55 0.60 1.70 0.20 0.20 0.20 0.20 0.55 0.1 0.05 0.05 37 33 12 50 40 20 -40 to 85 C Unit Min Max 0.55 0.55 0.60 0.70 2.00 0.20 0.20 0.20 0.20 0.66 1 1 0.2 100 50 30 A A A A RFLAT, Tn ON resistance flatness for Tn channels(2) 3.6 3.0 2.7 1.8 RFLAT, Sn ON resistance flatness for Sn channels(2) 4.3 3.6 3.0 2.7 1.8 IOFF OFF state leakage current (Tn), (Sn), (Dn) SEL leakage current Quiescent supply current Quiescent supply current low voltage driving 4.3 ISEL ICC 0 -4.3 1.65 -4.3 VSEL = 0 to 4.3 V VSEL = VCC or GND VSEL = 1.65 V ICCLV 4.3 VSEL = 1.80 V VSEL = 2.60 V 1. RON = RON(max) - RON(min). 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. 8/24 STG6684 Table 7. Symbol Electrical characteristics AC electrical characteristics (CL = 35 pF, RL = 50 , tr = tf 5 ns) Value Parameter VCC (V) 1.65 - -1.95 tPLH, tPHL Propagation delay 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 VS = 0.8 V tON Turn-ON time 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 VS = 0.8 V tOFF Turn-OFF time 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 tD Break-beforemake time delay 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 Q Charge injection 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 CL = 100 pF RL = 1 M VGEN = 0 V RGEN = 0 CL = 35 pF RL = 50 VS = 1.5 V 2 2 2 2 VS = 1.5 V VS = 1.5 V Test condition TA = 25 C Min Typ 0.45 0.45 ns 0.30 0.30 120 65 42 40 45 18 16 15 18 10 ns 8 6 43 51 pC 51 49 30 30 30 40 ns 40 40 85 55 55 90 ns 65 65 Max -40 to 85 C Min Max Unit 9/24 Electrical characteristics Table 8. Symbol STG6684 Analog switch characteristics (CL = 5 pF, RL = 50 , TA = 25 C) Value Parameter VCC (V) Test condition TA = 25 C Min VS=1 VRMS, f=1 MHz, RL = 50 VS=1 VRMS, f = 10 MHz, RL = 50 VS =1 VRMS, f = 100 kHz RL = 50 VS=1 VRMS, f = 1 MHz RL = 50 VS=1 VRMS, f = 1 MHz Signal = 0 dBm VS=1 VRMS, f = 10 MHz Signal = 0 dBm VS=1 VRMS, f = 1 MHz Signal = 0 dBm VS=1 VRMS, f = 10 MHz Signal = 0 dBm f = 20 Hz to 20 kHz , RL= 600 CL = 50 pF VIN = 2 VP-P VDC = VCC/2 RL = 50 Signal = 0 dBm RL = 50 Signal = 0 dBm Typ -80 dB -60 Max -40 to 85 C Min Max Unit Off isolation OIRRTn for switch T1,T2 1.65 - -4.3 -66 dB -45 Off isolation OIRRSn for switch S1, S2 1.65 - -4.3 -90 dB XtalkSn Crosstalk between S1 and S2 1.65 - 4.3 - -69 dB -85 dB -74 XtalkTn Crosstalk between T1 and T2 1.65 - 4.3 - THDSn Total harmonic distortion 2.3 - 4.3 - 0.01 % BWTn -3dB bandwidth for switch T1, T2 -3dB bandwidth for switch S1,S2 1.65 - 4.3 - 58 MHz BWSn 1.65 - 4.3 - 65 MHz 10/24 STG6684 Electrical characteristics Value Symbol Parameter VCC (V) Test condition TA = 25 C Min CSEL Control pin input capacitance Tn port capacitance when the switch is enabled Sn port capacitance when the switch is enabled VCC = 0 V Typ 9 Max -40 to 85 C Min Max Unit CON,Tn 3.3 f = 1 MHz 113 CON,Sn 3.3 f = 1 MHz 88 pF Tn port capacitance COFF,Tn when the switch is disabled Sn port capacitance COFF,Sn when the switch is disabled 3.3 f = 1 MHz 85 3.3 f = 1 MHz 40 11/24 Test circuit STG6684 5 Test circuit Figure 3. ON resistance I DS V V CC S1 D VS S2 IN GND GND CS14071 12/24 STG6684 Figure 4. OFF leakage V CC Test circuit I S(OFF) D I D(OFF) A V SS A V D S2 IN V CC GND CS14081 Figure 5. OFF isolation V CC S1 50 V OUT S2 IN GND VS GND CS00381 13/24 Test circuit Figure 6. Bandwidth V CC STG6684 D S1 V OUT S2 V IN CC GND CS00371 Figure 7. Switch-to-switch crosstalk CS14091 14/24 STG6684 Figure 8. Test circuit Test circuit 1. CL = 5/35 pF or equivalent (includes jig and probe capacitance) 2. RL = 50 or equivalent 3. RT = ZOUT of pulse generator (typically 50 ) 15/24 Test circuit STG6684 Figure 9. Break-before-make time delay Figure 10. Switching time and charge injection (VGEN = 0, RGEN = 0 RL = 1 M , , CL = 100 pF) Figure 11. Turn on, turn off delay time VCC S1 D VOUT RL S2 CL IN V IN GND 16/24 STG6684 Application diagram 6 Application diagram Figure 12. Application diagram SEL1 = High Class-D output S1 R D1 L BB T1 S2 D2 T2 SEL2 = High Figure 13. Application diagram SEL1 = High R S1 D1 T1 Class-D output L BB S2 D2 T2 SEL2 = High 17/24 Package mechanical data STG6684 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 14. QFN10L (1.8 x 1.4 mm) package outline 7936408 Rev.D 18/24 STG6684 Table 2. QFN10L(1.8 x 1.4 mm) mechanical data Symbol A A1 A3 b D E e L 0.35 0.15 1.75 1.35 Millimeters Min 0.45 0 Typ 0.50 0.02 0.127 0.20 1.80 1.40 0.40 0.40 Package mechanical data Max 0.55 0.05 0.25 1.85 1.45 0.45 Figure 15. QFN10L (1.8 x 1.4 mm) footprint recommendations 19/24 Package mechanical data STG6684 Figure 16. QFN10L (1.8 x 1.4 mm) carrier tape 20/24 STG6684 Package mechanical data Figure 17. QFN10L (1.8 x 1.4 mm) reel information - front side 21/24 Package mechanical data Figure 18. QFN10L(1.8 x 1.4 mm) reel information - back view STG6684 22/24 STG6684 Revision history 8 Revision history Table 9. Date 9-Jan-2008 Document revision history Revision 1 Initial release. Changes 23/24 STG6684 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 24/24 |
Price & Availability of STG6684QTR
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |