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| IRFBC40AS, SiHFBC40AS Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 42 10 20 Single D FEATURES 600 1.2 * Low Gate Charge Qg results in Simple Drive Requirement * Improved Gate, Avalanche and Dynamic dV/dt Ruggedness * Fully Characterized Capacitance Avalanche Voltage and Current * Effective Coss Specified * Lead (Pb)-free Available and Available RoHS* COMPLIANT D2PAK (TO-263) APPLICATIONS * Switch Mode Power Supply (SMPS) G * Uninterruptible Power Supply * High Speed Power Switching GD S S N-Channel MOSFET TYPICAL SMPS TOPOLOGIES * Single Transistor Forward ORDERING INFORMATION Package Lead (Pb)-free SnPb Note a. See device orientation. D2PAK (TO-263) IRFBC40ASPbF SiHFBC40AS-E3 IRFBC40AS SiHFBC40AS D2PAK (TO-263) IRFBC40ASTRLPbFa SiHFBC40ASTL-E3a IRFBC40ASTRLa SiHFBC40ASTLa D2PAK (TO-263) IRFBC40ASTRRPbFa SiHFBC40ASTR-E3a IRFBC40ASTRRa SiHFBC40ASTRa ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Currente Pulsed Drain Currenta, e Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc, e Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 29.6 mH, RG = 25 , IAS = 6.2 A (see fig. 12). c. ISD 6.2 A, dI/dt 88 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. e. Uses IRFBC40A/SiHFBC40A data and test conditions. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 www.vishay.com 1 TC = 25 C EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM LIMIT 600 30 6.2 3.9 25 1.0 570 6.2 13 125 6.0 - 55 to + 150 300d W/C mJ A mJ W V/ns C A UNIT V WORK-IN-PROGRESS IRFBC40AS, SiHFBC40AS Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJC TYP. MAX. 40 1.0 UNIT C/W SPECIFICATIONS TJ = 25 C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf VGS = 0 V, ID = 250 A Reference to 25 C, ID = 1 VGS = 30 V VDS = 600 V, VGS = 0 V VDS = 480 V, VGS = 0 V, TJ = 125 C VGS = 10 V ID = 3.7 Ab VDS = 50 V, ID = 3.7 A mAd 600 2.0 3.4 0.66 - 4.0 100 25 250 1.2 - V V/C V nA A S VDS = VGS, ID = 250 A VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 480 V, f = 1.0 MHz VDS = 0 V to 480 VGS = 10 V Vc - 1036 136 7.0 1487 36 48 13 23 31 18 42 10 20 ns nC pF ID = 6.2 A, VDS = 480 V, see fig. 6 and 13b - VDD = 300 V, ID = 6.2 A, RG = 9.1 , RD = 47 , see fig. 10b - - 431 1.8 6.2 A 25 1.5 647 2.8 V ns C G S TJ = 25 C, IS = 6.2 A, VGS = 0 Vb TJ = 25 C, IF = 6.2 A, dI/dt = 100 A/sb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. c. COSS eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising fom 0 to 80 % VDS. d. Uses IRHFBC40A/SiHFBC40A data and test conditions. www.vishay.com 2 Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 IRFBC40AS, SiHFBC40AS Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless otherwise noted Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 www.vishay.com 3 IRFBC40AS, SiHFBC40AS Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 IRFBC40AS, SiHFBC40AS Vishay Siliconix RD VDS VGS RG D.U.T. + - VDD 10 V Pulse width 1 s Duty factor 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 15 V VDS tp VDS L Driver RG 20 V tp D.U.T IAS 0.01 + A - VDD IAS Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRFBC40AS, SiHFBC40AS Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 12d - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 k 12 V 10 V QGS QG 0.2 F 0.3 F QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 IRFBC40AS, SiHFBC40AS Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer + + - RG * * * * dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91113. Document Number: 91113 S-Pending-Rev. A, 23-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1 |
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