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| NCP360 USB Positive Overvoltage Protection Controller with Internal PMOS FET and Status FLAG NCP360 is able to disconnect the systems from its output pin in case wrong VBUS operating conditions is detected. The system is positive over-voltage protected up to +20 V. Thanks to this device using internal PMOS FET, no external device is necessary, reducing the system cost and the PCB area of the application board. NCP360 is able to instantaneously disconnect the output from the input if the input voltage exceeds the overvoltage threshold (OVLO). NCP360 provides a negative going flag (FLAG) output, which alerts the system that a fault has occurred. In addition, the device has ESD-protected input (15 kV Air) when bypassed with a 1 mF or larger capacitor. Features http://onsemi.com MARKING DIAGRAMS UDFN6 TBD SUFFIX CASE 517AB M = Date Code 1 ZD M G 5 1 TSOP-5 TBD SUFFIX CASE 483 1 SYAAYWG G * * * * * * * * * * * * * * * * * Very Fast Protection, Up to 20 V, with 25 mA Current Consumption On-chip PMOS Transistor Overvoltage Lockout (OVLO) Undervoltage Lockout (UVLO) Alert FLAG Output EN Enable Pin Thermal Shutdown Compliance to IEC61000-4-2 (Level 4) 8 kV (Contact) 15 kV (Air) ESD Ratings: Machine Model = B ESD Ratings: Human Body Model = 3 6 Lead UDFN 2x2 mm Package 5 Lead TSOP 3x3 mm Package These are Pb-Free Devices A = Assembly Location Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device NCP360MUTBG Package UDFN6 (Pb-Free) UDFN6 (Pb-Free) TSOP-5 (Pb-Free) TSOP-5 (Pb-Free) Shipping 3000/T ape & Reel NCP360MUTXG 10000/T ape & Reel NCP360SNT1G 3000/T ape & Reel NCP360SNT3G 10000/T ape & Reel Applications USB Devices Mobile Phones Peripheral Personal Digital Applications MP3 Players For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Q (c) Semiconductor Components Industries, LLC, 2007 1 May, 2007 - Rev. 1 Publication Order Number: NCP360/D NCP360 PIN CONNECTIONS EN 1 GND 2 IN 3 UDFN6 (Top Views) PAD1 6 FLAG 5 OUT 4 OUT IN GND EN 1 2 3 TSOP-5 4 FLAG 5 OUT PIN FUNCTION DESCRIPTION (UDFN6 Package) Pin No. 1 Name EN Type INPUT Description Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND to a pull down or to a I/O pin. This pin does not have an impact on the fault detection. Ground Input Voltage Pin. This pin is connected to the VBUS. A 1 mF low ESR ceramic capacitor, or larger, must be connected between this pin and GND. Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is above OVLO threshold or below UVLO threshold. A 1 mF capacitor must be connected to these pins. The two OUT pins must be hardwired to common supply. Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to VCC must be added. Exposed Pad. Can be connected to GND or isolated plane. Must be used to thermal dissipation. 2 3 4, 5 GND IN OUT POWER POWER OUTPUT 6 FLAG OUTPUT - PAD1 POWER PIN FUNCTION DESCRIPTION (TSOP-5 Package) Pin No. 1 2 3 Name IN GND EN Type POWER POWER INPUT Description Input Voltage Pin. This pin is connected to the VBUS. A 1 mF low ESR ceramic capacitor, or larger, must be connected between this pin and GND. Ground Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND to a pull down or to a I/O pin. This pin does not have an impact on the fault detection. Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to VCC must be added. Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is above OVLO threshold or below UVLO threshold. A 1 mF capacitor must be connected to this pin. 4 FLAG OUTPUT 5 OUT OUTPUT http://onsemi.com 2 NCP360 INPUT 3 IN 4 OUT 5 OUT NCP360 1 EN FLAG GND 2 6 C2 OUTPUT FLAG Power 1 mF 25 V X5R 0603 R1 1M J2 2 1 FLAG_State 1 mF 25 V X5R 0603 C1 FLAG Figure 1. Typical Application Circuit (UDFN Pinout) INPUT OUTPUT (2 out pins in UDFN package) Thermal Shutdown Soft Start FLAGV EN LDO VREF UVLO OVLO Figure 2. Functional Block Diagram http://onsemi.com 3 NCP360 MAXIMUM RATINGS Rating Minimum Voltage (IN to GND) Minimum Voltage (All others to GND) Maximum Voltage (IN to GND) Maximum Voltage (All others to GND) Maximum Current from Vin to Vout (PMOS) Thermal Resistance, Junction-to-Air (Note 1) Operating Ambient Temperature Range Storage Temperature Range Junction Operating Temperature ESD Withstand Voltage (IEC 61000-4-2) Human Body Model (HBM), Model = 2 (Note 2) Machine Model (MM) Model = B (Note 3) Moisture Sensitivity TSOP-5 UDFN Symbol Vminin Vmin Vmaxin Vmax Imax RqJA TA Tstg TJ Vesd Value -0.3 -0.3 21 7.0 600 305 260 -40 to +85 -65 to +150 150 15 Air, 8.0 Contact 2000 200 Level 1 Unit V V V V mA C/W C C C kV V V - MSL Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. RqJA is highly dependent on the PCB heat sink area (connected to PAD1, UDFN). See PCB Recommendations. 2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114. 3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115. 4. Compliant with JEDEC Latch-up Test, up to maximum voltage range. ELECTRICAL CHARACTERISTICS (Min/Max limits values (-40C < TA < +85C) and Vin = +5.0 V. Typical values are TA = +25C, unless otherwise noted.) Characteristic Input Voltage Range Undervoltage Lockout Threshold Uvervoltage Lockout Hysteresis Overvoltage Lockout Threshold Overvoltage Lockout Hysteresis Vin versus Vout Dopout Supply Quiescent Current OVLO Supply Current Output Off State Current FLAG Output Low Voltage FLAG Leakage Current EN Voltage High EN Voltage Low EN Leakage Current TIMINGS Start Up Delay FLAG going up Delay Output Turn Off Time ton tstart toff From Vin > UVLO to Vout = 0.8xVin, See Fig 3 From Vin > UVLO to FLAG = 1.2 V, See Fig 3 From Vin > OVLO to Vout 0.3 V, See Fig 4 Vin increasing from 5 V to 8 V at 1 V/ms. No output capacitor. From Vin > OVLO to FLAG 0.4 V, See Fig 4 Vin increasing from 5 V to 8 V at 3 V/ms From EN 0.4 to 1.2V to Vout 0.3 V, See Fig 5 Vin = 4.75 V. No output capacitor. 4.0 3.0 0.8 1.5 15 ms ms ms Symbol Vin UVLO UVLOhyst OVLO OVLOhyst Vdrop Idd Idduvlo Istd Volflag FLAGleak Vih Vol ENleak Vin = 5 V, I charge = 500 mA No Load, Vin = 5.25 V Vin = 7 V Vin = 5.25 V, EN = 1.2 V Vin > OVLO, Sink 1 mA on FLAG pin FLAG level = 5 V Vin from 3.3 V to 5.25 V Vin from 3.3 V to 5.25 V EN = 5.5 V or GND 170 1.2 0.4 5.0 Vin rises up OVLO threshold Vin falls down UVLO threshold Conditions Min 1.2 2.85 50 5.43 50 3.0 70 5.675 100 105 24 50 26 Typ Max 20 3.15 90 5.9 125 200 35 85 37 400 Unit V V mV V mV mV mA mA mA mV nA V V nA Alert Delay Disable Time Thermal Shutdown Temperature Thermal Shutdown Hysteresis NOTE: tstop tdis Tsd Tsdhyst 1.0 2.0 150 30 2.0 ms ms C C Thermal Shutdown parameter has been fully characterized and guaranteed by design. http://onsemi.com 4 NCP360 Figure 4. Shutdown on Over Voltage Detection EN 1.2 V tdis EN 1.2 V OVLO Vout Vin - RDS(on) x I FLAG 0.3 V Vin UVLO 3 ms FLAG Figure 5. Disable on EN = 1 Figure 6. FLAG Response with EN = 1 CONDITIONS IN OUT VIN > OVLO or VIN < UVLO Voltage Detection Figure 7. CONDITIONS IN OUT UVLO < VIN < OVLO Voltage Detection Figure 8. http://onsemi.com 5 NCP360 TYPICAL OPERATING CHARACTERISTICS Figure 9. Startup Vin = Ch1, Vout = Ch3 Figure 10. FLAG Going Up Delay Vout = Ch3, FLAG = Ch2 Figure 11. Output Turn Off Time Vin = Ch1, Vout = Ch2 Figure 12. Alert Delay Vout = Ch1, FLAG = Ch3 Figure 13. Disable Time EN = Ch1, Vout = Ch2, FLAG = Ch3 Figure 14. Thermal Shutdown Vin = Ch1, Vout = Ch2, FLAG = Ch3 http://onsemi.com 6 NCP360 TYPICAL OPERATING CHARACTERISTICS 450 400 350 RDS(on) (mW) 300 250 200 150 100 50 0 -50 0 50 TEMPERATURE (C) 100 150 Vin = 5 V Vin = 3.6 V Figure 15. Direct Output Short Circuit 180 160 140 120 100 80 60 40 20 0 1 3 5 7 9 11 13 15 17 19 21 -40 C 125C 25C Figure 16. RDS(on) vs. Temperature (Load = 500 mA) IQ, SUPPLY QUIESCENT CURRENT (mA) Vin, INPUT VOLTAGE (V) Figure 17. Supply Quiescent Current vs. Vin http://onsemi.com 7 NCP360 In Operation EN Input NCP360 provides overvoltage protection for positive voltage, up to 20 V. A PMOS FET protects the systems (i.e.: VBUS) connected on the Vout pin, against positive over-voltage. The Output follows the VBUS level until OVLO threshold is overtaken. Undervoltage Lockout (UVLO) To enable normal operation, the EN pin shall be forced to low or connected to ground. A high level on the pin disconnects OUT pin from IN pin. EN does not overdrive an OVLO or UVLO fault. Internal PMOS FET To ensure proper operation under any conditions, the device has a built-in undervoltage lock out (UVLO) circuit. During Vin positive going slope, the output remains disconnected from input until Vin voltage is above 3.2 V nominal. The FLAGV output is pulled to low as long as Vin does not reach UVLO threshold. This circuit has a 50 mV hysteresis to provide noise immunity to transient condition. Vin (V) 20 V OVLO UVLO 0 NCP360 includes an internal PMOS FET to protect the systems, connected on OUT pin, from positive overvoltage. Regarding electrical characteristics, the RDSon, during normal operation, will create low losses on Vout pin, characterized by Vin versus Vout dropout. (See Figure 16). ESD Tests NCP360 fully support the IEC61000-4-2, level 4 (Input pin, 1 mF mounted on board). That means, in Air condition, Vin has a 15 kV ESD protected input. In Contact condition, Vin has 8 kV ESD protected input. Please refer to Fig 19 to see the IEC 61000-4-2 electrostatic discharge waveform. Vout OVLO UVLO 0 Figure 18. Output Characteristic vs. Vin Overvoltage Lockout (OVLO) To protect connected systems on Vout pin from overvoltage, the device has a built-in overvoltage lock out (OVLO) circuit. During overvoltage condition, the output remains disabled until the input voltage exceeds OVLO Hysteresis. FLAG output is tied to low until Vin is higher than OVLO. This circuit has a 100 mV hysteresis to provide noise immunity to transient conditions. FLAG Output Figure 19. PCB Recommendations NCP360 provides a FLAG output, which alerts external systems that a fault has occurred. This pin is tied to low as soon the OVLO threshold is exceeded When Vin level recovers normal condition, FLAG is held high. The pin is an open drain output, thus a pull up resistor (typically 1 MW- Minimum 10 kW) must be provided to Vbattery. FLAG pin is an open drain output. The NCP360 integrates a 500 mA rated PMOS FET, and the PCB rules must be respected to properly evacuate the heat out of the silicon. The UDFN PAD1 must be connected to ground plane to increase the heat transfer if necessary from an application standpoint. Of course, in any case, this pad shall be not connected to any other potential. http://onsemi.com 8 NCP360 PACKAGE DIMENSIONS UDFN6 2x2, 0.65P CASE 517AB-01 ISSUE B D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.25 0.35 2.00 BSC 1.50 1.70 2.00 BSC 0.80 1.00 0.65 BSC 0.20 --0.25 0.35 PIN ONE REFERENCE 2X 0.10 C 2X 0.10 C 0.10 C A 6X 0.08 C 6X L 1 3 6X K III III III A3 A1 D2 e E2 6 4 6X E SOLDERING FOOTPRINT* 6X 0.95 C SEATING PLANE 1 0.47 6X 0.40 4X 1.70 0.65 PITCH 2.30 DIMENSIONS: MILLIMETERS b 0.10 C A 0.05 C B BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 NCP360 PACKAGE DIMENSIONS TSOP-5 CASE 483-02 ISSUE G NOTE 5 2X D 5X 0.20 C A B M 0.10 T 0.20 T L G A 5 1 2 4 3 2X B S K DETAIL Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 DETAIL Z J C 0.05 H T SEATING PLANE SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative http://onsemi.com 10 NCP360/D |
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