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Preliminary RT9014/A Ultra Low Noise 300mA Dual LDO Regulator with POR, NMOS Driver and Requiring No Bypass Capacitor General Description RT9014/A is a dual channel, low noise, and low dropout with the sourcing ability up to 300mA, an open drain driver and power-on reset function. The open-drain output is capable of sinking 150mA for LED backlighting applications. The range of output voltage is from 1.2V to 3.6V by operating from 2.5V to 5.5V input. RT9014/A offers 2% accuracy, extremely low dropout voltage (240mV @ 300mA), and extremely low ground current, only 27A per LDO. The shutdown current is near zero current which is suitable for battery-power devices. Other features include current limiting, over temperature, output short circuit protection. RT9014/A is short circuit thermal folded back protected. RT9014/A lowers its OTP trip point from 165C to 110C when output short circuit occurs (VOUT < 0.4V) providing maximum safety to end users. RT9014/A can operate stably with very small ceramic output capacitors, reducing required board space and component cost. RT9014/A is available in fixed output voltages in the WDFN-10L 3x3 package. Features Wide Operating Voltage Ranges : 2.5V to 5.5V Low-Noise for RF Application No Noise Bypass Capacitor Required Fast Response in Line/Load Transient TTL-Logic-Controlled Shutdown Input Low Temperature Coefficient Dual LDO Outputs (300mA/300mA) 1 Open-Drain Driver Ultra-low Quiescent Current 27A/LDO High Output Accuracy 2% Short Circuit Protection Thermal Shutdown Protection Current Limit Protection Short Circuit Thermal Folded Back Protection Tiny 10-Lead WDFN Package RoHS Compliant and 100% Lead (Pb)-Free Ordering Information RT9014/APackage Type QW : WDFN-10L 3x3 (W-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Output Voltage : VOUT1/VOUT2 FM : 1.50V/2.80V, FP : 1.50V/3.00V GK : 1.80V/2.60V, GM : 1.80V/2.80V GP : 1.80V/3.00V, JG : 2.50V/1.80V JM : 2.50V/2.80V, JP : 2.50V/3.00V JN : 2.50V/2.85V, PJ : 3.00V/2.50V PP : 3.00V/3.00V, CS : 1.2V/3.3V EN Function Independent EN Function Dependent Note : Richtek Pb-free and Green products are : 1 2 3 4 5 11 10 9 Applications CDMA/GSM Cellular Handsets Battery-Powered Equipment Laptop, Palmtops, Notebook Computers Hand-Held Instruments PCMCIA Cards Portable Information Appliances Pin Configurations (TOP VIEW) VIN EN NC SW SET 1 2 3 4 5 11 10 9 GND RT9014 WDFN-10L 3x3 DS9014/A-08 August 2007 RT9014A 9 VOUT1 VOUT2 8 POR 7 DRV GND 9 VIN EN1 EN2 SW SET GND VOUT1 VOUT2 8 POR 7 DRV GND RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating. www.richtek.com 1 RT9014/A Typical Application Circuit 100K Preliminary 100K VIN VIN CIN 1uF Chip Enable EN POR DRV RT9014 VOUT1 VIN VIN CIN 1uF Chip Enable EN1 EN2 SW POR DRV RT9014A VOUT1 DRV Enable SW 100k SET COUT1 1uF COUT2 1uF VOUT1 DRV Enable 100k COUT1 1uF COUT2 1uF VOUT1 VOUT2 GND VOUT2 SET GND CDELAY VOUT2 VOUT2 CDELAY Functional Pin Description Pin No. RT9014-PQW 1 2 --3 RT9014A- 1 -2 3 -Pin Name VIN EN EN1 EN2 NC Pin Function Supply Input. Chip Enable (Active High). Chip Enable 1 (Active High). Chip Enable 2 (Active High). No Internal Connection Pin. Active high signal drives open-drain N-MOSFET. 4 4 SW Note that this pin is high impedance. There should be a pull low 100k resistor connected to GND when the control signal is floating. Delay Set Input: Connect external capacitor to GND to set the 5 6 7 8 9 10 5 6 7 8 9 10 SET GND DRV POR internal delay for the POR output. When left open, there is no delay. This pin cannot be grounded. Common Ground. Open-Drain Output: Capable of sinking 150mA. Power-On Reset Output: Open-drain output. Active low indicates an output under-voltage condition on regulator 2. VOUT2 Channel 2 Output Voltage VOUT1 Channel 1 Output Voltage The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Exposed Pad (11) Exposed Pad (11) GND Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. www.richtek.com 2 DS9014/A-08 August 2007 Preliminary Available Voltage Version Code Voltage Code Voltage C 1.2 L 2.7 F 1.5 M 2.8 W 1.6 N 2.85 G 1.8 V 2.9 D 1.85 P 3 Y 1.9 Q 3.1 H 2 R 3.2 E 2.1 S 3.3 J 2.5 --K 2.6 --- RT9014/A T 2.65 --- Function Block Diagram Shutdown and Logic Control VREF VIN MOS Driver VOUT1 Current-Limit and Thermal Protection GND + Error Amplifier EN 0.2uA Shutdown and Logic Control VREF - MOS Driver VOUT2 + Error Amplifier Current-Limit and Thermal Protection GND SET POR& Delay POR DRV SW RT9014 SW Logic To be continued DS9014/A-08 August 2007 www.richtek.com 3 RT9014/A Preliminary EN1 0.2uA Shutdown and Logic Control VIN VREF - MOS Driver VOUT1 Current-Limit and Thermal Protection GND + Error Amplifier EN2 0.2uA Shutdown and Logic Control VREF - MOS Driver VOUT2 + Error Amplifier Current-Limit and Thermal Protection GND SET POR& Delay POR DRV SW RT9014A SW Logic www.richtek.com 4 DS9014/A-08 August 2007 Preliminary Absolute Maximum Ratings (Note 1) RT9014/A 6V 6V 0.926W 108C/W 260C -65C to 150C 2kV 200V Supply Input Voltage -----------------------------------------------------------------------------------------------------Other I/O Pin Voltages --------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25C WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 4) WDFN-10L 3x3, JA ------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 2) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions (Note 3) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 5.5V Enable Input Voltage ------------------------------------------------------------------------------------------------------ 0V to 5.5V Junction Temperature Range -------------------------------------------------------------------------------------------- -40C to 125C Ambient Temperature Range -------------------------------------------------------------------------------------------- 0C to 85C Electrical Characteristics (VIN = VOUT + 1V, VEN = VIN, CIN = COUT = 1F, TA = 25C, unless otherwise specified.) Parameter Input Voltage Dropout Voltage (Note 5) Symbol VIN VDROP VOUT V VLINE Test Conditions VIN = 2.5V to 5.5V IOUT = 150mA IOUT = 300mA Min 2.5 --1.2 Typ -120 240 ----450 58 ---100 170 40 Max 5.5 --3.6 +2 0.2 0.6 700 80 1 -0.4 ---- Units V mV mV V % %/V % mA uA uA V ppm/C C C Output voltage range VOUT Accuracy Line Regulation Load Regulation Current Limit Quiescent Current Shutdown Current EN Threshold Output Voltage TC Thermal Shutdown Thermal Shutdown Hysteresis IOUT = 1mA VIN = (VOUT + 0.3V) to 5.5V or VIN > 2.5V, whichever is larger -2 --330 --1.5 --- VLOAD 1mA < IOUT< 300mA RLOAD = 1 IQ IQ_SD VIH VIL TSD TSD VEN > 1.5V VEN < 0.4V VIN = 2.5V to 5.5V, Power On VIN = 2.5V to 5.5V, Shutdown --- To be continued DS9014/A-08 August 2007 www.richtek.com 5 RT9014/A Parameter PSRR ILOAD = 10mA Sym bol Preliminary Test Conditions f =100Hz PSRR f =1kHz f =10kHz f =100Hz Min ------Typ 65 60 50 65 50 50 Max ------Units dB dB dB dB dB dB PSRR ILOAD = 150mA Power Good PSRR f =1kHz f =10kHz VTHL Reset Threshold VTHH POR Output Logic Low Voltage POR Leakage Current Set pin current source Set pin threshold DRV output Voltage Low Leakage current SW input current V IL V IH VO L IPOR Low Threshold, % of nominal V OUT2 (Flag On) High Threshold, % of nominal V OUT2 (Flag Off) ILOW = 250uA Flag Off V SET = 0 POR = high 85 92 --1 0.60 -- 90 95 0.02 0.01 1.25 1.4 93 98 0.1 1 1.70 -- % % V A A V IDRV = 150mA IDRV = 0mA, VDRV = 5V, SW = 0V V IL < 0.6V(DRV Shutdown) V IH > 2.5V(DRV Enable) Logic Low Logic High --1 -1 -1 -1.5 0.2 0.01 0.01 0.01 --- 0.5 1 1 1 0.4 -- V A A A V V SW input voltage Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. JA is measured in the natural convection at T A = 25C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 5. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) - 100mV. www.richtek.com 6 DS9014/A-08 August 2007 Preliminary Typical Operating Characteristics Output Voltage vs. Temperature 1.9 RT9014/A Output Voltage vs. Temperature 3.4 RT9014/A-GS, VOUT1 RT9014-GS, VOUT2 Output Voltage (V) Output Voltage (V) 1.85 3.35 1.8 3.3 1.75 3.25 1.7 -50 -25 0 25 50 75 100 125 3.2 -50 -25 0 25 50 75 100 125 Temperature (C) Temperature (C) Quiescent Current vs. Temperature 70 Dropout Voltage vs. Load Current 350 300 Quiescent Current (uA) 65 Dropout Voltage (mV) RT9014/A-GS VIN = VEN = VSW = 4.3V CIN = COUT1 = COUT2 = 1uF/X7R RT9014/A-GS, VOUT2 TJ = 125C TJ = 25C 250 200 150 100 50 60 TJ = -40C 55 50 -50 -25 0 25 50 75 100 125 0 0 50 100 150 200 250 300 Temperature (C) Load Current (mA) 20 PSRR RT9014-FM, VOUT1 VIN = 4.3V 0.1V CIN = COUT1 = COUT2 = 1uF/X7R 10000 1000 100 10 1 0.1 POR Delay RT9014/A-FM 0 ILOAD = 100mA ILOAD = 50mA PSRR (dB) -20 -40 ILOAD = 10mA -60 POR Delay Time (ms) -80 0.01 10 0.1 100 1 1000 10k 10000 100k 100000 1000k 1000000 0.01 0.0001 0.0010 0.0100 0.1000 1.0000 Frequency (Hz) (Hz) POR Setting Capacitance (uF) DS9014/A-08 August 2007 www.richtek.com 7 RT9014/A Line Transient Response RT9014/A-GS, Both ILOAD = 1mA VIN = 3.8V to 4.8V Preliminary Line Transient Response RT9014/A-GS, Both ILOAD = 10mA VIN = 3.8V to 4.8V VIN 4.8 (V) 3.8 VIN 4.8 (V) 3.8 VOUT2 (10mV/Div) VOUT1 (10mV/Div) VOUT2 (10mV/Div) VOUT1 (10mV/Div) Time (100s/Div) Time (100s/Div) Line Transient Response RT9014/A-GS, Both ILOAD = 50mA VIN = 3.8V to 4.8V Line Transient Response RT9014/A-GS, Both ILOAD = 100mA VIN = 3.8V to 4.8V VIN 4.8 (V) 3.8 VIN 4.8 (V) 3.8 VOUT2 (10mV/Div) VOUT1 (10mV/Div) VOUT2 (10mV/Div) VOUT1 (10mV/Div) Time (100s/Div) Time (100s/Div) Load Transient Response RT9014/A-GS, ILOAD = 10mA to 50mA VIN = VEN = 4.3V CIN = COUT1 = COUT2 = 1uF/X7R Load Transient Response RT9014/A-GS, ILOAD = 10mA to 100mA VIN = VEN = 4.3V CIN = COUT1 = COUT2 = 1uF/X7R IOUT (50mA/Div) VOUT1 (20mV/Div) VOUT2 (20mV/Div) Time (250s/Div) IOUT (100mA/Div) VOUT1 (20mV/Div) VOUT2 (20mV/Div) Time (250s/Div) www.richtek.com 8 DS9014/A-08 August 2007 Preliminary RT9014/A EN Pin Shutdown Response RT9014/A-FM, VIN = VSW = 5V IOUT1 = IOUT2 = 50mA Start Up RT9014/A-FM, VIN = VSW = 5V IOUT1 = IOUT2 = 50mA (5V/Div) VEN V OUT2 (5V/Div) V EN VOUT2 V OUT1 V OUT1 (1V/Div) Time (5s/Div) (1V/Div) Time (50s/Div) Power-On RT9014/A-FM Both ILOAD = 10mA Noise RT9014/A-GS, No LOAD VIN = VEN = VSW = 4.5V(By battery) 150 CIN = COUT1 = COUT2 = 1uF/X7R 100 Noise (V/Div) VEN (5V/Div) VOUT1 (1V/Div) VOUT2 (2V/Div) POR (5V/Div) Time (10s/Div) 50 0 -50 -100 -150 Time (10ms/Div) Noise 300 200 RT9014/A-GS, ILOAD = 50mA VIN = VEN = VSW = 4.5V(By battery) CIN = COUT1 = COUT2 = 1uF/X7R Noise (V/Div) 100 0 -100 -200 -300 Time (10ms/Div) DS9014/A-08 August 2007 www.richtek.com 9 RT9014/A Applications Information Preliminary Like any low-dropout regulator, the external capacitors used with the RT9014/A must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1F on the RT9014/A input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The RT9014/A is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1F with ESR is > 20m on the RT9014/A output ensures stability. The RT9014/A still works well with output capacitor of other types due to the wide stable ESR range. Figure 1. shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the RT9014/A and returned to a clean analog ground. Thermal Considerations Thermal protection limits power dissipation in RT9014/A. When the operation junction temperature exceeds 170C, the OTP circuit starts the thermal shutdown function and turns the pass element off. The pass element turn on again after the junction temperature cools by 40C. RT9014/A lowers its OTP trip level from 170C to 110C when output short circuit occurs (VOUT < 0.4V) as shown in Figure 2. It limits IC case temperature under 100C and provides maximum safety to customer while output short circuit occurring. VOUT Short to GND 0.4V VOUT IOUT TSD 170 C 110 C OTP Trip Point 110 C IC Temperature 80 C Region of Stable COUT ESR vs. Load Current 100 Figure 2. Short Circuit Thermal Folded Back Protection when Output Short Circuit Occurs (Patent) For continuous operation, do not exceed absolute maximum operation junction temperature 125C. The power dissipation definition in device is : PD = (VIN - VOUT) x IOUT + VIN x IQ Region of Stable C OUT ESR () Region of Stable C OUT ESR () 10 RT9014-FM, VIN = 5V CIN = COUT1 = COUT2 = 1uF/X7R Unstable Range 1 0.1 Stable Range 0.01 Simulation Verify 0.001 0 50 100 150 200 250 300 The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) /JA Where T J(MAX) is the maximum operation junction temperature 125C, TA is the ambient temperature and the JA is the junction to ambient thermal resistance. DS9014/A-08 August 2007 Load Current (mA) Figure 1. Stable Cout ESR Range www.richtek.com 10 Preliminary For recommended operating conditions specification of RT9014/A, where T J(MAX) is the maximum junction temperature of the die (125C) and TA is the operated ambient temperature. The junction to ambient thermal resistance (JA is layout dependent) for WDFN-10L 3x3 package is 108C/W on the standard JEDEC 51-3 singlelayer thermal test board. The maximum power dissipation at TA = 25C can be calculated by following formula : P D(MAX) = ( 125C - 25C ) / 108 = 0.926W for WDFN-10L 3x3 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance JA . For RT9014/A packages, the Figure 3 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. RT9014/A 1 0.9 Power Dissipation (W) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 100 125 WDFN-10L 3x3 Ambient Temperature (C) Figure 3. Derating Curves for RT9014/A Packages DS9014/A-08 August 2007 www.richtek.com 11 RT9014/A Outline Dimension D2 Preliminary D L E E2 SEE DETAIL A 1 e A A1 A3 b 2 1 2 1 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol A A1 A3 b D D2 E E2 e L Dimensions In Millimeters Min 0.700 0.000 0.175 0.180 2.950 2.300 2.950 1.500 0.500 0.350 0.450 Max 0.800 0.050 0.250 0.300 3.050 2.650 3.050 1.750 Dimensions In Inches Min 0.028 0.000 0.007 0.007 0.116 0.091 0.116 0.059 0.020 0.014 0.018 Max 0.031 0.002 0.010 0.012 0.120 0.104 0.120 0.069 W-Type 10L DFN 3x3 Package Richtek Technology Corporation Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com www.richtek.com 12 DS9014/A-08 August 2007 |
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