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| STP10NK70ZFP STP10NK70Z N-CHANNEL 700V - 0.75 - 8.6A - TO220-TO220FP Zener-Protected SuperMESHTM MOSFET General features Type VDSS RDS(on) ID 8.6 A 8.6 A Pw 110 W 35 W STP10NK70Z 700 V <0.85 STP10NK70ZFP 700 V <0.85 s s s s s s Package EXTREMELY HIGH dv/dt CAPABILITY 3 IMPROVED ESD CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEABILITY TO-220 1 2 3 1 2 TO-220FP Internal schematic diagram Description The SuperMESHTM series is obtained through an extreme optimization of ST's well established strip-based PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Applications s s HIGH CURRENT, HIGH SPEED SWITCHING IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTOR AND PFC Order codes Sales Type STP10NK70Z STP10NK70ZFP Marking P10NK70Z P10NK70ZFP Package TO-220 TO-220FP Packaging TUBE TUBE August 2005 Rev 2 1/13 www.st.com 13 1 Electrical ratings STP10NK70Z - STP10NK70ZFP 1 Table 1. Electrical ratings Absolute maximum ratings Parameter TO-220 VDS VDGR VGS ID ID Drain-Source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20k) Gate-Source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor 8.6 5.4 34 150 1.20 4000 4.5 --55 to 150 2500 700 700 30 8.6 (Note 3) 5.4 (Note 3) 34 (Note 3) 35 0.28 Value TO-220FP V V V A A A W W/C V V/ns V C Unit Symbol IDM Note 2 PTOT Vesd(G-S) dv/dt Note 1 VISO Tj Tstg G-S ESD (HBM C=100pF, R=1.5k) Peak Diode Recovery voltage slope Insulation Withstand Volatge (DC) Operating Junction Temperature Storage Temperature Table 2. Thermal data TO-220 TO-220FP 3.6 62.5 300 Unit C/W C/W C Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-amb Max Maximum Lead Temperature For Soldering Purpose 0.83 Table 3. Symbol IAR EAS Avalanche characteristics Parameter Avalanche Current, repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj=25C, ID=IAR, VDD = 50V) Max Value 8.6 350 Unit A mJ 2/13 STP10NK70Z - STP10NK70ZFP 2 Electrical characteristics 2 Electrical characteristics (TCASE = 25 C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS On/off states Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate Body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-Source On Resistance Test Conditions ID = 1mA, V GS= 0 VDS = Max Rating, VDS = Max Rating,Tc = 125C VGS = 20V, VDS = 0 VDS= VGS, ID = 100 A VGS= 10 V, ID= 4.5 A 3 3.75 0.75 Min. 700 1 50 10 Typ. Max. Unit V A A A V IGSS VGS(th) RDS(on) 4.5 0.85 Table 5. Symbol gfs Note 4 Ciss Coss Crss Coss eq. Note 5 Qg Qgs Qgd Dynamic Parameter Forward Transconductance Test Conditions VDS =15V, ID = 4.5A Min. Typ. 7.7 2000 190 41 98 64 12 33 90 Max. Unit S pF pF pF pF nC nC nC Input Capacitance VDS =25V, f=1 MHz, V GS=0 Output Capacitance Reverse Transfer Capacitance Equivalent Ouput Capacitance VGS=0, VDS =0V to 560V Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=560V, ID = 9 A VGS =10V (see Figure 17) Table 6. Symbol td(on) tr td(off) tf tr(Voff) tf tc Switching times Parameter Turn-on Delay Time Rise Time Test Conditions VDD=350 V, ID=4.5 A, RG=4.7, VGS=10V (see Figure 18) VDD=350 V, ID=4.5A, RG=4.7, VGS=10V (see Figure 18) VDD=560 V, ID=9A, RG=4.7, VGS=10V (see Figure 18) Min. Typ. 22 19 Max. Unit ns ns Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time 46 19 11 10 22 ns ns ns ns ns 3/13 2 Electrical characteristics STP10NK70Z - STP10NK70ZFP Table 7. Symbol ISD ISDMNote 2 VSDNote 4 trr Qrr IRRM Source drain diode Parameter Source-drain Current Source-drain Current (pulsed) Forward on Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD=8.6 A, V GS=0 ISD=9A, di/dt = 100A/s, VDD=35 V, Tj=150C 720 5.4 15 Test Conditions Min. Typ. Max. 8.6 34 1.6 Unit A A V ns C A Table 8. Symbol BVGSO Note 6 Gate-source zener diode Parameter Gate-Source Breakdown Voltage Test Conditions Igs=1mA (Open Drain) Min. 30 Typ. Max. Unit V (1) ISD 8.6 A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX (2) Pulse width limited by safe operating area (3) Limited only by maximum temperature allowed (4) Pulsed: pulse duration = 300s, duty cycle 1.5% (5) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%VDSS (6)The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. 4/13 STP10NK70Z - STP10NK70ZFP 2 Electrical characteristics 2.1 Electrical Characteristics (curves) Safe Operating Area for TO-220 Figure 2. Thermal Impedanc for TO-220 Figure 1. Figure 3. Safe Operating Area for TO-220FP Figure 4. Thermal Impedance for TO-220FP Figure 5. Output Characteristics Figure 6. Transfer Characteristics 5/13 2 Electrical characteristics STP10NK70Z - STP10NK70ZFP Figure 8. Static Drain-Source on Resistance Figure 7. Transconductance Figure 9. Gate Charge vs Gate -Source Voltage Figure 11. Capacitance Variations Figure 10. Normalized Gate Threshold Voltage Figure 12. Normalized on Resistance vs vs Temperatute Temperature 6/13 STP10NK70Z - STP10NK70ZFP Figure 13. Source-drain Diode Forward Characteristics 2 Electrical characteristics Figure 14. Normalized BVDSS vs Temperature Figure 15. Maximum Avalanche Energy vs Temperature 7/13 3 Test circuits STP10NK70Z - STP10NK70ZFP 3 Test circuits Figure 17. Gate Charge Test Circuit Figure 16. Switching Times Test Circuit For Resistive Load Figure 18. Test Circuit For Indictive Load Switching and Diode Recovery Times Figure 20. Unclamped Inductive Load Test Circuit Figure 19. Unclamped Inductive Waveform 8/13 STP10NK70Z - STP10NK70ZFP 4 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/13 4 Package mechanical data STP10NK70Z - STP10NK70ZFP TO-220 MECHANICAL DATA DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154 oP Q 10/13 STP10NK70Z - STP10NK70ZFP 4 Package mechanical data TO-220FP MECHANICAL DATA mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409 DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 O A B L3 L6 L7 F1 F D G1 H F2 L2 L5 E 123 L4 G 11/13 5 Revision History STP10NK70Z - STP10NK70ZFP 5 Revision History Date 22-Aug-2005 Revision 2 Inserted Ecopack indication Changes 12/13 STP10NK70Z - STP10NK70ZFP 5 Revision History Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 13/13 |
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