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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Transceiver with 3-State Outputs Product Features * PI74ALVCH32245 is designed for low voltage operation * VCC = 2.3V to 3.6V * Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25C * Typical VOHV (Output VOH Undershoot) > 2.0V at VCC = 3.3V, TA = 25C * Bus Hold retains last active bus state during 3-State, eliminating the need for external pullup resistors * Industrial operation at 40C to +85C * Packages available: 96-ball, 13.5mm x 5.5mm x 1.4mm low profile fine pitch ball grid array, LFBGA (NB) Product Description Pericom Semiconductors PI74ALVCH series of logic circuits are produced using the Companys advanced 0.5 micron CMOS technology, achieving industry leading speed grades. The PI74ALVCH32245 is a 32-bit bidirectional transceiver designed for asynchronous two-way communication between data buses. The direction control input pin (xDIR) determines the direction of data flow through the bidirectional transceiver. The Direction and Output Enable controls are designed to operate this device as either four independent 8-bit transceivers, two 16-Bit transceivers, or one 32-Bit transceiver. The output enable (OE) input, when HIGH, disables both A and B ports by placing them in HIGH Z condition. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current sinking ability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Logic Block Diagram (Positive Logic) 1DIR A3 A4 1OE 1A1 A5 A2 1B1 2A1 E5 E2 2B1 2DIR H3 H4 2OE To Seven Other Channels To Seven Other Channels 3DIR J3 J4 3OE 3A1 J5 J2 3B1 4DIR T3 T4 4OE 4A1 N5 N2 4B1 To Seven Other Channels To Seven Other Channels 1 PS8437 08/24/01 Product Pin Description Pin Name xOE xDIR xAx xBx GND VCC Description 3-State Output Enable Inputs (Active LOW) Direction Control Input Side A Inputs or 3-State Inputs Side B Outputs or 3-State Outputs Ground Power 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Tranceiver with 3-State Outputs Truth Table(1) Inputs ( 1 ) xOE L L H xDIR L H X Outputs ( 1 ) Bus B Data to Bus A Bus A Data to Bus B Z NB Package (Top View) Notes: 1. H = High Voltage Level L = Low Voltage Level X = Dont Care Z = High Impedance 6 5 4 3 2 1 A B C D E F G H J K L MN P R T Terminal Assignments 6 5 4 3 2 1 1A2 1A1 1OE 1DIR 1B1 1B2 A 1A4 1A3 GND GND 1B3 1B4 B 1A6 1A5 V CC V CC 1B5 1B6 C 1A8 1A7 GND GND 1B7 1B8 D 2A2 2A1 GND GND 2B1 2B2 E 2A4 2A3 V CC V CC 2B3 2B4 F 2A6 2A5 GND GND 2B5 2B6 G 2A7 2A8 2OE 2DIR 2B8 2B7 H 3A2 3A1 3OE 3DIR 3B1 3B2 J 3A4 3A3 GND GND 3B3 3B4 K 3A6 3A5 V CC V CC 3B5 3B6 L 3A8 3A7 GND GND 3B7 3B8 M 4A2 4A1 GND GND 4B1 4B2 N 4A4 4A3 V CC V CC 4B3 4B4 P 4A6 4A5 GND GND 4B5 4B6 R 4A7 4A8 4OE 4DIR 4B8 4B7 T 2 PS8437 08/24/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Tranceiver with 3-State Outputs Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Supply Voltage Range,VCC ............................................................... 0.5V to 4.6V Input Voltage Range, VI: Except I/O ports (1) .............................. 0.5V to 4.6V I/O ports (1,2) ........................... 0.5V to VCC + 0.5V Output Voltage Range, VO (1,2) ............................................ 0.5V to VCC +0.5V Input Clamp Current, IIK (VI <0) ........................................................ 50mA Output Clamp Current, IOK (VO <0) .................................................. 50mA Continuous Output Current, IO ................................................................... 50mA Continuous Current through each VCC or GND ............................... 100mA Package Thermal Impedance, JA(3) ............................................................. 40C/W Storage Temperature Range, TSTG ............................................... 65C to 150C Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Note: 1. The input negative voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 4.6V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. Recommended Operating Conditions(1) Parame te rs VCC VIH VIL VIN VOUT IOH D e s cription Supply Voltage Input HIGH Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V 0 0 VCC = 2.3V VCC = 2.7V VCC = 3.0V VCC = 2.3V VCC = 2.7V VCC = 3.0V 0 40 Te s t Conditions M in. 2.3 1.7 2.0 0.7 0.8 VCC VCC 12 12 24 12 12 24 10 85 ns/V C mA Typ. M ax. 3.6 Units V Input LO W Voltage Input Voltage O utput Voltage O utput HIGH Current O utput LO W Current Input Transition Rise or Fall Rate O perating Free- Air Temperature IOL t/V TA Note 1: All unused inputs must be held at VCC or GND to ensure proper device operation 3 PS8437 08/24/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Tranceiver with 3-State Outputs DC Electrical Characteristics (Over the Operating Range, TA = 40C to +85C, VCC = 3.3V 10%) Parame te rs D e s cription Te s t Conditions (1) IOH = - 100A, VCC = Min. to Max. VIH = 1.7V, IOH = - 6mA, VCC = 2.3V VOH O utput HIGH Voltage VIH = 1.7V, IOH = - 12mA, VCC = 2.3V VIH = 2.0V, IOH = - 12mA, VCC = 2.7V VIH = 2.0V, IOH = - 12mA, VCC =3.0V VIH = 2.0V, IOH = - 24mA, VCC =3.0V IOL = - 100A, VIL = Min. to Max. VIL = 0.7V, IOL = 6mA, VCC = 2.3V VOL O utput LO W Voltage VIL = 0.7V, IOL = 12mA, VCC = 2.3V VIL = 0.8V, IOL = 12mA, VCC = 2.7V VIL = 0.8V, IOL = 24mA, VCC =3.0V IIN Input Current VIN = VCC or GND, VCC = 3.6V VIN = 0.7V, VCC = 2.3V IIN (HOLD) Input Hold Current VIN = 1.7V, VCC = 2.3V VIN = 0.8V, VCC = 3.0V VIN = 2.0V, VCC = 3.0V VIN = 0 to 3.6V, VCC = 3.6V(3) IOZ ICC ICC CI CIO O utput Current (3- State O utputs) Supply Current Supply Current per Input @ TTL HIGH Control Inputs A or B Ports VOUT = VCC or GND, VCC = 3.6V VCC = 3.6V, IOUT = 0A, VIN = GND or VCC VCC = 3.0V to 3.6V O ne Input at VCC - 0.6V O ther Inputs at VCC or GND VIN = VCC or GND, VCC = 3.3V VO = VCC or GND, VCC = 3.3V 4 8 45 45 75 75 500 10 40 750 A M in. VCC- 0.2 2.0 1.7 2.2 2.4 2.0 0.2 0.4 0.7 0.4 0.55 5 Typ.(2) M ax. Units V pF Notes: 1. For Min. or Max conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient and maximum loading. 3. This is the bushold maximum dynamic current. It is the mimum overdrive current necessary to switch the input from one state to another. 4 PS8437 08/24/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Tranceiver with 3-State Outputs Switching Characteristics over Operating Range(1) Parame te rs tPD tEN tDIS From (INPUT) A or B OE OE To (OUTPUT) B or A B or A B or A VCC = 2.5V 0.2V M in.(2) 1.0 1.0 1.5 M ax. 3.7 5.7 5.2 VCC = 2.7V M in.(2) M ax. 3.6 5.4 4.6 VCC = 3.3V 0.3V M in.(2) 1.0 1.0 1.0 M ax. 3.0 4.4 4.1 ns Units Notes: 1. See test circuit and waveforms, Figures 1 and 2. 2. Minimum limits are guaranteed but not tested on Propagation Delays. Operating Characteristics, TA = 25C Parame te r CPD Power Dissipation Capacitance Outputs Enabled Outputs Disabled Te s t Conditions CL = 50pF, f = 10 MHz VCC = 2.5V 0.2V VCC = 3.3V 0.3V Typical 44 8 58 10 Units pF 5 PS8437 08/24/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Tranceiver with 3-State Outputs PARAMETER MEASUREMENT INFORMATION VCC = 2.5V 0.2V 2 x VCC From Output Under Test CL = 30pF (See Note A) 500 S1 Open GND Te s t tpd tPLZ/tPZH tPHZ/tPZH S1 O pen 2 x VCC GND 500 Load Circuit Timing Input tsu Data Input VCC VCC/2 0V th VCC VCC/2 VCC/2 0V tW VCC Input VCC/2 VCC/2 0V Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) VCC VCC/2 tPZL VCC/2 VOL +0.15V tPHZ VCC/2 VOH -0.15V VOH 0V VOL VCC/2 0V tPLZ VCC Voltage Waveforms Setup and Hold Times VCC Input VCC/2 tPLH VCC /2 VCC/2 0V tPHL VOH Output VCC/2 VOL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH Output Waveform 2 S1 at GND (see Note B) Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having the following characteristics: PRR MHz, ZO = 50, tR 2.0ns, tF 2.0ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis F. tPZL and tPZH are the same as ten G. tPLH and tPHL are the same as tpd 6 PS8437 08/24/01 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 PI74ALVCH32245 3.3V, 32-Bit Bidirectional Tranceiver with 3-State Outputs PARAMETER MEASUREMENT INFORMATION VCC = 2.7V and 3.3V 0.3V 6V From Output Under Test CL = 50pF (See Note A) 500 S1 Open GND Te s t tpd tPLZ/tPZH tPHZ/tPZH S1 O pen 6V GND 500 Load Circuit 2.7V Timing Input tsu Data Input 1.5V 0V th 2.7V 1.5V 1.5V 0V tW 2.7V Input 1.5V 1.5V 0V Voltage Waveforms Pulse Duration Output Control (Low Level Enabling) 2.7V 1.5V tPZL 1.5V VOL +0.3V tPHZ 1.5V VOH -0.3V VOH 0V VOL 1.5V 0V tPLZ 3V Voltage Waveforms Setup and Hold Times 2.7V Input 1.5V tPLH 1.5V 1.5V 0V tPHL VOH Output 1.5V VOL Output Waveform 1 S1 at 6V (see Note B) t PZH Output Waveform 2 S1 at GND (see Note B) Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Figure 2. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having the following characteristics: PRR MHz, ZO = 50, tR 2.5ns, tF 2.5ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis F. tPZL and tPZH are the same as ten G. tPLH and tPHL are the same as tpd Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com 7 PS8437 08/24/01 |
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