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SM6802A Class-D Stereo Amplifier for Portable Device OVERVIEW The SM6802A is an analog-input, class-D stereo amplifier. Class-D operation provides high efficiency and low power consumption. The device also incorporates an original real-time operation dynamic range compression function that effectively suppresses the distortion in the saturation level region output by soft-clipping, boosting the average sound pressure from the speaker during playback. It also incorporates an input equalizer pin for output speaker frequency characteristics adjustment. These features make the device ideal for use in mobile telephones and speaker applications requiring miniaturization and high-efficiency. The output stage has a BTL output configuration where the output waveform inverts only the modulation components, enabling direct drive connection, without using an LC filter, to a dynamic speaker. The device is available in miniature 20-pin QFN packages, and requires only a peripheral chip capacitor to form a miniature amplifier circuit. FEATURES I I PINOUT (Top view) LEQN VREF1 TESTN MUTEN LOUTN 20 19 18 17 16 I I I I I APPLICATIONS I I I PACKAGE DIMENSIONS (Unit: mm) 4.20 0.20 Cellular phone PDA Digital still camera ORDERING INFORMATION 4.20 0.20 4.00 0.10 Device SM6802AB Package 20-pin QFN 4.00 0.10 20 1 0.50 REQN VSS1 PWDN DRCN ROUTN Operating supply voltage: 2.7 to 5.5V Low current consumption: 6mA (VDD1 = VDD2 = VDD3 = 3.6V) Output power: 0.7W + 0.7W (VDD1 = VDD2 = VDD3 = 3.6V, 8 load) Output fundamental frequency: 125kHz Gain * 6dB (Normal) * 15dB to 6dB automatic adjustment in response to the input level (Dynamic range compression mode) Silicon-gate CMOS process Package: 20-pin QFN LEQP LIN VDD1 RIN REQP 1 2 3 4 5 6 7 8 9 10 15 14 13 12 11 VDD3 LOUTP VSS2 ROUTP VDD2 0.60 0.10 0.05 0.22 0.05 0.05 M 1.00MAX NIPPON PRECISION CIRCUITS INC.--1 + 0.03 0.02 - 0.02 0.22 SM6802A BLOCK DIAGRAM LEQP LEQN TESTN DRCN PWDN MUTEN VDD3 LIN - + LEVEL SHIFTER PWM Modulator LEVEL SHIFTER BUFFER LOUTP - + BUFFER LOUTN VREF1 RIN REQP REQN BIAS VREF - + OSC MUTE,POWERDOWN, PROTECTION VSS2 LEVEL SHIFTER PWM Modulator LEVEL SHIFTER BUFFER ROUTP - + BUFFER ROUT VSS1 VDD1 VDD2 PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name*1 LEQP LIN VDD1 RIN REQP REQN VSS1 PDWN DRCN ROUTN VDD2 ROUTP VSS2 LOUTP VDD3 LOUTN MUTEN TESTN VREF1 LEQN I/O*2 I I - I I I - I I O - O - O - O I Ip - O Lch equalizer network connection Lch signal input Supply (input system) Rch signal input Rch equalizer network connection Rch equalizer network connection Ground (input system) Power-down control (active LOW) Dynamic range compression mode setting (HIGH: normal operation, LOW: compression mode) Rch speaker minus (-) output Supply (output stage) Rch speaker plus (+) output Ground (output stage) Lch speaker plus (+) output Supply (output stage) Lch speaker minus (-) output Mute control (active LOW) Test pin (HIGH: normal operation, LOW: test mode) Reference voltage 1 (bias voltage) Lch equalizer network connection Function *1. VDDS = VDD1, VDDP = VDD2 = VDD3, VSS = VSS1 = VSS2 *2. Ip = input pin with built-in pull-up resistor NIPPON PRECISION CIRCUITS INC.--2 SM6802A SPECIFICATIONS Absolute Maximum Ratings Parameter Symbol VDDS Supply voltage range VDDP VSS Input voltage range Storage temperature range Output current Power dissipation VIN TSTG IO PD Rating -0.3 to 4.6 -0.3 to 7.0 0 VSS - 0.3 to VDDS + 0.3 -55 to 125 600 1500 (Ta = 25C)*1 Unit V V V V C mA mW *1. When mounted on a 3.5cm x 3.5cm board, the power dissipation is related to the operating temperature by the following equation. I I I Maximum junction temperature: TMAX = 125C Operating ambient temperature: Ta = [C] Thermal resistance: J = 66.6C/W PD = (TMAX - Ta) J 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 Power dissipation [W] 1.500 1.200 0.900 0.600 25 35 45 55 65 75 85 Operating temperature [C] Recommended Operating Conditions VSS = VSS1 = VSS2 = VSS3 = 0V, VDDS =VDD1, VDDP = VDD2, VDD3 unless otherwise noted. Parameter Supply voltage 1 Supply voltage 2 Operating ambient temperature Note. VDDP VDDS Symbol VDDS VDDP Ta Rating 2.7 to 3.6 2.7 to 5.5 -40 to 85 Unit V V C NIPPON PRECISION CIRCUITS INC.--3 SM6802A Electrical Characteristics DC Characteristics VSS1 = VSS2 = 0V, VDD1 = 2.7 to 3.6V, VDD2 = VDD3 = 2.7 to 5.5V, Ta = -40 to 85C unless otherwise noted. Rating Parameter Pin Symbol IDD1A IDD1S Current consumption VDD2 VDD2 = VDD3 = 3.6V IDDAS VIH1 VIL1 Input voltage 2 MUTEN, PDWN TESTN, DRCN, MUTEN, PDWN TESTN, DRCN, MUTEN, PDWN VIH2 VIL2 Input current Input leakage current IIL1 ILH1 (Note 2) VDD2 = VDD3 = 5V HIGH level LOW level HIGH level LOW level VIN = VSS VIN = VDD1 - 0.7VDD1 - 1.6 - - - 0.1 - - - - 25 - 0.3 - 0.3VDD1 - 0.4 90 1.0 A V V V V A A - 0.1 0.3 A IDDAA (Note 1) (Note 2) VDD2 = VDD3 = 3.6V (Note 1) VDD2 = VDD3 = 5V - 2.0 7.0 mA Conditions min - - - VDD1 typ 5.0 0.1 0.6 max 7.0 0.5 2.0 mA A mA Unit Input voltage 1 TESTN, DRCN Note 1. MUTEN = HIGH, PDWN = HIGH, input and VREF1 connected by 600, DRCN = HIGH, no-load output Note 2. MUTEN = LOW, PDWN = LOW, input and VREF1 connected by 600, DRCN = HIGH, no-load output NIPPON PRECISION CIRCUITS INC.--4 SM6802A AC Analog Characteristics VDD1 = VDD2 = VDD3 = 3.6V, VSS1 = VSS2 = 0V, 0.708Vrms analog input amplitude, 1kHz input signal frequency, Ta = 25C, "Measurement Block Diagram", "Measurement Conditions", "Measurement Circuit", DRCN = PDWN = MUTEN = HIGH, unless otherwise noted. Analog Input Characteristics (LIN, RIN) Rating Parameter Reference input amplitude 1 Reference input amplitude 2 Input resistance Input clipping voltage Symbol VAI1 VAI2 RIN VCLP PO = 0.5W PO = 0.25W PO = 0.05W Conditions min - - 42 0.7 typ 0.708 0.142 60 1 max - - 78 1.3 Vrms Vrms k Vrms Unit Analog Output Characteristics (LOUTP, LOUTN, ROUTP, ROUTN) Rating Parameter Symbol Conditions min Voltage gain 1 Voltage gain 2 Residual noise voltage Total harmonic distortion + noise Channel crosstalk Maximum output power Mute-mode output voltage HIGH-level output voltage LOW-level output voltage Efficiency Ripple rejection ratio 1 A1 A2 VNS THD + N CC POMAX VMUTE VOH VOL EEF PSRR1 Maximum output power conditions (Note 2) DRCN = HIGH, input amplitude = 0.1Vrms DRCN = LOW, input amplitude = 0.05Vrms DRCN = HIGH, input and VREF1 connected by 600 PO = 0.2W, reference input amplitude 1 (Note 1) Output power when THD = 10% Output power when MUTEN = LOW 4.0 13.0 - - -60.0 0.6 -90.0 VDDP - 0.2 0 80 - typ 6.0 15.0 78 0.4 -70.0 0.7 -110 VDDP - 0.02 0.02 83 -65 max 8.0 17.0 120 1.0 - 0.8 - VDDP + 0.2 0.2 - - dB dB Vrms % dB W dBV V V % dB Unit Note 1. Cross-channel leakage signal with standard voltage input on one channel only. Note 2. DRCN = HIGH, 217Hz ripple frequency, 0.2Vrms ripple amplitude on VDD1/VDD2, input and VREF1 connected by 600. Reference Voltage Characteristics (VREF1) Rating Parameter Reference output voltage 1 Symbol min VREF1 0.45VDDS typ 0.5VDDS max 0.55VDDS V Unit NIPPON PRECISION CIRCUITS INC.--5 SM6802A Measurement Block Diagram 40H SPOUT POS 1F BALANCED INPUT + EVALUATION BOARD 40H SPOUT NEG 1F 8 AUDIO ANALYZER BALANCED INPUT - Measurement Conditions Audio Analyzer (Audio Precision System Two Cascade) Built-in Filters Low-pass filter (20kHz) ON High-pass filter (22Hz) ON Low-pass filter (20kHz) ON High-pass filter (22Hz) ON A-weighted Parameter Excluding residual noise Residual noise voltage NIPPON PRECISION CIRCUITS INC.--6 SM6802A Measurement Circuit LEQP LEQN TESTN MUTEN SW3* H L C7 150p LEQN C9 1 VREF1 SW4* H L MUTEN LOUTN TESTN R9* SPOUT NEG VDD3 POWER VDD C10 R10* C11 1 R11* R12* SPOUT NEG 1 POWER VDD (2.7 to 5.5V) C1 LIN SIGNAL INPUT LEQP LIN LOUTP VSS2 ROUTP ROUTN PDWN VDD2 REQN DRCN SPOUT POS POWER VSS (0V) SPOUT POS 1 VDD1 C2 RIN 1 REQP VSS1 VDD1 RIN SIGNAL INPUT SW1* SW2* C8 150p L L ANALOG VSS (0V) H H REQP REQN PDWN VSS1 DRCN SIGNAL VSS (0V) Note. *C3, C4, C5, C6: not inserted *R1, R2, R3, R4, R5, R6, R7, R8: not inserted *R9, R10, R11, R12: series resistors for dielectric speaker *SW1: HIGH = Power on, LOW = Power off *SW2: HIGH = DRC off, LOW = DRC on *SW3: LOW = Test, HIGH = Normal *SW4: LOW = Mute on, HIGH = Mute off NIPPON PRECISION CIRCUITS INC.--7 SM6802A FUNCTIONAL DESCRIPTION Power-down (PDWN) The device enters power-down mode when PDWN goes LOW. When powered-down, the outputs become high impedance and the internal oscillation stops. In power-down mode, the MUTEN pin should be held LOW. Mute (MUTEN) Mute operation occurs when MUTEN goes LOW. In mute mode, the outputs become high impedance. During mute operation, the protection circuit operation is disabled, but the outputs are protected against output short circuits by their high impedance state. When power is applied, MUTEN should be held LOW for a short interval, shown in the timing diagram below, to prevent pop noise from the speaker. Also, applying and releasing mute operation after power is applied can occur at high speed without generating pop noise. min. 40msec PDWN MUTEN Note. VREF1 load capacitance = 1F Protection Circuit The protection circuit operates if there is an output short-circuit to the supply, short-circuit to ground, or other excessive load abnormal condition lasting longer than approximately 1s. Normal operation resumes after approximately 5 seconds. When the protection circuit becomes active, the outputs become high impedance. NIPPON PRECISION CIRCUITS INC.--8 SM6802A Input Equalizer (LIN, LEQP, LEQN, RIN, REQP, REQN) An input equalizer network can be connected to pins LIN, LEQP and LEQN (RIN, REQP and REQN), as shown in the input equivalent circuit and equalizer circuit below. R01 R02 C02 R04 R03 C03 C04 LEQP 1 (REQP) LEQN 20 (REQN) 60k C01 IN' 60k 2 LIN (RIN) VREF1 - + The frequency response of the equalizer circuit is given by the following equation, where is the frequency. 1 1 + 60000 Response = 20 x log10 1 + 2C01 1 1 R03 + 2C03 + 1 + 2C04 R04 [dB] 1 1 1 + + 60000 R01 1 R02 + 1 2C02 Dynamic Range Compression Mode (DRCN) The dynamic range compression mode is set when DRCN is LOW. When a compression mode is used, the gain for small input signals is increased while large input signals are converted using a curve that performs soft-clipping. This increases the average sound pressure level emitted from the speaker during playback. -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 10 5 DRC mode Output [dBV] 0 -5 -10 -15 -20 normal mode -25 -30 -35 -40 Input [dBV] NIPPON PRECISION CIRCUITS INC.--9 SM6802A TYPICAL APPLICATION CIRCUITS Dynamic Speaker LC-type LPF Connection 47H OUTPUT IN SPOUT POS 1F SOUND GENERATOR IC SM6802 (One side of L/R channels) 47H SPOUT NEG 1F Direct Connection LC filter may be required for the measure against EMI, if the wiring between this device and load is long. OUTPUT IN SPOUT POS SOUND GENERATOR IC SM6802 (One side of L/R channels) SPOUT NEG Dielectric Speaker A dielectric speaker is capacitive in nature, and therefore requires output resistor connection. OUTPUT 4 IN SPOUT POS SOUND GENERATOR IC SM6802 (One side of L/R channels) * 4 SPOUT NEG * Dielectric speaker Taiyo Yuden MLS20070, MLS23070, MLS25070 or similar NIPPON PRECISION CIRCUITS INC.--10 SM6802A Mounting Circuits Connection to LC Filter VDD2 + 1F 1F VSS2 VDD3 VCC + VDD1 1F Z0 VSS SM6802 VSS1 LOUTP LOUTN ROUTP ROUTN LC filter Speaker LC filter LC filter Speaker LC filter Direct Connection to Load VDD2 + 10F 10F VSS2 VDD3 VCC + VDD1 1F Z0 VSS SM6802 VSS1 LOUTP Speaker LOUTN ROUTP Speaker ROUTN Note. As for the wiring to VDD1, VDD2, VDD3, VSS1, and VSS2, we recommend to wire from the power supply block. The recommended value of internal impedance (Z0) is approximately less than 1/40 of load resistance. NIPPON PRECISION CIRCUITS INC.--11 SM6802A TYPICAL CHARACTERISTICS Measurement conditions: Refer to "Analog Output Characteristics". Measurement circuit: Refer to "Measurement Circuit". +10 +7.5 +5 +2.5 +0 DRC Output [dBV] -2.5 -5 -7.5 -10 -12.5 -15 -17.5 -20 -30 NORMAL -27.5 -25 -22.5 -20 -17.5 -15 -12.5 -10 -7.5 -5 -2.5 +0 +2.5 +5 Input [dBV] Input vs. Output 1.8 1.5 Output power [W] 1.2 0.9 0.6 0.3 0 2.5 3 3.5 4 Supply voltage [V] 4.5 5 5.5 Supply voltage vs. Output power 100 50 20 10 10 5 2 THD + N [%] 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 -25 -22.5 THD + N 500m 200m 100m 50m 20m 10m 5m 2m 1m -20 -17.5 -15 -12.5 -10 -7.5 -5 -2.5 +0 +2.5 +5 Input [dBV] Input vs. THD + N and output power NIPPON PRECISION CIRCUITS INC.--12 Output power [W] Output power 1 SM6802A -70 -75 -80 -85 -90 -95 Noise [dB] -100 -105 -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] Residual noise vs. Frequency 10 5 2 1 +6 THD + N +5 +4 +3 +2 +1 -0 -1 -2 -3 -4 -5 -6 THD + N [%] 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k Output Frequency [Hz] THD + N and output voltage vs. Frequency +0 -10 -20 -30 PSRR [dBr] -40 -50 -60 -70 -80 -90 -100 10 PSRR 20 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] PSSR vs. Frequency +0 -20 -40 dBr [dB] -60 -80 -100 -120 -140 20 50 100 200 500 1k 2k 5k 10k 20k Frequency [Hz] Channel crosstalk vs. Frequency NIPPON PRECISION CIRCUITS INC.--13 Output [dBr] 0.5 SM6802A ASSEMBLING PRECAUTION Package corner metals are not IC I/O pins. Don't connect any lines to these corner metals. Bottom view FOOTPRINT PATTERN The optimum footprint varies depending on the board material, soldering paste, soldering method, and equipment accuracy, all of which need to be considered to meet design specifications. (Unit: mm) Package QFN-20 HE 4.2 HD 4.2 e 0.5 b3 0.30 0.05 l1 0.20 0.05 l2 0.70 0.05 b3 e HE b3 e l1 l2 l2 l1 HD /2 HD NIPPON PRECISION CIRCUITS INC.--14 HE /2 SM6802A Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter "Products") are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from NIPPON PRECISION CIRCUITS INC. (hereinafter "NPC"). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 15-6, Nihombashi-kabutocho, Chuo-ku, Tokyo 103-0026, Japan Telephone: +81-3-6667-6601 Facsimile: +81-3-6667-6611 http://www.npc.co.jp/ Email: sales@npc.co.jp NC0409CE 2005.11 NIPPON PRECISION CIRCUITS INC.--15 |
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