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RF2909 11 Typical Applications * Direct Sequence Spread Spectrum * Spread Spectrum Cordless Phones * Portable Battery Powered Equipment * GMSK, QPSK, DQPSK, QAM Modulation * 915MHz ISM Applications 3V 915MHZ SPREAD-SPECTRUM TRANSMITTER IC Product Description The RF2909 is a monolithic integrated transmitter IC capable of universal direct modulation. The quadrature modulator allows for a variety of modulation formats and compound carriers. The transmitter has two power control modes. Two inputs can be controlled digitally for stepping output power 1mW, 10mW, or 70mW output power. Or, the output level can be adjusted by an analog input from 1mW to 80mW. The quadrature mixers have differential inputs, and are internally biased; a DC blocking capacitor is required if external DC levels are present. The LO is split with a passive network tuned for 915MHz. 1 .157 .150 .033 .010 .004 .344 .337 .012 .008 .025 R F2 94 .244 .228 8MAX 0MIN .050 .016 .010 .008 2 .069 .053 Optimum Technology Matching(R) Applied ro du ct Package Style: SSOP-24 P uSi Bi-CMOS Q SIG 1 Q REF 2 GND1 3 NC 4 LO IN+ 5 LO IN- 6 NC 7 Si BJT GaAs HBT SiGe HBT GaAs MESFET Si CMOS Features * 2.7V to 5V Power Supply * 1mW, 10mW, 70mW Digital Output Power * 20dB Analog Power Control Range * Excellent Phase & Amplitude Balance * Compatible with the RF2908 11 TRANSCEIVERS U pg r VCC1 8 GND2 9 VCC2 10 DC BIAS PWR CTRL S ee ad ed 24 I SIG 23 I REF 22 NC +45 -45 21 GND6 20 GND5 19 RF OUT 18 GND4 17 GND3 16 PLLON 15 TX PD 14 PC 2 13 PC1 Ordering Information RF2909 RF2909 PCBA 3V 915MHz Spread-Spectrum Transmitter IC Fully Assembled Evaluation Board INSTGT 11 APC 12 Functional Block Diagram RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev B1 010904 11-103 RF2909 Absolute Maximum Ratings Parameter Supply Voltage Power Down Voltage (VPD) Input LO and RF Levels Operating Ambient Temperature Storage Temperature Rating -0.5 to +5.5 VDD +0.4 +6 -40 to +85 -40 to +150 Unit VDC VDC dBm C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Carrier Input (LO IN) Frequency Range Power Level Input Impedance Specification Min. Typ. Max. 100 902-928 -10 50 10 1.7 500 1 3 .35 3 1100 Unit MHz dBm MHz V mVp Vp db k Condition T=25 C, VDD =3.3V Phase shift optimized for 915MHz Differential 915MHz 50 source, I,Q=500mVp-p Modulation Input Frequency Range Reference Voltage (VREF) Modulation for POUT Power (I & Q) Maximum Modulation (I & Q) Quadrature Phase Error I/Q Amplitude Imbalance Input Impedance DC 500 5 RF Output Digital Output Power Output Impedance Output VSWR Second Harmonic Output Other Harmonics Output Sideband Suppression Carrier Suppression 1, 10, 70 50 -25 -30 30 27 ro du ct 1.5:1 3.6 1 1 1 1 11 TRANSCEIVERS P Output Level Control Analog Power Control Range Analog Power Control Voltage (APC) Analog Power Control Input Current Analog Power Output Digital Power Output, High Digital Power Output, Med Digital Power Output, Low PC 1/PC 2 "ON" PC 1/PC 2 "OFF" ad ed 20 0 U pg r S ee 80 70 10 1 2 0.15 2 S V V Standby Mode Turn On/Off Time Power Down "ON" Power Down "OFF" 11-104 R F2 94 mW dBc dBc dB dB dB V A mW mW mW mW Differential, 1.5Vp single ended Differential VDD =3.3V, LO power=-10dBm, LO frequency=915MHz, SSB, I/Q=1VPP sine wave, 100KHz See Table I for control logic With external matching (see app. schematic) POUT =10mW Modulation DC offset can be externally adjusted for optimum suppression. Carrier suppression is then typically better than 40dB. Input voltage to pin 12 must be less than 3.6V or VCC (whichever is less). VAPC =2.8V, PC1="0", PC2="0" APC=0V, PC 1="0", PC 2="1" APC=0V, PC 1="1", PC 2="0" APC=0V, PC 1="0", PC 2="0" Threshold Voltage Threshold Voltage Threshold voltage; Part is turned "ON" Threshold voltage; Part is turned "OFF" 2 Differential, 1Vp single ended Rev B1 010904 RF2909 Parameter Power Supply Voltage 2.7 Current 175 45 30 130 1.5 3.3 5.0 200 60 40 180 5 1 mA mA mA A V V mA Specifications Operating limits Total, Digital High Power, VAPC, VPC1 =0V, VPC2 =VCC Total, Digital Medium Power, VAPC, VPC2 =0V, VPC1 =VCC Total, Digital Low Power, VAPC, VPC1, VPC2 =0V Total, Linear Power, VAPC =2.8V, VPC1, VPC2 =0V PLL Buffer amp on. Standby mode Specification Min. Typ. Max. Unit Condition ro du ct R F2 94 2 11 TRANSCEIVERS Rev B1 010904 S ee U pg r ad ed P 11-105 RF2909 Pin 1 Function Q SIG Description Baseband input to the Q mixer. A DC bias of approximately 1.7V is present at this pin.A DC blocking capacitor is needed if the signal has a different DC level. Maximum output power is obtained when the input signal has a peak-to-peak amplitude of 1V. The input impedance of this pin is 3k. The REF and SIG inputs are interchangeable. If swapping the I SIG and I REF pins, the Q SIG and Q REF also need to be swapped to maintain the correct phase. The SIG and REF pins may be driven deferentially to increase conversion gain. Reference voltage for the Q mixer. This voltage should be the same as the DC voltage supplied to the Q SIG pin. To obtain a carrier suppression of better than 25dB it may be tuned 0.15V (relative to the Q SIG DC voltage). Without tuning, the carrier suppression will typically be better than 25dB. The input impedance of this pin is about 3 k. Ground connection for the modulator circuits. Keep traces physically short and connect immediately to ground plane for best performance. Balanced LO Input Pin. This pin is internally DC biased and should be DC blocked if connected to a device with a DC level present. For singleended input operation, one pin is used as an input and the other LO input is AC coupled to ground. The balanced input impedance is 100. The single-ended input impedance is 50. Same as pin 4, except complementary input. Interface Schematic Q SIG Q REF BIAS 2 Q REF See pin 1. 3 4 5 GND 1 NC LO IN+ LO IN+ LO IN- 2 See pin 5. See pin 18. APC PC 1 PC 2 TX PD PLLON BIAS 6 7 8 9 10 11 12 TRANSCEIVERS LO INNC VCC1 GND2 VCC2 INSTGT APC 11 13 PC 1 14 PC 2 15 TX PD 16 S ee PLLON 17 18 GND3 GND4 11-106 U pg r This digital power control input set the high current and power output, 100mW. It is "wire-or'd" with APC and PC 1 and can override both of those controls. Therefore, PC 2 must be low to use other settings. Enables all of the IC except for the LO buffer when > 2V. Enables the LO buffer amp when > 2V.This can be switched on and off independently of the rest of the IC. This amp draws 1.5mA typically.This can be used to minimize load pulling of the VCO when the transmitter is turned on. Buffer amp is off when < 1V. Ground connection for RF Power Amp. Keep traces physically short and connect immediately to ground plane for best performance. Same as pin16. ad ed Analog power control input. This pin can be used as a linear power output control with a range of 20 dB. Maximum output power is achieved when APC is high. APC is"wire-or'd" with the digital controls, therefore should be low when using the digital control. The DC input voltage to the pin should always be less than 3.6V. This digital power control input sets the medium current and power output, 10mW. It is "wire-or'd" with APC and PC 2 and can be overcome by either. Therefore, APC and PC 2 must be low to use this setting. P ro du ct This pin is used to supply Vcc to the modulator circuits. A RF bypass capacitor should be connected directly to this and ground. Ground connection. This pin is used for RF ground of the power control circuitry and the PA driver amplifier. Keep traces physically short and connect immediately to ground plane for best performance. This pin is used to supply Vcc to the power control and pre amp circuitry. A RF bypass capacitor should be connected directly to this and ground. Interstage bias point between pre amp and power amp. This pin should be pulled up to Vcc with an 8.2nH inductor for 915MHz. R F2 94 Rev B1 010904 RF2909 Pin 19 Function RF OUT Description Power Amp output, open collector output. INSTGT Interface Schematic RF OUT 20 21 22 23 GND5 GND6 NC I REF Same as pin 17. Same as pin 17. Reference voltage for the I mixer. This voltage should be the same as the DC voltage supplied to the I SIG pin. To obtain a carrier suppression of better than 25dB it may be tuned 0.15V (relative to the I SIG DC voltage). Without tuning, the carrier suppression will typically be better than 25dB. The input impedance of this pin is 3k. I SIG I REF BIAS 24 I SIG Table I Operation Mode Sleep Mode PLL Buffer Linear Po Mode Digital Po Mode Medium Power High Power TX PD Low Low High High High High PLL ON Low High High High High High PC 1 Low Low Low Low High Low ro du ct PC 2 APC R F2 94 Baseband input to the I mixer. A DC bias of approximately 1.7V is present at this pin.A DC blocking capacitor is needed if the signal has a different DC level. Maximum output power is obtained when the input signal has a peak to peak amplitude of 1V. The input impedance of this pin is about 3 k. The REF and SIG inputs are interchangeable. If swapping the I SIG and I REF pins, the Q SIG and Q REF also need to be swapped to maintain the correct phase. The SIG and REF pins may be driven differentially to increase conversion gain. See pin 23. 2 Function Rev B1 010904 S ee U pg r ad ed 11-107 TRANSCEIVERS Low Low Low Low Low High 0V 0V 0-Vcc V 0V 0V 0V Entire chip is powered down. Total Icc<1A. LO Buffer is on. Icc =1.5mA Transmitter in on. Power output is proportional to APC. Transmitter is on. Power out is 1mW. Transmitter is on. Power out is 10mW. Transmitter is on. Power out is 70mW. 11 P RF2909 Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) C1 10 nF J1 QDATAB J2 LO IN 50 strip C2 10 nF C3 47 pF 1 2 +45 24 23 C16 10 nF 50 strip J6 IDATAB 50 strip 22 21 20 19 18 17 16 PLLCTRL P1-1 15 14 13 TXCTRL PWRCTRL2 PWRCTRL1 P1-3 P1 P2 C10 4.0 pF L2 3.9 nH C12 33 pF C11 3.0 pF L3 10 nH C13 47 pF C14 10 nF C15 4.7 uF 50 strip 50 strip 3 4 5 -45 J5 QMOD OUT VCC3 J3 LO IN B 50 strip 6 C4 47 pF R1 10 C5 47 pF 7 8 C6 10 nF C7 47 pF 9 10 11 DC BIAS PWR CTRL J4 RF OUT VCC1 R F2 94 3 PC2 P3 1 2 3 P3-1 PLLCTRL GND APC P3-3 L1 2.2 nH VCC2 R2 10 C8 10 nF C9 47 pF 2 GND 2 1 VCC3 P2-1 1 2 3 PC1 GND TXCTRL P2-3 12 P4 P4-1 1 2 P4-3 3 VCC2 GND VCC1 APC 2909400- 11 TRANSCEIVERS 11-108 S ee U pg r ad ed P ro du ct Rev B1 010904 RF2909 Evaluation Board Layout Board Size 1.7440" x 1.7480" ro du ct R F2 94 2 11 TRANSCEIVERS Rev B1 010904 S ee U pg r ad ed P 11-109 11 TRANSCEIVERS 11-110 RF2909 S ee U pg r ad ed P ro du ct R F2 94 2 Rev B1 010904 |
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