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PLL502-52 Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz) FEATURES * * * * * * * Integrated voltage-controlled crystal oscillator circuitry (VCXO) (pull range 380ppm minimum). VCXO tuning range: 0V - V DD V. Uses inexpensive fundamental-mode parallel resonant crystals (from 20 to 40MHz). Integrated divider by 2: output range of 10MHz to 20MHz. 2.5V or 3.3V supply voltage. Selectable High Drive (30mA) or Standard Drive (10mA) output. Available in 8-Pin TSSOP or SOIC. PIN CONFIGURATION XOUT N/C VCON GND 1 2 3 4 8 7 6 5 XIN OE^ VDD CLK Note: ^ denotes internal pull up OUTPUT RANGE DESCRIPTION DIVIDER FREQUENCY RANGE 10 - 20MHz OUTPUT BUFFER CMOS PLL502-52 The PLL502-52 is a monolithic low jitter, high performance CMOS VCXO IC Die. It allows the control of the output frequency with an input voltage (VCON), using a low cost crystal. This makes the PLL502-52 ideal for a wide range of applications requiring a VCXO output in the 10MHz to 20MHz range, using a fundamental crystal ranging from 20 to 40 MHz. /2 BLOCK DIAGRAM X IN XOUT XTAL OSC V A R IC A P C LK OE VCON 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 1 PLL502-52 Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz) PIN DESCRIPTIONS Name XOUT N/C VCON GND CLK VDD OE XIN Number 1 2 3 4 5 6 7 8 Type I I P O P I I Description Crystal output. See Crystal Specifications on page 4. Not connected. Voltage Control input. Ground. Output clock. Power supply. Output enable input. Disables (tri-state) output when low. Internal pull-up enables output by default if pin is not connected to low. Crystal input. See Crystal Specifications on page 4. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model SYMBOL VDD VI VO TS TA TJ MIN. -0.5 -0.5 -65 -40 MAX. 4.6 VDD+0.5 VDD+0.5 150 85 125 260 2 UNITS V V V C C C C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. DC Electrical Specifications PARAMETERS Supply Current, Dynamic, with Loaded Outputs Operating Voltage Output drive current (High Drive) Output drive current (Standard Drive) Short Circuit Current VCXO Control Voltage SYMBOL IDD VDD IOH IOL IOH IOL VCON CONDITIONS FXIN = 20 - 52MHz Output load of 10pF VOH= VDD-0.4V, VDD=3.3V VOL = 0.4V, VDD = 3.3V VOH= VDD-0.4V, VDD=3.3V VOL = 0.4V, VDD = 3.3V MIN. TYP. 10 MAX. UNITS mA 2.25 30 30 10 10 50 0 3.63 VDD V mA mA mA mA mA V 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 2 PLL502-52 Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz) 3. AC Electrical Specifications PARAMETERS Input Crystal Frequency Output Clock Rise/Fall Time (Standard Drive) Output Clock Rise/Fall Time (High Drive) Output Clock Duty Cycle SYMBOL CONDITIONS 0.3V ~ 3.0V with 15 pF load 0.3V ~ 3.0V with 15 pF load Measured @ 50% VDD MIN. 20 TYP. 2.4 1.2 MAX. 52 UNITS MHz ns 45 50 55 % 4. Voltage Control Crystal Oscillator PARAMETERS VCXO Stabilization Time * VCXO Tuning Range CLK output pullability VCXO Tuning Characteristic Pull range linearity VCON input impedance VCON modulation BW SYMBOL TVCXOSTB CONDITIONS From power valid FXIN = 20 - 40MHz; XTAL C0/C1 < 250 0V VCON 3.3V VCON=1.65V 1.65V MIN. TYP. MAX. 10 UNITS ms ppm ppm ppm/V % k kHz 500 200 150 10 80 0V VCON 3.3V, -3dB 25 Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 5. Jitter Specifications PARAMETERS Period jitter RMS Period jitter peak-to-peak Integrated jitter RMS CONDITIONS 20MHz 20MHz Integrated 12 kHz to 20 MHz at 20MHz MIN. TYP. 2.5 20 1 MAX. UNITS ps ps ps 6. Phase Noise Specifications PARAMETERS Phase Noise relative to carrier FREQUENCY 20MHz @10Hz -65 @100Hz -90 @1kHz -120 @10kHz -140 @100kHz -147 UNITS dBc/Hz Note: Phase Noise at VCON = 0V - to be measured 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 3 PLL502-52 Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz) 7. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating Crystal Pullability Recommended ESR SYMBOL FXIN CL (xtal) C0/C1 (xtal) RE CONDITIONS Parallel Fundamental Mode At Vcon = 1.65V AT cut AT cut MIN. 20 TYP. MAX. 40 UNITS MHz pF 9.5 250 30 Note: Crystal Loading rating: 9.5pF is the loading the crystal sees from the VCXO chip at VCON = 1.65V. It is assumed that the crystal will be at nominal frequency at this load. If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range. PACKAGE INFORMATION 8 PIN ( dimensions in mm ) Narrow SOIC Symbol A A1 B C D E H L e Min. 1.47 0.10 0.33 0.19 4.80 3.80 5.80 0.38 Max. 1.73 0.25 0.51 0.25 4.95 4.00 6.20 1.27 1.27 BSC Min. 0.05 0.19 0.09 2.90 4.30 6.20 0.45 TSSOP Max. 1.20 0.15 0.30 0.20 3.10 4.50 6.60 0.75 0.65 BSC A1 B C L e A D E H 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 9/17/04 Page 4 PLL502-52 Low Phase Noise Divider by 2 VCXO (10MHz to 20MHz) ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL502-52 (H) X C PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE O=TSSOP , S=SOIC Optional High Drive Order Number PLL502-52OC-R PLL502-52OC PLL502-52HOC-R PLL502-52HOC PLL502-52SC-R PLL502-52SC PLL502-52HSC-R PLL502-52HSC Marking P502-52OC P502-52OC P502-52HOC P502-52HOC P502-52SC P502-52SC P502-52HSC P502-52HSC Package Option TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC - Tape and Reel - Tube - Tape and Reel - Tube Tape and Reel Tube Tape and Reel Tube PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 03/14/00 Page 5 |
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