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| FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting August 2006 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Features Typical 3 switch resistance at 5.0V VCC, VIN = 0V Level shift facilitates 5V to 3.3V interfacing Minimal propagation delay through the switch Power down high impedance input/output Zero bounce in flow-through mode TTL compatible active LOW control inputs Control inputs are over-voltage tolerant Description The FSTD3306 is a 2-bit ultra high-speed CMOS FET bus switch with enhanced level-shifting circuitry and TTL-compatible active LOW control inputs. The low on resistance of the switch allows inputs to be connected to outputs with minimal propagation delay and without generating additional ground bounce noise. The device is organized as a 2-bit switch with independent busenable ( BE ) controls. When BE is LOW, the switch is ON and Port A is connected to Port B. When BE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Reduced voltage drive to the gate of the FET switch permits nominal level shifting of 5V to 3V through the switch. Control inputs tolerate voltages up to 5.5V independent of VCC. Ordering Information Part Number Top Mark Package Operating PbTemperature Packing Method Free Range Yes Yes Yes -40 to +85C -40 to +85C -40 to +85C Tape & Reel Tube 5000 units on Reel FSTD3306MTCX FD3306 8-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide FSTD3306MTC FSTD3306L8X FD3306 8-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide TD 8-Lead MicroPakTM Logic Diagram Figure 1. (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 Logical Connections for the FSTD3306 www.fairchildsemi.com FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Connections Diagram VCC BE1 1 8 7 BE2 1A 2 6 2B 1B 3 4 5 2A GND Figure 2. TSSOP Pin Outs (Top View) Figure 3. MicroPak Pin Outs (Top View) Pin Definitions Pin A B BE Description Bus A switch I/O Bus B switch I/O Bus enable input Function Table Bus Enable Input ( BE ) LOW Logic Level HIGH Logic Level Function B connected to A Disconnected (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 2 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Absolute Maximum Ratings The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table defines the conditions for actual device operation. Symbol VCC VS VIN IIK IOUT ICC/IGND TSTG TJ TL PD Parameter Supply Voltage DC Switch Voltage DC Output Voltage (1) Condition Min. - 0.5 - 0.5 - 0.5 Typ. Max + 7.0 + 7.0 + 7.0 Unit V V V mA mA mA DC Input Diode Current DC Output Sink Current DC VCC or Ground Current Storage Temperature Range Junction Temperature Junction Lead Temperature Power Dissipation VIN < 0V - 50 128 100 - 65 +150 + 150 + 260 250 C C C mW under Bias (Soldering, 10 Seconds) at +85C Notes: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions(2) Symbol VCC VIN VIN VOUT TA tr, tf JA Parameter Supply Voltage Control Input Voltage Switch Input Voltage Switch Output Voltage Operating Temperature Input Rise and Fall Time Thermal Resistance Condition Min. 4.5 0.0 0.0 0.0 - 40 Typ. Max 5.5 5.5 5.5 5.5 + 85 5 DC Unit V V V V C ns/V ns/V C/W Control Input Switch I/O 0 0 250 Notes: 2. Unused logic inputs must be held HIGH or LOW. They may not float. (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 3 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting DC Electrical Characteristics Ambient temperature (TA) is -40C to +85 unless otherwise specified. Symbol VIK VIH VIL VOH IIN IOFF Parameters Clamp Diode Voltage HIGH-Level Input Voltage LOW-Level Input Voltage HIGH-Level Output Voltage Input Leakage Current Power OFF Leakage Current Switch On Resistance (4) Conditions IIN = - 18 mA VCC (V) 4.5 4.5-5.5 4.5-5.5 Min. 2.0 Typ. Max. -1.2 0.8 Unit V V V V A A mA A mA VIN = VCC 0 VIN 5.5V 0 A, B VCC VIN = 0V, IIN = 64mA 4.5-5.5 5.5 5.5 4.5 4.5 4.5 5.5 5.5 5.5 (3) 1.0 1.0 3 3 15 1.1 7 7 50 1.5 10 1 2.5 RON VIN = 0V, IIN = 30mA VIN = 2.4V, IIN = 15mA VIN = VCC or GND, IOUT = 0 BE 1 = BE 2 = GND ICC Quiescent Supply Current VIN = VCC or GND, IOUT = 0 BE 1 = BE 2 = VCC ICC Increase in ICC per Input (5) VIN = 3.4V, IO = 0, one control input only, other BE = VCC Notes: 3. For typical DC characteristics, see Figures 7-9. 4. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. 5. Increase per TTL-driven input (VIN = 3.4V, control input only). A and B pins do not contribute to ICC. AC Electrical Characteristics Ambient temperature (TA) is -40C to +85 and CL = 50pF, RU = RD = 500 unless otherwise specified. Symbol tPHL, tPLH tPZL, tPZH tPLZ, tPHZ Parameter Propagation Delay Bus-to-Bus Output Enable Time Output Disable Time (6) Conditions VI = OPEN VI = 7V for tPZL, VI = 0V for tPZH VI = 7V for tPLZ, VI = 0V for tPHZ VCC (V) 4.5 - 5.5 4.5 - 5.5 4.5 - 5.5 Min. 1.0 0.8 Typ. 3.5 3.5 Max. 0.25 5.8 4.8 Unit ns ns ns Notes: 6. This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the 50pF load capacitance when driven by an ideal voltage source (zero output impedance). The specified limit is calculated on this basis. Capacitance Symbol CIN CI/O (OFF) CI/O (ON) Parameter Control Pin Input Capacitance Port OFF Capacitance Port ON Capacitance Conditions VCC = 0V VCC = 5.0V = BE VCC = 5.0V, BE = 0V Typ. 2.5 6 12 Unit pF pF pF (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 4 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting AC Loading and Waveforms Figure 4. AC Test Circuit. Input driven by 50 source-terminated in 50. CL includes load and stray capacitance. Input PRR = 1.0 MHz; TW = 500ns. Figure 5. AC Waveform Figure 6. AC Waveform (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 5 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting DC Characteristics Figure 7. Typical High-Level Output Voltage vs. Supply Voltage (TA = -40C, VIN = VCC) Figure 8. Typical High-Level Output Voltage vs. Supply Voltage (TA = 25C, VIN = VCC) Figure 9. Typical High-Level Output Voltage vs. Supply Voltage (TA = 85C, VIN = VCC) www.fairchildsemi.com 6 (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Tape and Reel Specifications Tape Format MicroPak Package Designator L8X Tape Section Leader (Start End) Carrier Trailer (Hub End) Number Cavities 125 (typ.) 5000 75 (typ.) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Tape Dimensions Dimensions are in millimeters unless otherwise noted. (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 7 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Reel Dimensions Tape Size 8mm A 7.0 (177.8) B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 2.165 (55.00) W1 .0331 +0.059 / -0.000 (8.40 +1.50 / -0.00) W2 0.567 (14.40) W23 W1 +0.078 / -0.039 (W1 +2.00 / -1.00) (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 8 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 10. 8-Lead MicroPak, 1.6mm-wide Package (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 9 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 11. 8-Lead Thin Shrink Small Outline (TSSOP), JEDEC MO-153, 4.4mm-wide Package (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 10 FSTD3306 2-Bit Low-Power Bus Switch with Level Shifting TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM 2 E CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM (R) FAST FASTrTM FPSTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM 2 I CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM (R) OPTOLOGIC OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM (R) PowerTrench (R) QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM ScalarPumpTM SerDesTM (R) SILENT SWITCHER SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyBoostTM TinyBuckTM (R) TinyLogic TINYOPTOTM TinyPowerTM TinyPWMTM TruTranslationTM UHCTM (R) UltraFET UniFETTM VCXTM WireTM Across the board. Around the world.TM Programmable Active DroopTM (R) The Power Franchise DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I20 Preliminary No Identification Needed Full Production Obsolete Not In Production (c) 2001 Fairchild Semiconductor Corporation FSTD3306 Rev. 1.2.2 * 8/9/06 www.fairchildsemi.com 11 |
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