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PRELIMINARY CM3112 150mA/1.2V CMOS LDO Regulator with Power Good
Features
* * * * * * * * * * * * LDO regulator with Power Good No capacitor required on the LDO output Power Good (PG) control signal Regulated 1.2V output 150mA output current Low quiescent operating current (90A typical) "Zero" disable mode current Foldback current limiting protection Thermal shutdown protection SOT23-5 package Micrel MIC5258, MIC5268 compatible pinout Lead-free version available
Product Description
The CM3112-12 is a low quiescent current (90uA) regulator that delivers up to 150mA of load current at a fixed 1.2V output. All the necessary circuitry has been included to deliver a 50 power good signal (open drain) which remains for 5ms after the output has exceeded 90% (typ) of its nominal level. A dedicated control input (EN, Active High) has been included for power-up sequencing flexibility. When this input is taken low, the regulator is disabled. In this state, the supply current will drop to near zero. An internal discharge MOSFET (500) resistance will force the output to ground whenever the device has been shutdown. The CM3112-12 is fully protected, offering both overload current limiting and high temperature thermal shutdown. Housed in a tiny SOT23 package, the device is ideal for space critical applications and is also available with optional lead-free finishing.
Applications
* * * Pentium 4 Motherboards PC Cards Peripheral Adapter Cards
Typical Application Circuit
Simplified Electrical Schematic
IN 1.2V/150mA OUT
1k
EN
CM3112-12
VIN EN 0.1F* GND IN EN GND 0.1F* OUT PG VOUT PG
VREF 1.2V
+
-
+
VREF X 0.93
2.5ms
PG
1X
* Optional
GND
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
1
PRELIMINARY CM3112
PACKAGE / PINOUT DIAGRAM
Top View
IN 1 5 OUT
FA12/FB12
GND
2
EN
3
4
PG
5-pin SOT23
Note: This drawing is not to scale.
PIN DESCRIPTIONS
PIN 1 NAME IN DESCRIPTION Positive input voltage for the regulator. The internal loading on this input is typically 300A whenever the regulator is enabled, and less than 10A when the regulator is disabled. If the IN pin is within a few inches of the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor (CIN) of 0.1uF to 1uF will ensure adequate filtering. The negative reference for all voltages. Enable/shutdown input. When EN is asserted high (VEN 1.6V), the regulator is enabled. When EN is asserted low (VEN 0.4V), the regulator's series pass transistor is forced into a high impedance mode and an internal discharge resistance (500) is applied to the output to quickly reduce the output voltage to 0 volts. 4 PG Power Good output. This is an open drain output and functions as a supply voltage supervisor for the output voltage. It is asserted low when the output falls below 84% of its nominal value. This output becomes inactive when (EN > 1.5V), (2.5V < VIN < 5.5V) and (VOUT > 97% of VOUTNOM), all of which are valid for more than 1-10ms. The regulated voltage output. Although an output capacitor is not necessary for stable regulator operation, a optional 0.1uF capacitor can be used to provide an added measure of output stability.
2 3
GND EN
5
OUT
Ordering Information
PART NUMBERING INFORMATION
Standard Finish Ordering Part Regulator CM3112-12 Pins 5 Package SOT23-5 Number1 CM3112-12ST Part Marking FA12 Lead-free Finish Ordering Part Number1 CM3112-12SO Part Marking FB12
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
(c) 2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04
PRELIMINARY CM3112
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER ESD Protection (HBM) Pin Voltages VIN VOUT VEN Storage Temperature Range Operating Temperature Range Ambient Junction Power Dissipation (See note 1) RATING +2000 [GND - 0.6] to +6.0 [GND - 0.6] to [VIN+0.6] [GND - 0.6] to [VIN+0.6] -40 to +150 0 to +70 0 to +150 Internally Limited UNITS V V V V C C C W
Note 1: The power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. Please consult with factory for thermal evaluation assistance.
STANDARD OPERATING CONDITIONS
PARAMETER VIN Ambient Operating Temperature Range Load Current COUT VALUE 2.5 to 5.5 0 to +70 0 to 150 0 to 10 UNITS V C mA F
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
3
PRELIMINARY CM3112
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL VOUT VOUT VR LOAD VR LINE RDROP ILIM ISC RDISCH IGND PARAMETER Output Voltage Accuracy Output Voltage Load Regulation Line Regulation xx Dropout Resistance Overload Current Limit Short Circuit Current Limit Discharge Resistance Ground Current VOUT < 0.5V EN tied to GND Regulator Enabled (EN=VIN); ILOAD= 0mA Regulator Enabled (EN=VIN); ILOAD= 150mA Regulator Disabled (EN=GND); (Disable Mode) 1.6 0.4 0.01 % of VOUT (PG ON) % of VOUT (PG OFF) IL= 2mA; Fault Condition Power Good Off; VPG = 5.5V 2.5V < VIN < 5.5V (applies to DPGD only) 1 0.05 0.01 84 97 0.1 50 10 1 10 CONDITIONS ILOAD = 5mA, VIN = 3.3V 5mA < ILOAD < 150mA, 3.135V < VIN < 5.5V 5mA < ILOAD < 100mA ILOAD = 5mA; 2.5V < VIN < 5.5V VIN = 2.7V 160 400 150 500 90 100 0.01 150 200 10 MIN -2 -3 -4 -5 TYP MAX 2 3 4 5 0.5 0.7 0.1 0.15 10 UNITS % % % % % % %/V %/V mA mA
A A A V V A % % V A mS mS
VEN VDIS IEN VPGL VPGH VOL IPG DPGD DPGA
EN Input Logic High Threshold Regulator Enabled, VIN = 5.5V EN Input Logic Low Threshold Enable Input Current Power Good Low Threshold Power Good High Threshold Power Good Logic "0" Voltage Power Good Leakage Current Power Good Delay Time To de-assert PG To assert PG Regulator Disabled, VIN = 5.5V
Note 1: Bold values indicate 0 C < TJ <125 C.
(c) 2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04
PRELIMINARY CM3112
Timing Diagram
VOUT VPG
100% 90%
EN
PG Inactive
DPGA DPGD DPGD
Active
Figure 1. Power Good Delay Timing
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
5
PRELIMINARY CM3112
Performance Information
CM3112 Typical DC Characteristics (nominal conditions unless specified otherwise) Nominal Conditions: VIN = 3.3V, ILOAD=1mA, no COUT
Load Regulation
1.248 1.236
OUTPUT VOLTAGE [V] OUTPUT VOLTAGE [V]
Line Regulation (1% and 100% rated load)
1.248 1.236 1.224 1.212 1.200 1.188 1.176 1.164 1.152 150mA Load 1mA Load
1.224 1.212 1.200 1.188 1.176 1.164 1.152 0 100 200 300 400
LOAD CURRENT [mA]
1.0
2.0
3.0
4.0
5.0
6.0
INPUT VOLTAGE [V]
Load Regulation (Close-up)
0 -1
DELTA VOUT [mV]
Line Regulation (Close-up)
2.5 2.0 1.5 1.0 0.5 0.0
-2 -3 -4 -5 0 50 100 150
LOAD CURRENT [mA]
DELTA VOUT [mV]
1mA Load
2.0
3.0
4.0
5.0
6.0
INPUT VOLTAGE [V]
Foldback Current Limiting
1.4 1.2
OUTPUT VOLTAGE [V]
OUTPUT VOLTAGE [V]
Line Regulation
1.40 1.20 1.00 0.80 0.60 0.40 0.20 0.00 1mA Load
1.0 0.8 0.6 0.4 0.2 0.0 0 100 200 300 400
LOAD CURRENT [mA]
0
1
INPUT VOLTAGE [V]
2
3
4
5
6
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04
PRELIMINARY CM3112
Performance Information (cont'd)
CM3112 Typical DC Characteristics (cont'd, nominal conditions unless specified otherwise)
Ground Current Vs. Supply Voltage
120
GROUND CURRENT [uA]
Ground Current Vs. Load Current
150
GROUND CURRENT [uA]
En = Vin
100 80 60 40 20 0 0 1
INPUT VOLTAGE [V]
125 100 75 50 25 0
1mA Load
2
3
4
5
6
0
LOAD CURRENT [mA]
50
100
150
Enable Threshold Vs. Supply Voltage
0.8 0.7
POWER GOOD [V]
Power Good Voltage Vs. Pull-Up Resistor
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Power Fail
THRESHOLD [V]
0.6 0.5 0.4 0.3 0.2 0.1 0.0 2 3 4 5 SUPPLY VOLTAGE [V] 6
1
10
PULL-UP RESISTOR [ ]
100
1000
10000
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
7
PRELIMINARY CM3112
Performance Information (cont'd)
CM3112 Transient Characteristics (nominal conditions unless specified otherwise)
Load transient Step Response
Load transient Step Response
Load transient Step Response
Load transient Step Response
Load transient Step Response
Load transient Step Response
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04
PRELIMINARY CM3112
Performance Information (cont'd)
CM3112 Transient Characteristics (nominal conditions unless specified otherwise)
Line Transient Step Response
Line Transient Step Response
Line Transient Step Response
Cold Start & Power Down
Enable Response
Vout Enable Response
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
9
PRELIMINARY CM3112
Performance Information (cont'd)
CM3112 Typical AC Characteristics (nominal conditions unless specified otherwise)
Power Supply Ripple Rejection
(No Cout, Vin=5V)
90
20mA 50mA
Power Supply Ripple Rejection
(Cout=1uF, Vin=5V)
90
20mA 50mA
80 150mA 70 1mA
80 150mA 70 1mA
60
PSRR [dB] PSRR [dB]
60
50
50
40
40
30
30
20
20
10
No Cout, Vin = 5V
10
Cout=1uF, Vin=5V
0 10 100 1000 Frequency [Hz] 10000 100000
0 10 100 1000 Frequency [Hz] 10000 100000
Power Supply Ripple Rejection
(No Cout, Vin=3.3V)
80 80 1mA
20mA 50mA
Power Supply Ripple Rejection
(Cout=1uF, Vin=3.3V)
1mA
20mA
70
70 150mA 60
50mA
150mA 60
50
PSRR [dB] PSRR [dB]
50
40
40
30
30
20
20
10 No Cout, Vin = 3.3V 0 10 100 1000 Frequency [Hz] 10000 100000
10 Cout=1uF, Vin=3.3V 0 10 100 1000 Frequency [Hz] 10000 100000
Output Noise (No Cout)
1.E-05
1 mA
Output Noise (1uF Cout)
1.E-05
1 mA
En[uV/rootHz]
En[uV/rootHz]
150 mA
150 mA
N o C out
1.E-06 10 100 1000 Frequency [Hz]
(c) 2004 California Micro Devices Corp. All rights reserved.
Cout=1uf
1.E-06
10000 100000
10
100
1000 Frequency [Hz]
10000
100000
10
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04
PRELIMINARY CM3112
Performance Information (cont'd)
CM3112 Typical Thermal Characteristics
VOUT Over Temperature
50 40
OUTPUT CHANGE [mV] OUTPUT CHANGE [mV]
VOUT Over Temperature
50 40 30 20 10 0 -10 -20 -30 -40 -50 -50 -25 0 25 50 75 100 125 150
30 20 10 0 -10 -20 -30 -40 -50 0 25 50 75 100 125
TEMPERATURE [oC]
TEMPERATURE [oC]
Ground Current Over Temperature
200
GROUND CURRENT [uA]
Time Delay Over Temperature
10 8
Time Delay [ms]
150
6 4 2 0
100
50
0 -50 -25 0 25 50 75 100 125 150
TEMPERATURE [oC]
25
50
75
100
125
TEMPERATURE [oC]
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
11
PRELIMINARY CM3112
Application Information
Output Capacitor Unlike other LDO regulators the CM3112 does not require an output capacitor for stability. It is stable with any capacitor from 0 to 10uF. Adding output capacitance will improve the very high frequency transient response of the part. Figures 1-7 demonstrate the effect of output capacitance on a 10mA to 140mA transient load step.
Figure: 2
In first 3 figures the load step is applied with a rise time of approximately 1us. Adding capacitance does not improve the response. The last three figures show the load step with a rise time of about 200ns. While the 0.1uF capacitor does not improve the response the 1uF capacitor decreases the overall magnitude of the transient spike.
Figure: 5
Figure: 3
Figure: 6
Figure: 4
Figure: 7
(c) 2004 California Micro Devices Corp. All rights reserved.
12
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04
PRELIMINARY CM3112
Application Information (cont'd)
Power Dissipation/Handling The overall junction to ambient thermal resistance (JA) for device power dissipation (PD) consists primarily of two paths in series. The first path is the junction to the case ( JC) which is defined by the package style, and the second path is case to ambient ( CA) thermal resistance which is dependent on board layout. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: TJUNC = TAMB + PD ( JC ) + PD ( CA ) = TAMB + PD ( JA) The CM3112-12 uses a SOT23-5 package. When this package is mounted on a double sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting JA is 175C/W. Based on a maximum power dissipation of 315mW (2.1Vx150mA), with an ambient of 70C the resulting junction temperature will be: TJUNC = TAMB + PD ( JA ) = 70C + 315mW (175C/W) = 70C + 55C = 125C Thermal characteristics were measured using a double sided board with two square inches of copper area connected to the GND pins for "heat spreading". Measurements showing performance up to junction temperature of 125C were performed under light load conditions (1mA). This allows the ambient temperature to be representative of the internal junction temperature. Note: The use of multi-layer board construction with separate ground and power planes will further enhance the overall thermal performance. In the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will provide the CM3112-12 with an overall JA of 175C/W which allows up to 450mW to be safely dissipated. Input Capacitor If the VIN pin is within a few inches of the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor (CIN) of 0.1uF to 1uF will ensure adequate filtering. Enable/Disable Whenever this input is taken low, the regulator pass transistor is forced into a high impedance mode and an internal discharge resistance (500) will be applied from the output to ground. Power Good This is an open drain output signal. It works as a supply voltage supervisor for the output voltage. It is asserted when the output falls below 84% (when 2.5V 1.5V b) 2.5V < VIN < 5.5V c) VOUT > 97% of VOUTNOM
(c) 2004 California Micro Devices Corp. All rights reserved. 01/20/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
13
PRELIMINARY CM3112
Mechanical Details
SOT23-5 Mechanical Specifications Dimensions for CM3112-12 device packaged in 5-pin SOT23 package are presented below. For complete information on the SOT23-5 package, see the California Micro Devices SOT23 Package Information document.
5
Mechanical Package Diagrams
TOP VIEW
e1
e
4
E1 E
1 2 3
PACKAGE DIMENSIONS
Package Pins Dimensions A A1 b c D E E1 e e1 L L1 # per tape and reel Millimeters Min -0.00 0.30 0.08 2.75 2.60 1.45 Max 1.45 0.15 0.50 0.22 3.05 3.00 1.75 Min -0.0000 0.0118 0.0031 0.1083 0.1024 0.0571 SOT23-5 (JEDEC name is MO-178) 5 Inches Max 0.0571 0.0059 0.0197 0.0087 0.1201 0.1181 0.0689
END VIEW SIDE VIEW
b
D
A
A1
0.95 BSC 1.90 BSC 0.30 0.60 0.60 REF
0.0374 BSC 0.0748 BSC 0.0118 0.0236 L1 L 0.0236 REF 3000 pieces c
Package Dimensions for SOT23-5.
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com
01/20/04

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