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FEATURES 1.8 V to 5.5 V Single Supply Low On Resistance (2.5 Typ) Low On-Resistance Flatness (0.5 ) -3 dB Bandwidth > 200 MHz Rail-to-Rail Operation 20-Lead 4 mm 4 mm Chip Scale Package Fast Switching Times t ON = 16 ns t OFF = 10 ns Typical Power Consumption (< 0.01 W) TTL/CMOS Compatible For Functionally Equivalent Devices in 16-Lead TSSOP and SOIC Packages, See ADG711/ADG712/ADG713 APPLICATIONS Battery Powered Systems Communication Systems Sample Hold Systems Audio Signal Routing Video Switching Mechanical Reed Relay Replacement
IN1 IN2
2.5
Quad SPST Switches in Chip Scale Package ADG781/ADG782/ADG783
FUNCTIONAL BLOCK DIAGRAMS
S1
IN1 S1
IN1 S1 D1 S2 IN2 D2 S3 D3 S4 IN4 D4
D1 S2
IN2
D1 S2 D2 S3
IN3
D2
ADG781
IN3
S3
IN3
ADG782
ADG783
D3 S4 IN4 D4
IN4
D3 S4 D4
SWITCHES SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG781, ADG782, and ADG783 are monolithic CMOS devices containing four independently selectable switches. These switches are designed on an advanced submicron process that provides low power dissipation and high switching speed, low on resistance, low leakage currents and high bandwidth. They are designed to operate from a single 1.8 V to 5.5 V supply, making them ideal for use in battery powered instruments and with the new generation of DACs and ADCs from Analog Devices. Fast switching times and high bandwidth make the part suitable for video signal switching. The ADG781, ADG782, and ADG783 contain four independent single-pole/single throw (SPST) switches. The ADG781 and ADG782 differ only in that the digital control logic is inverted. The ADG781 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG782. The ADG783 contains two switches whose digital control logic is similar to the ADG781, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when ON. The ADG783 exhibits break-before-make switching action. The ADG781/ADG782/ADG783 are available in 20-lead chip scale packages.
1. 20-Lead 4 mm
4 mm Chip Scale Package (CSP).
2. 1.8 V to 5.5 V Single Supply Operation. The ADG781, ADG782, and ADG783 offer high performance and are fully specified and guaranteed with 3 V and 5 V supply rails. 3. Very Low RON (4.5 max at 5 V, 8 max at 3 V). At supply voltage of 1.8 V, RON is typically 35 over the temperature range. 4. Low On-Resistance Flatness. 5. -3 dB Bandwidth >200 MHz. 6. Low Power Dissipation. CMOS construction ensures low power dissipation. 7. Fast tON/tOFF. 8. Break-Before-Make Switching. This prevents channel shorting when the switches are configured as a multiplexer (ADG783 only).
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002
ADG781/ADG782/ADG783-SPECIFICATIONS
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tD (ADG783 Only) Charge Injection Off Isolation B Version -40 C to +25 C +85 C 0 V to VDD 2.5 4 4.5 0.05 0.4 1.0 0.01 0.1 0.01 0.1 0.01 0.1 Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max
(VDD = 5 V 10%, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
Test Conditions/Comments
VS = 0 V to VDD, IS = -10 mA; Test Circuit 1 VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = 5.5 V; VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = VD = 1 V, or 4.5 V; Test Circuit 3
0.5
0.2 0.2 0.2 2.4 0.8
0.005 0.1 11 16 6 10 6 1 3 -58 -78 -90 200 10 10 22 0.001 1.0
VIN = VINL or VINH
Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD
RL = 300 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 3 V; Test Circuit 5 VS = 2 V; RS = 0 , CL = 1 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; Test Circuit 8 RL = 50 , CL = 5 pF; Test Circuit 9 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
-2-
REV. A
ADG781/ADG782/ADG783
SPECIFICATIONS1
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON)
(VDD = 3 V
10%, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
B Version -40 C to +25 C +85 C 0 V to VDD 5.5 10 0.5 2.5
Unit V typ max typ max typ nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max
Test Conditions/Comments
5 0.1
On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tD (ADG783 Only) Charge Injection Off Isolation
VS = 0 V to VDD, IS = -10 mA; Test Circuit 1 VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = 3.3 V; VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = VD = 1 V, or 3 V; Test Circuit 3
0.01 0.1 0.01 0.1 0.01 0.1
0.2 0.2 0.2 2.0 0.8
0.005 0.1 13 20 7 12 7 1 3 -58 -78 -90 200 10 10 22 0.001 1.0
VIN = VINL or VINH
Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD
RL = 300 , CL = 35 pF, VS = 2 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS = 2 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 2 V; Test Circuit 5 VS = 1.5 V; RS = 0 , CL = 1 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; Test Circuit 8 RL = 50 , CL = 5 pF; Test Circuit 9 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 3.3 V Digital Inputs = 0 V or 3.3 V
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
REV. A
-3-
ADG781/ADG782/ADG783
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25C unless otherwise noted.)
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . 300C IR Reflow (<20 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 235C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 V Analog, Digital Inputs2 . . . . . . . . . . -0.3 V to VDD + 0.3 V or 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150C Chip Scale Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 32C/W
ORDERING GUIDE
Model ADG781BCP ADG782BCP ADG783BCP
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 20-Lead Chip Scale (CSP) 20-Lead Chip Scale (CSP) 20-Lead Chip Scale (CSP)
Package Option CP-20 CP-20 CP-20
Table I. Truth Table (ADG781/ADG782)
ADG781 In 0 1
ADG782 In 1 0
Switch Condition ON OFF
PIN CONFIGURATION (CSP)
IN1 IN2 NC NC NC
20 19 18 17 16 D1 1
PIN 1 IDENTIFIER
15 D2 14 S2 13 VDD 12 S3 11 D3
Table II. Truth Table (ADG783)
S1 2 GND 3
ADG781/ADG782/ ADG783
TOP VIEW (Not to Scale)
Logic 0 1
Switch 1, 4 OFF ON
Switch 2, 3 ON OFF
S4 4 D4 5 6
NC
7
IN4
8
NC
9
IN3
10
NC
NC = NO CONNECT EXPOSED PAD TIED TO SUBSTRATE, GND
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG781/ADG782/ADG783 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-4-
REV. A
ADG781/ADG782/ADG783
TERMINOLOGY
VDD GND S D IN RON RON RFLAT(ON)
Most positive power supply potential. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Ohmic resistance between D and S. On-resistance match between any two channels (i.e., RON max and RON min). Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. Source leakage current with the switch "OFF." Drain leakage current with the switch "OFF." Channel leakage current with the switch "ON." Analog voltage on terminals D, S. "OFF" switch source capacitance. "OFF" switch drain capacitance.
CD, CS (ON) tON tOFF tD
Crosstalk
Off Isolation Charge Injection On Response On Loss
IS (OFF) ID (OFF) ID, IS (ON) VD (VS) CS (OFF) CD (OFF)
"ON" switch capacitance. Delay between applying the digital control input and the output switching on. Delay between applying the digital control input and the output switching off. "OFF" time or "ON" time measured between the 90% points of both switches, when switching from one address state to another (ADG783 only). A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an "OFF" switch. A measure of the glitch impulse transferred from the digital input to the analog output during switching. The frequency response of the "ON" switch. The loss due to the on resistance of the switch.
Typical Performance Characteristics
6 5.5 5 4.5 4 3.5 VDD = 4.5V
RON -
6 TA = 25 C VDD = 2.7V 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - V 5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - V 5 -40 C +85 C +25 C VDD = 5V
RON -
3 2.5 2 1.5 1 0.5 0
VDD = 3V
VDD = 5V
TPC 1. On Resistance as a Function of VD (VS)
6 5.5 5 4.5 4 3.5 +85 C +25 C VDD = 3V
TPC 3. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 5 V
10m VDD = 5V 1m 100
ISUPPLY - Amps
4 SW 10 1 SW 1
RON -
3 2.5 -40 C 2 1.5 1 0.5 0 0 0.5 1.5 2 2.5 1 VD OR VS - DRAIN OR SOURCE VOLTAGE - V 3
100n
10n 1n 100
1k
10k 100k FREQUENCY - Hz
1M
10M
TPC 2. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 3 V
TPC 4. Supply Current vs. Input Switching Frequency
REV. A
-5-
ADG781/ADG782/ADG783
-30 -40 VDD = 5V, 3V -50
VDD = 5V 0
OFF ISOLATION - dB
ON RESPONSE - dB 100k 1M 10M FREQUENCY - Hz 100M
-60 -70 -80 -90 -100 -110 -120 -130 10k
-2
-4
-6 10k
100k
1M 10M FREQUENCY - Hz
100M
TPC 5. Off Isolation vs. Frequency
TPC 7. On Response vs. Frequency
-30 -40 VDD = 5V, 3V -50
CROSSTALK - dB
25 TA = 25 C 20 15
-60
QINJ - pC
-70 -80 -90 -100 -110
10 5
VDD = 3V
VDD = 5V
0 -5
-120 -130 10k -10 100k 1M 10M FREQUENCY - Hz 100M 0 0.5 1 1.5 2 2.5 3 3.5 SOURCE VOLTAGE - V 4 4.5 5
TPC 6. Crosstalk vs. Frequency
TPC 8. Charge Injection vs. Source Voltage
APPLICATIONS
C1 R1 33k 5V
Figure 1 illustrates a photodetector circuit with programmable gain. An AD820 is used as the output operational amplifier. With the resistor values shown in the circuit, and using different combinations of the switches, gain in the range of 2 to 16 can be achieved.
AD820
D1 2.5V R2 510k 5V R4 240k R6 120k R8 120k R9 120k 2.5V R10 120k GAIN RANGE 2 TO 16 R5 240k R7 120k R3 510k VOUT
S1 (LSB) IN1 S2 IN2 S3 IN3 S4 (MSB) IN4 GND
D1
D2
D3
D4
Figure 1. Photodetector Circuit with Programmable Gain
-6-
REV. A
ADG781/ADG782/ADG783 Test Circuits
IDS IS (OFF) A S VS RON = V1/IDS D VS S D ID (OFF) A VD
NC = NO CONNECT NC
V1
S
D
ID (ON) A VD
Test Circuit 1. On Resistance
VDD 0.1 F
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VIN ADG781 VDD
50%
50%
S VS IN GND
D RL 300 CL 35pF
VIN ADG782 VOUT
50% VS
50% 90%
VOUT
90%
t ON
t OFF
Test Circuit 4. Switching Times
VDD 0.1 F
VIN
0V
50%
50%
VDD VS1 VS2 IN1, IN2 S1 S2 D1 D2 RL2 300 CL2 35pF VOUT2 RL1 300 CL1 35pF VOUT1 VOUT1 0V
90%
90%
VIN
ADG783
GND
VOUT2
90% 0V
90%
tD
tD
Test Circuit 5. Break-Before-Make Time Delay, tD
VDD VDD RS VS IN GND S D CL 1nF VOUT
SW ON VIN
SW OFF
VOUT Q INJ = CL VOUT
VOUT
Test Circuit 6. Charge Injection
VDD 0.1 F NETWORK ANALYZER NETWORK ANALYZER D1 VOUT S IN D VIN GND RL 50 VOUT 50 50 VS 50 VS IN GND CHANNEL-TO-CHANNEL V CROSSTALK = 20 LOG OUT VS RL 50 S2 D2 RL 50 0.1 F VDD
VDD
VDD S1 NC
OFF ISOLATION = 20 LOG
VOUT VS
Test Circuit 7. Off Isolation
Test Circuit 8. Channel-to-Channel Crosstalk
REV. A
-7-
ADG781/ADG782/ADG783
VDD 0.1 F NETWORK ANALYZER
VDD S IN D VIN GND
50
RL 50
VOUT
INSERTION LOSS = 20 LOG
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Test Circuit 9. Bandwidth
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead CSP (CP-20)
0.157 (4.0) BSC SQ PIN 1 INDICATOR 0.024 (0.60) 0.017 (0.42) 0.009 (0.24) 0.024 (0.60) 0.017 (0.42) 16 0.009 (0.24) 15 0.148 (3.75) BSC SQ 0.012 (0.30) 0.009 (0.23) 0.007 (0.18) 0.030 (0.75) 0.024 (0.60) 0.020 (0.50) 0.010 (0.25) MIN
20 1
TOP VIEW
BOTTOM VIEW
11 10 6 5
0.089 (2.25) 0.083 (2.10) SQ 0.077 (1.95)
12 MAX 0.035 (0.90) MAX 0.033 (0.85) NOM SEATING PLANE 0.020 (0.50) BSC
0.028 (0.70) MAX 0.026 (0.65) NOM
0.080 (2.00) REF
0.008 (0.20) REF
0.002 (0.05) 0.0004 (0.01) 0.0 (0.0)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
Revision History
Location Data Sheet changed from REV. 0 to REV. A. Page
PRINTED IN U.S.A.
Edits to Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 Changes to OUTLINE DIMENSIONS drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
-8-
REV. A
C02372-0-3/02(A)
VS

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