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Isolated Sigma-Delta Modulator
Preliminary Technical Data
FEATURES
Up to 20 MHz Data Rate (AD7401) 10 MHz Data Rate (AD7400) 2nd Order Modulator 4 LSB INL @16 Bits Onboard Digital Isolator Onboard Reference Low Power Operation: 15 mA @ 5 V -40 C to +105 C Operating Range 16-ld SOIC Package Safety and Regulatory Approvals UL Recognition 3750 VRMS for 1 minute per UL 1577 CSA Component Acceptance Notice ~5A VDE Certificate of Conformity DIN EN 60747-5-2 (VDE 0884 Part 2):2003-01 DIN EN 60950 (VDE 0805): 2001-12; EN 60950:2000 VIORM = 840VPEAK
AD7400/AD7401
APPLICATIONS AC Motor Control Data Acquisition Systems A/D + Opto-Isolator Replacement
GENERAL DESCRIPTION
The AD7400/AD7401 are 2nd order sigma-delta modulators that convert an analog input signal into a high speed 1-bit data stream with onboard digital isolation based on Analog Devices' iCoupler(R) technology. The AD7400/AD7401 operate from a 5 V power supply and accept a differential input signal of 200 mV. The analog input is continuously sampled by the analog modulator, eliminating the need for external sample and hold circuitry. The input information is contained in the output stream as a density of ones with data rates up to 20MHz. The original information can be reconstructed with an appropriate digital filter. The serial I/O may use a 5V or 3V supply (VDD2). The serial interface is digitally isolated. High-speed CMOS,
FUNCTIONAL BLOCK DIAGRAM
VDD1 VDD2
VIN+ VIN-
T/H
- ADC
UPDATE ENCODE CONTROL LOGIC REF ENCODE
WATCHDOG DECODE MDAT
BUF
UPDATE
WATCHDOG DECODE MCLKOUT*
GND1 *MCLKIN pin on AD7401
GND2
Rev. PrH
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
AD7400/AD7401
Preliminary Technical Data
combined with monolithic air core transformer technology, means the onboard isolation provides outstanding performance characteristics superior to alternatives such as optocoupler devices. The parts provide an on-chip 2.5V reference. The AD7400/AD7401 are offered in a 16-lead SOIC package and have an operating temperature range of -40C to +105C.
TABLE OF CONTENTS
AD7400--Specifications.................................................................. 3 AD7401--Specifications.................................................................. 4 TIMING SPECIFICATIONS1 ..................................................... 5 Absolute Maximum Ratings1,3......................................................... 6 Pin Functional Descriptions ........................................................8 Theory of Operation.....................................................................9 Outline Dimensions ....................................................................... 10
REVISION HISTORY
Revision PrH: Preliminary Version
Rev. PrH | Page 2 of 10
Preliminary Technical Data
AD7400--SPECIFICATIONS1
AD7400/AD7401
Table 1. (VDD1 = VDD2 = 4.5V to 5.5V, , VIN+ = -200mV to +200mV and VIN- = 0V; TA = TMIN to TMAX, fMCLK = 10MHz unless otherwise noted.)
Parameter STATIC PERFORMANCE Resolution Integral Nonlinearity2 Differential Nonlinearity2 Offset Error2 Offset Drift vs. Temperature2 Offset Drift vs. VDD12 Absolute Reference Voltage Tolerance Reference Voltage Matching VREF Drift vs. Temperature2 VREF Drift vs. VDD12 ANALOG INPUT Input Voltage Ranges6 DC Leakage Current DYNAMIC SPECIFICATIONS Signal to Noise + Distortion Ratio (SINAD) 2 Total Harmonic Distortion (THD)2 Peak Harmonic or Spurious Noise (SFDR)2 Effective number of bits Isolation Transient Immunity Signal Delay LOGIC INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN3 LOGIC OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL POWER REQUIREMENTS VDD1 VDD2 IDD17 IDD27 B Version1,5 16 4 0.9 0.5 5 2 0.05 1 TBD 60 0.2 200 1 70 76 -80 -70 12 15 20 20 24 2 0.8 1 10 VDD2 - 0.1 0.4 +4.5/+5.5 +4.5/+5.5 +2.7/+3.3 18.1 1.96 Units Bits min LSB max LSB max mV max V/ C max V/ C typ mV/V typ %min/max %min/max ppm/ C typ % typ mV min/max A max dBmin dB typ dB typ dB typ Bits kV/s min kV/s typ s typ s max V min V max A max pF max V min V max Vmin/Vmax Vmin/Vmax Vmin/Vmax mA max mA max IO = -20 A IO = 20 A When Tested with Sinc3 Filter4 VIN+ = 35Hz, 400mVpk-pk sine wave Test Conditions/Comments When Tested with Sinc3 Filter4 Filter output trunctaed to 16 Bits Guaranteed No Missed Codes to 15 bits Bipolar Input Range
Delay through filter varies with actual value of onboard clock. Decimation by 2.
VDD1 = 5V, Digital I/Ps = 0 V or VDD1
NOTES 1 Temperature ranges as follows: -40 C to +105 C 2 See Terminology section. 3 Sample tested @ 25 C to ensure compliance. 4 Filter as defined by Verilog Code. 5 All voltages are relative to their respective ground. 6 Beyond the full-scale input range the output is either all zeroes or all ones. Specifications subject to change without notice.
Rev. PrH | Page 3 of 10
AD7400/AD7401
AD7401--SPECIFICATIONS3
Preliminary Technical Data
Table 2. (VDD1 = VDD2 = 4.5V to 5.5V, , VIN+ = -200mV to +200mV and VIN- = 0V; TA = TMIN to TMAX, fMCLK = 20MHz unless otherwise noted.)
Parameter STATIC PERFORMANCE Resolution Integral Nonlinearity2 Differential Nonlinearity2 Offset Error2 Offset Drift vs. Temperature2 Offset Drift vs. VDD12 Absolute Reference Voltage Tolerance Reference Voltage Matching VREF Drift vs. Temperature2 VREF Drift vs. VDD12 ANALOG INPUT Input Voltage Ranges6 DC Leakage Current DYNAMIC SPECIFICATIONS Signal to Noise + Distortion Ratio (SINAD) 4 Total Harmonic Distortion (THD)2 Peak Harmonic or Spurious Noise (SFDR)2 Effective number of bits Isolation Transient Immunity Signal Delay LOGIC INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IIN Input Capacitance, CIN3 LOGIC OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL POWER REQUIREMENTS VDD1 VDD2 IDD17 IDD27 B Version1,5 16 4 0.9 0.5 5 2 0.05 1 TBD 60 0.2 200 1 70 76 -80 -70 12 15 20 10 12 2 0.8 1 10 VDD2 - 0.1 0.4 +4.5/+5.5 +4.5/+5.5 +2.7/+3.3 21.2 3.92 Units Bits min LSB max LSB max mV max V/ C max V/ C typ mV/V typ %min/max %min/max ppm/ C typ % typ mV min/max A max dBmin dB typ dB typ dB typ Bits kV/s min kV/s typ s typ s max V min V max A max pF max V min V max Vmin/Vmax Vmin/Vmax Vmin/Vmax mA max mA max IO = -20 A IO = 20 A When Tested with Sinc3 Filter4 VIN+ = 35Hz, 400mVpk-pk sine wave Test Conditions/Comments When Tested with Sinc3 Filter4 Filter output trunctaed to 16 Bits Guaranteed No Missed Codes to 15 bits Bipolar Input Range
Delay through filter varies with actual value of onboard clock. Decimation by 2.
VDD1 = 5V, Digital I/Ps = 0 V or VDD1
NOTES 3 Temperature ranges as follows: -40 C to +105 C 4 See Terminology section. 3 Sample tested @ 25 C to ensure compliance. 4 Filter as defined by Verilog Code. 5 All voltages are relative to their respective ground. 6 Beyond the full-scale input range the output is either all zeroes or all ones. Specifications subject to change without notice.
Rev. PrH | Page 4 of 10
Preliminary Technical Data
TIMING SPECIFICATIONS1
AD7400/AD7401
Table 3. AD7400/AD7401 Timing Specifications (VDD1 = VDD2 = 4.5V to 5.5V, TA = TMAX to TMIN unless otherwise noted.)
Parameter FMCLKOUT TMCLKIN2 t13 t23 t3 t4 Limit at TMIN, TMAX 10 8.2/13.2 1 20 30 15 0.4 x tMCLKIN 0.4 x tMCLKIN Unit MHz typ MHz min/max MHz min MHz max ns max ns min ns max ns max Description AD7400 AD7401 Data Access Time after MCLK Rising Edge Data Hold Time after MCLK Rising Edge Master Clock Low Time Master Clock High Time
NOTES 1 Sample tested @ 25 C to ensure compliance. All input signals are specified with tr = tf = 5ns (10% to 90% of VDD1) and timed form a voltage level of 1.6 Volts. See Figure 1. 2 Mark Space ratio for the MCLKIN input is 40/60 to 60/40. 3 Measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8V or 2.0V.
200A
IOL
TO OUTPUT PIN CL 50pF 200A
+1.6V
IOH
Figure 1. Load Circuit for Digital Output Timing Specifications
MCLKIN / MCLKOUT
t4 t1 t2 t3
MDAT
Figure 2. Data Timing
Rev. PrH | Page 5 of 10
AD7400/AD7401
ABSOLUTE MAXIMUM RATINGS1,3
Preliminary Technical Data
Table 4. AD7400/AD7401 Absolute Maximum Ratings (TA = +25C unless otherwise noted)
VDD1 to GND1 VDD2 to GND2 Analog Input Voltage to GND1 Digital Input Voltage to GND2 Output Voltage to GND2 Input Current to Any Pin Except Supplies2 Operating Temperature Range Storage Temperature Range Junction Temperature SOIC Package JA Thermal Impedance JC Thermal Impedance Resistance (Input-Output), RI-O -0.3 V to +6.5V -0.3 V to +6.5 V -0.3 V to VDD1 +0.3V -0.3 V to VDD2 +0.5 V -0.3 V to VDD2 +0.3V 10mA -40C to +105C -65C to +150C +150C 89.2 C/W 55.6 C/W 1012 Capacitance (Input-Output), CI-O Lead Temperature, Soldering Vapor Phase (60 sec) Infared (15 sec) ESD 1pF +215C +220C TBD
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Transient currents of up to 100mA will not cause SCR latch up. 3 All voltages are relative to their respective ground.
REGULATORY INFORMATION (PENDING)
Table 5. Insulation and Safety Related Specifications
Parameter Input-Output Withstand Momentary Withstand Voltage1 Minimum External Air Gap (Clearance) Minimum External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group UL1 Recognized under 1577 component recognition program1 Double insulation, 3750 V rms isolation voltage Symbol VISO L(I01) L(I02) Value 3750 min. 8.4 min 8.1 min 0.025 min CTI >175 IIIa CSA Approved under CSA Component Acceptance Notice #5A Reinforced insulation per CSA 60950-1-03 and IEC 60950-1, 630 V rms maximum working voltage Units V mm mm mm V Conditions Note 1 Measured from input terminals to output terminals, shortest distance through air. Measured from input terminals to output terminals, shortest distance path along body. Insulation distance through insulation. DIN IEC 112/VDE 0303 Part 1 Material Group (DIN VDE 0110,1/89,Table 1) VDE2 Certified according to DIN EN 60747-5-2 (VDE 0884 Part 2):2003-012 Basic insulation, 891 V peak Complies with DIN EN 60747-5-2 (VDE 0884 Part 2):2003-01, DIN EN 60950 (VDE 0805):2001-12; EN 60950:2000 Reinforced insulation, 891 V peak
NOTES
1
In accordance with UL1577, each AD7400/AD7401 is proof tested by applying an insulation test voltage 4500 V rms for 1 second (current leakage detection limit = 5 A). In accordance with DIN EN 60747-5-2, each AD7400/AD7401 is proof tested by applying an insulation test voltage 1670 V peak for 1 second (partial discharge detection limit = 5 pC).
2
Rev. PrH | Page 6 of 10
Preliminary Technical Data
DIN EN 60747-5-2 (VDE 0884 PART 2) INSULATION CHARACTERISTICS (PENDING)
Table 6.
Description Installation classification per DIN VDE 0110 For Rated Mains Voltage 300 V rms For Rated Mains Voltage 600 V rms Climatic Classification Pollution Degree (DIN VDE 0110, Table 1) Maximum Working Insulation Voltage Input to Output Test Voltage, Method b1 VIORM x 1.875 = VPR, 100% Production Test, tm = 1 sec, Partial Discharge < 5 pC Input to Output Test Voltage, Method a After Environmental Tests Subgroup 1) VIORM x 1.6 = VPR, tm = 60 sec, Partial Discharge < 5p C After Input and/or Safety Test Subgroup 2/3) VIORM x 1.2 = VPR, tm = 60 sec, Partial Discharge < 5p C Highest Allowable Overvoltage (Transient Overvoltage, tTR = 10 sec) Safety-Limiting Values (Maximum value allowed in the event of a failure, also see Thermal Derating Curve) Case Temperature Side 1 Current Side 2 Current Insulation Resistance at TS, VIO = 500 V Symbol
AD7400/AD7401
Characteristic I-IV I-III 40/105/21 2
Unit
VIORM VPR
891 1670
Vpeak V peak
VPR
1426 1069
VTR 6000
Vpeak Vpeak V peak
TS IS1 IS2 RS
150 TBD TBD >109
C mA mA
This isolator is suitable for "basic electrical isolation" only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. "*" marking on packages denotes DIN EN 60747-5-2 approval for 891 V peak working voltage.
Rev. PrH | Page 7 of 10
AD7400/AD7401
Preliminary Technical Data
VDD1 1 VIN+ 2 VIN- 3 NC 4
16 GND2 15 NC
VDD1 1 VIN+ 2 VIN- 3 NC 4
16 GND2 15 NC
AD7400
14
VDD2
AD7401
14
VDD2
TOP VIEW NC 5 (Not to Scale) 12 NC NC 6 VDD1 7 GND1 8
13 MCLKOUT
TOP VIEW NC 5 (Not to Scale) 12 NC NC 6 VDD1 7 GND1 8
13 MCLKIN
11 MDAT 10 NC 9 GND2
11 MDAT 10 NC 9 GND2
Pin Functional Descriptions
Table 7. AD7400/AD7401 Pin Function Descriptions
Pin Number 1,7 2 3 18 AD7400 Pin Mnemonic VDD1 VIN+ VINAD7401 Pin Mnemonic VDD1 VIN+ VINMCLKIN Description
18 14 8 9,16 4-6,10,12,15
MCLKOUT VDD2 GND1 GND2 NC VDD2 GND1 GND2 NC
Supply Voltage, 5 V 10%. This is the supply voltage for the isolated side of the AD7400/AD7401 and is relative to GND1. Positive analog Input, range of 200 mV . Negative analog input (normally connected to GND1). Master Clock. Logic Input. An external clock is applied at this pin. A serial clock input from 1MHz to 20MHz may be applied to this pin on the AD7401. The bit stream form the modultaor is valid on the rising edge of MCLKIN. Master Clock. Logic Output, 10MHz typical. The bit stream form the modultaor is valid on the rising edge of MCLKOUT on the AD7400. Supply Voltage, 5 V 10% or 3V 10%. This is the supply voltage for the non-isolated side of the AD7400/AD7401 and is relative to GND2. Ground. This is the ground reference point for all circuitry on the isolated side of the AD7400/AD7401. Ground. This is the ground reference point for all circuitry on the non-isolated side of the AD7400/AD7401. No Connect
Rev. PrH | Page 8 of 10
Preliminary Technical Data
Theory of Operation
CIRCUIT INFORMATION The AD7400/AD7401 Isolated Sigma-Delta Modulator converts an analog input signal into a high-speed, (10MHz using onboard MCLK on AD7400, or up to 20MHz using external MCLK on AD7401), single-bit data stream; the time average of the modulator's single-bit data is directly proportional to the
ISOLATED +5V VDD1
AD7400/AD7401
input signal. Figure 4 shows a typical application circuit where the AD7400/AD7401 is used to provide isolation between the analog input, a current sensing resistor, and the digital output which is then processed by a digital filter to provide an N-bit word.
NON-ISOLATED +5V/+3V
AD7400
VDD2 SIGMADELTA MOD/ ENCODER DECODER VDD
SINC3 FILTER
MDAT MCLKOUT MDAT MCLK +5 SCLK SDAT
+ INPUT CURRENT RSHUNT
VIN+ VIN-
MCLKIN DECODER GND1 ENCODER GND2
(UP TO 20MHz with AD7401)
CCLK GND
Figure 4. Typical Application Circuit
Table 8. Analog Input Range
Analog Input Voltage Input
Full Scale Range +Full Scale + Specified Input range Zero -Specified Input range -Full Scale
640 mV +320 mV +200 mV 0 mV -200 mV -320mV
Rev. PrH | Page 9 of 10
AD7400/AD7401
OUTLINE DIMENSIONS
0.4134 (10.50) 0.3976 (10.10)
$ '
Preliminary Technical Data
&
PIN 1 0.0118 (0.30) 0.0039 (0.10)
0.1043 (2.65) 0.0925 (2.35)
0.2992 (7.60) 0.2913 (7.40) 0.4193 (10.65) 0.3937 (10.00)
0.0295 (0.75) x 45 0.0098 (0.25)
0.0500 (1.27) BSC
0.0201 (0.51) SEATING 0.0130 (0.33) PLANE
0.0126 (0.32) 0.0091 (0.23)
8 0.0500 (1.27) 0 0.0157 (0.40)
Figure 2. 16-Lead Short Outline Package [SOIC] Wide Body (RW-16)--Dimensions shown in millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Ordering Guide
AD7266 Products AD7400BRW AD7401BRW Temperature Package -40C to +105C -40C to +105C Package Description Short Outline I.C. Package Short Outline I.C. Package Package Outline RW-16 RW-16
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. Printed in the U.S.A. PR04718-0-3/04(PrH)
Rev. PrH | Page 10 of 10

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