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Rato Features Low Operator Voltage 3V ~ 4.5V Auto Power down function CMOS process On-Chip RC oscillator Low stand by current at 1 uA 8-Pin DIP or chip form available RT0301/RT0302 The RT0301/RT0302 is a CMOS Design for Door Bell application Pin Diagram TG E1 E2 GND 8 VCC 1 2 7 OSCI OSCO 6 3 SOUT 4 5 RT0301/RT0302 Pin Description Symbol TG E1 E2 GND SOUT OSCO OSCI Vcc Pin Description Trigger Single Input "Ding" Freq "Dong" Freq Ground Sound output Frequency put Frequency In Power Source Input Pin 1 2 3 4 5 6 7 8 I/O I O I O O O I I Electrical Characteristics Characteristics Symbol Min. Typ. Max. Operating Voltage 3 4.5 Vcc Operating Current 0.1 0.5 Iop Quiescent Current 1 Isb 5 SOUT Driving Current Ioc 1 Oscillator Freq 50 Fop Operating Temp 25 70 Temp 0 Unit V mA No Load uA mA @VDS=1V KHz External 30%, ROSC=430K Vcc=3V , Temp.=25 Remarks P/N RT0301 RT0302 TIMES 1 2 2000.04.11 1 Door Bell Generator ** Function Description: When TG PIN's signal changed from low to high, the RT0301/RT0302 will present Ding-Dong sound from Sout PIN. The waveform will be listed below : RT0301: TG Sout DING DONG TG Sout DING DONG DING DONG RT0302: TG Sout DING DONG DING DONG TG Sout DING DONG DING DONG DING DONG DING DONG ** Envelope waveform: The envelope waveform of DING is controlled by E1's R.C. circuit. The envelope waveform of DING is controlled by E2's R.C. circuit. DING: C R TG VDD E1 OSCI E2 OSCO VSS Sout E1 DONG: TG VDD E1 OSCI E2 OSCO VSS Sout E2 C R 8L P-DIP (300 mil ) Dimension: Symbol Dimension in inch Min 0.010 0.124 0.013 0.045 0.005 0.340 0.275 0.240 0.090 0.120 0 0.330 0.015 Typ 0.130 0.018 0.060 0.010 0.360 0.300 0.250 0.100 0.130 0.355 0.030 Max 0.210 0.136 0.023 0.075 0.015 0.380 0.325 0.260 0.110 0.140 15 0.380 0.045 Dimension in mm Min 0.25 3.15 0.33 1.14 0.13 8.64 6.99 6.10 2.29 3.05 0 8.38 0.38 Typ 3.30 0.46 1.52 0.25 9.14 7.62 6.35 2.54 3.30 9.02 0.76 Max 5.33 3.45 0.58 1.91 0.38 9.65 8.26 6.60 2.79 3.56 15 9.65 1.44 A A1 A2 B B1 c D E E1 e1 L a eA S NOTE: 1. Controlling dimension : Inch 2. General appearance spec. should be based on final visual inspection spec. |
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