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FAN7033MP
2W Stereo Power Amplifier with Fixed Gain
Features
* 1.9WRMS and 2.45WRMS Power Per Each Channel Into 4 Load With Less Than 1% and 10% THD+N, Respectively * Internally Fixed Gain : 21.6dB(Av=12) * Low Quiescent Current : Typical 5.5mA@5V * Low Shutdown Current : Typical 0.04A@5V * Fully Differential Input, Which Immunes the Common Mode Noise * Active Low Shutdown Logic * Guaranteed Stability Under No Load Condition * Very Small Volume and Thermally Enhanced SurfaceMount 14MLP Package(4mm*4mm)
Description
The FAN7033MP is a dual fully differential power amplifier in a thermally enhanced 14-pin MLP package. When delivering 1.9W of continuous RMS power into 4 speaker at 5V supply, the FAN7033MP has less than 1% of THD+N over the entire audible frequency range, 20Hz to 20kHz. To save power consumption in the portable applications, the FAN7033MP provides shutdown function. Setting the shutdown pin to ground level, the FAN7033MP falls into shutdown mode and consumes less than 4A over all supply voltage range, 2.7V to 5.5V. Additional components such as resistors for gain setting and bootstrap capacitors are not needed, making the FAN7033MP well suited for portable sound systems and other hand-held sound equipments. Target applications include the cellular phones, notebook, desktop computers, etc.
14MLP
1 BOTTOM VIEW
Typical Applications
* Cellular Phones * Notebook Computer * Desktop Computer
Internal Block Diagram
90k 15k
RIN- 12
15k 15k
13 ROUT+ 10 PVDD1 9 ROUT15k 90k 90k 90k
RIN+ 4
11 VDD 7 BYPASS 8 GND
SD 14
VDD/2
BIAS & CONTROL
90k 90k
90k 15k
LIN+ 6
15k 15k
1 LOUT+ 3 PVDD2 5 LOUT15k 90k
LIN- 2
Rev. 1.0.0
(c)2003 Fairchild Semiconductor Corporation
FAN7033MP
Pin Assignments
1 2 3 4 5 6 7 TOP VIEW
14 13 12 11 10 9 8
14 13 12 11 10 9 8 BOTTOM VIEW
1 2 3 4 5 6 7
Pin Descriptions
Pin No 1 2 3** 4 5 6 7 8* 9 10** 11** 12 13 14 Symbol LOUT+ LINPVDD2 RIN+ LOUTLIN+ BYPASS GND ROUTPVDD1 VDD RINROUT+ SD I/O O I I I O I O O I I I O I Left Channel (+) Output Left Channel (-) Input Left Channel Power Supply Voltage Right Channel (+) Input Left Channel (-) Output Left Channel (+) Input Bypass Capacitor Connect Ground Right Channel (-) Output Right Channel Power Supply Voltage Power Supply Voltage Right Channel (-) Input Right Channel (+) Output Shutdown Logic Low SD=VDD: Device Enable SD=GND: Device Shutdown Decription
* Pin8(GND) and Exposed PAD are internally tied together. **For the best performance, VDD, PVDD1 and PVDD2 must be the same voltage level(strongly recommend).
2
FAN7033MP
Absolute Maximum Ratings
Parameter Maximum Supply Voltage Power Dissipation Operating Temperature Storage Temperature Junction Temperature Thermal Resistance (Junction to Ambient) ESD Rating (Human Body Model) ESD Rating (Machine Model)
* Rthja was derived using the JEDEC boards.
Symbol VDDmax PD TOPG TSTG TJmax Rthja*
Value 6.0V Internally Limited -40 ~ +85 -65 ~ +150 150 38 145 2000 300
Unit V W C C C C/W V V
Remark
Multi-Layer Single-Layer
Operating Rating
Parameter Power Supply Voltage Symbol VDD Min. 2.7 Typ. Max. 5.5 Unit V
3
FAN7033MP
Electrical Characteristics
(VDD = 5.0V, Ta = 25C, unless otherwise specified) Parameter Offset Voltage Supply Current Shutdown Current Output Power Total Harmonic Distortion + Noise Power Supply Rejection Ratio Output Noise Voltage Symbol VOFF IDD ISD PO THD+N PSRR VN Conditions RL=4, Av=21.6dB No Input, No Load SD = GND THD+N =1%, RL = 4, f = 1kHz THD+N =1%, RL = 8, f = 1kHz PO = 1W, RL=4, f = 20kHz Cbyp = 1F, RL=4, BTL Mode, VDD=500mVpp, f = 1kHz Input=GND, RL=4, f=1kHz Min. -25 38 Typ. 5.5 0.04 1.9 1.25 0.6 68 -120 Max. 25 10 4 Unit mV mA A W W % dB dBv
Electrical Characteristics
(VDD = 3.3 V, Ta = 25C, unless otherwise specified) Parameter Offset Voltage Supply Current Shutdown Current Output Power Total Harmonic Distortion + Noise Power Supply Rejection Ratio Output Noise Voltage Symbol VOFF IDD ISD PO THD+N PSRR VN Conditions RL=4, Av=21.6dB No Input, No Load SD = GND THD+N =1%, RL = 4, f = 1kHz THD+N =1%, RL = 8, f = 1kHz PO = 1W, RL=4, f = 20kHz Cbyp = 1F, RL=4, BTL Mode, VDD=330mVpp, f = 1kHz Input=GND, RL=4, f=1kHz Min. -25 38 Typ. 4.5 0.04 0.75 0.53 0.75 68 -120 Max. 25 8 4 Unit mV mA A W W % dB dBv
Electrical Characteristics
(VDD = 2.7 V, Ta = 25C, unless otherwise specified) Parameter Offset Voltage Supply Current Shutdown Current Output Power Total Harmonic Distortion + Noise Power Supply Rejection Ratio Output Noise Voltage Symbol VOFF IDD ISD PO THD+N PSRR VN Conditions RL=4, Av=21.6dB No Input, No Load SD = GND THD+N =1%, RL = 4, f = 1kHz THD+N =1%, RL = 8, f = 1kHz PO = 0.5W, RL=4, f = 20kHz Cbyp = 1F, RL=4, BTL Mode, VDD=270mVpp, f = 1kHz Input=GND, RL=4, f=1kHz Min. -25 36 Typ. 4.1 0.04 0.45 0.32 0.9 62 -120 Max. 25 7 4 Unit mV mA A W W % dB dBv
4
FAN7033MP
Typical Application Circuits
Single-Ended Input
90k
1uF
RIN-
15k
CRINN RIGHT SE INPUT
1uF
12
15k
13 10 9
15k 90k 90k 90k
ROUT+ PVDD1
100nF
4
RIN+ CRINP
4
15k
ROUTVDD BYPASS
1uF
RIGHT OUTPUT
11 7 8
ShutDown
SD
14
VDD/2
BIAS & CONTROL
90k 90k
GND
90k
220uF
CLINP
1uF
LIN+
15k
6
15k
1 3 5
15k 90k
LOUT+
100nF
LEFT SE INPUT
CLINN
1uF
LIN-
15k
PVDD2 LOUT-
4
2
LEFT OUTPUT
5
FAN7033MP
Typical Application Circuits (continued)
Differential Input
90k
1uF
RIN-
15k
CRINN RIGHT DIFF. INPUT
1uF
12
15k
13 10 9
15k 90k 90k 90k
ROUT+ PVDD1
100nF
4
RIN+ CRINP
15k
4
ROUTVDD BYPASS
1uF
RIGHT OUTPUT
11 7 8
ShutDown
SD
14
VDD/2
BIAS & CONTROL
90k 90k
GND
90k
220uF
CLINP
1uF
LIN+
15k
6
15k
1 3 5
15k 90k
LOUT+
100nF
LEFT DIFF. INPUT
CLINN
1uF
LIN-
15k
PVDD2 LOUT-
4
2
LEFT OUTPUT
6
FAN7033MP
Performance Characteristics : Differential Input
10 5 10 5
VDD=5V RL=8 Av=21.6dB
2 1
20kHz
THD [%]
2 1 0.5
20kHz
THD [%]
0.5
1kHz
0.2 0.1 0.05
0.2 0.1
1kHz
20Hz VDD=5V RL=4 Av=21.6dB
20m 50m 100m 200m 500m 1 2 3
0.05
20Hz
0.02 0.01 10m
0.02 0.01 10m
20m
50m
100m
200m
500m
1
2
3
Output Power [W]
Output Power [W]
Figure 1. THD+N vs. Output Power
Figure 2. THD+N vs. Output Power
10 5
10 5
2 1
20kHz
2 1
20kHz
THD [%]
0.5
THD [%]
1kHz
0.5
1kHz
0.2 0.1 0.05
0.2 0.1 0.05
20Hz
0.02 0.01 10m
VDD=3.3V RL=4 Av=21.6dB
200m 500m 1 2 3
20Hz
0.02 0.01 10m
VDD=3.3V RL=8 Av=21.6dB
100m 200m 500m 1 2 3
20m
50m
100m
20m
50m
Output Power [W]
Output Power [W]
Figure 3. THD+N vs. Output Power
Figure 4. THD+N vs. Output Power
10 5
10 5
2 1
20kHz
2 1
20kHz
THD [%]
0.5
1kHz
THD [%]
0.5
1kHz
0.2 0.1 0.05
0.2 0.1 0.05
20Hz
0.02 0.01 10m
VDD=2.7V RL=4 Av=21.6dB
100m 200m 500m 1 2 3
0.02 0.01 10m
20Hz
VDD=2.7V RL=8 Av=21.6dB
100m 200m 500m 1 2 3
20m
50m
20m
50m
Output Power [W]
Output Power [W]
Figure 5. THD+N vs. Output Power
Figure 6. THD+N vs. Output Power
7
FAN7033MP
Performance Characteristics(Continued)
10 5 2 1 0.5
10 5 2 1 0.5
VDD=5V Output power =1W RL=4
VDD=5V Output power =1W RL=8
THD [%]
THD [%]
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 7. THD+N vs. Frequency
Figure 8. THD+N vs. Frequency
10 5 2 1 0.5
10
VDD=3.3V Output power =500mW RL=4
5 2 1 0.5
VDD=3.3V Output power =500mW RL=8
THD [%]
0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
THD [%]
0.2
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 9. THD+N vs. Frequency
Figure 10. THD+N vs. Frequency
10 5 2 1 0.5
10
VDD=2.7V Output power =250mW RL=4
5 2 1 0.5
VDD=2.7V Output power =250mW RL=8
THD [%]
THD [%]
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 11. THD+N vs. Frequency
Figure 12. THD+N vs. Frequency
8
FAN7033MP
Performance Characteristics(Continued)
+0 -10 -20 -30 -40 +0
VDD=5V+/-5% RL=4
-10 -20 -30 -40
VDD=5V+/-5% RL=8
PSRR [dB]
-60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
PSRR [dB]
-50
-50 -60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 13. PSRR vs. Frequency
Figure 14. PSRR vs. Frequency
+0 -10 -20 -30 -40
+0
VDD=3.3V+/-5% RL=4
-10 -20 -30 -40
VDD=3.3V+/-5% RL=8
PSRR [dB]
-60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
PSRR [dB]
-50
-50 -60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 15. PSRR vs. Frequency
Figure 16. PSRR vs. Frequency
+0 -10 -20 -30 -40
+0
VDD=2.7V+/-5% RL=4
-10 -20 -30 -40
VDD=2.7V+/-5% RL=8
PSRR [dB]
PSRR [dB]
-50 -60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
-50 -60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 17. PSRR vs. Frequency
Figure 18. PSRR vs. Frequency
9
FAN7033MP
Performance Characteristics(Continued)
+0 -10 -20 -30 -40 +0
VDD=5V Output power = 1W RL=4
-10 -20 -30 -40
VDD=5V Output power = 1W RL=8
Crosstalk [dB]
-50 -60 -70 -80 -90 -100 -110 -120 20 50 100 200 500 1k 2k 5k 10k 20k
Crosstalk [dB]
-50 -60 -70 -80 -90
Left-to-Right
Left-to-Right Right-to-Left
Right-to-Left
-100 -110 -120 20 50 100 200
500
1k
2k
5k
10k
20k
Frequency [Hz]
Frequency [Hz]
Figure 19. Crosstalk vs. Frequency
Figure 20. Crosstalk vs. Frequency
7.0m
6.0m
6.0m
VDD=5V
5.0m
Supply Current [A]
5.0m 4.0m 3.0m 2.0m 1.0m
VDD=3.3V Supply Current [A] 4.0m 3.0m 2.0m 1.0m 0.0 VDD=2.7V
0.0
0
1
2
3
4
5
0
1
Supply Voltage [V]
2 3 Shutdown Pin Voltage [V]
4
5
Figure 21. Supply Current vs. Supply Voltage
Figure 22. Supply Currrent vs. SD Voltage
1.4 1.2
Power Dissipation [W]
VDD=5V
0.7 0.6 Power Dissipation [W] 0.5 0.4 0.3 0.2 0.1 0.0
VDD=5V
1.0 0.8
VDD=3.3V
0.6 0.4 0.2 0.0
VDD=2.7V
VDD=3.3V
THD less than 1% RL=4 f=1kHz
VDD=2.7V
THD less than 1% RL=8 f=1kHz 0.8 1.0 1.2 1.4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0.0
0.2
0.4
0.6
Output Power [W]
Output Power [W]
Figure 23. Power Dissipation vs. Output Power
Figure 24. Power Dissipation vs. Output Power
10
FAN7033MP
Performance Characteristics(Continued)
3.0 f=1kHz RL=4
2.0 f=1kHz RL=8 10% THD+N 1.0 1% THD+N
2.5 Output Power [W]
1.5
2.0 10% THD+N
Output Power [W]
1.5
1% THD+N
1.0
0.5
0.5
0.0 2.5
3.0
3.5
4.0 Supply Voltage [V]
4.5
5.0
5.5
0.0 2.5
3.0
3.5
4.0
Supply Voltage [V]
4.5
5.0
5.5
Figure 25. Output Power vs. Supply Voltage
Figure 26. Output Power vs. Supply Voltage
1.2
2.0
Output Power [W]
VDD=5V f=1kHz
Output Power [W]
1.0
VDD=3.3V f=1kHz
10% THD+N 1.5
0.8 10% THD+N 0.6
1.0 1% THD+N 0.5
0.4 1% THD+N 0.2
0.0
0
8
16
24
32
40
48
56
64
0.0
0
8
16
24
32
40
48
56
64
RL-Load Resistance []
RL-Load Resistance []
Figure 27. Output Power vs. Output Load
Figure 28. Output Power vs. Output Load
0.7 0.6 0.5
Output Power [W]
100u
VDD=2.7V f=1kHz
Output Noise Voltage [uV]
50u
20u 10u 5u
VDD=5V RL=4 Av=21.6dB
0.4 0.3 0.2 0.1
10% THD+N
2u 1u 500n
1% THD+N
200n
0.0
0
8
16
24
32
40
48
56
64
100n 20
50
100
200
500
1k
2k
5k
10k
20k
RL-Load Resistance []
Frequency [Hz]
Figure 29. Output Power vs. Output Load
Figure 30. Outut Noise Voltage vs. Frequency
11
FAN7033MP
Performance Characteristics : Single-Ended Input
10 5
10 5
VDD=5V RL=8 Av=21.6dB 20kHz
2 1
20kHz
THD [%]
2 1 0.5
THD [%]
0.5
1kHz
0.2 0.1 0.05
0.2 0.1
1kHz
20Hz VDD=5V RL=4 Av=21.6dB
20m 50m 100m 200m 500m 1 2 3
0.05
20Hz
0.02 0.01 10m
0.02 0.01 10m
20m
50m
100m
200m
500m
1
2
3
Output Power [W]
Output Power [W]
Figure 33. THD+N vs. Output Power
Figure 34. THD+N vs. Output Power
10 5
10 5
2 1
20kHz
2 1
20kHz
THD [%]
0.5
THD [%]
1kHz
0.5
0.2 0.1 0.05
0.2 0.1 0.05
1kHz
20Hz
0.02 0.01 10m
VDD=3.3V RL=4 Av=21.6dB
100m 200m 500m 1 2 3
0.02 0.01 10m
20Hz
20m 50m 100m 200m 500m 1
VDD=3.3V RL=8 Av=21.6dB
2 3
20m
50m
Output Power [W]
Output Power [W]
Figure 35. THD+N vs. Output Power
Figure 36. THD+N vs. Output Power
10 5
10 5
2 1
20kHz
2 1
20kHz
THD [%]
0.5
THD [%]
1kHz
0.5
1kHz
0.2 0.1
0.2 0.1 0.05
20Hz
0.05
0.02 0.01 10m
VDD=2.7V RL=4 Av=21.6dB
100m 200m 500m 1 2 3
20Hz
0.02 0.01 10m
VDD=2.7V RL=8 Av=21.6dB
100m 200m 500m 1 2 3
20m
50m
20m
50m
Output Power [W]
Output Power [W]
Figure 37. THD+N vs. Output Power
Figure 38. THD+N vs. Output Power
12
FAN7033MP
Performance Characteristics(Continued)
10 5 2 1 0.5 10 5 2 1 0.5
VDD=5V Output power =1W RL=4
VDD=5V Output power =1W RL=8
THD [%]
0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
THD [%]
0.2
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 39. THD+N vs. Frequency
Figure 40. THD+N vs. Frequency
10 5 2 1 0.5
10
VDD=3.3V Output power =500mW RL=4
5 2 1 0.5
VDD=3.3V Output power =500mW RL=8
THD [%]
0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
THD [%]
0.2
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 41. THD+N vs. Frequency
Figure 42. THD+N vs. Frequency
10 5 2 1 0.5
10
VDD=2.7V Output power =250mW RL=4
5 2 1 0.5
VDD=2.7V Output power =250mW RL=8
THD [%]
0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
THD [%]
0.2
0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 20 50 100 200 500 1k 2k 5k 10k 20k
Frequency [Hz]
Frequency [Hz]
Figure 43. THD+N vs. Frequency
Figure 44. THD+N vs. Frequency
13
FAN7033MP
Performance Characteristics(continued)
4.0 3.5 Multi Layer
Power Dissipation [W]
3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 150 Single Layer
Ambient Temperature [C]
Figure 45. Power Derating Curve
Notes : - Single Layer(JESD51-3) : Thermal Vias : 0 Board Size : 76.2mm*114.3mm*1.57mm(JESD51-3) Copper Thickness : 2.0oz Copper Coverage : Top Layer : Traces + Metalization Area(3.34mm*2.24mm) - Multi Layer(JESD51-7) : Thermal Vias : 6 Board Size : 76.2mm*114.3mm*1.6mm(JESD51-7) Copper Thickness : 2.0oz/1.0oz/1.0oz Copper Coverage : Top Layer : Traces + Metalization Area(3.34mm*2.24mm) Middle Layers(Power/Ground Planes) : 74.2mm*74.2mm - JESD51-3 : Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages(Single Layer) - JESD51-7 : High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages(Multi Layers) - JESD51-2 : Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection(Still Air)
14
FAN7033MP
Applications Information
Functional Description
The FAN7033MP is a stereo power amplifier capable of delivering 1.9W continuous RMS(Root Mean Square) power into 4 load with 1% THD(Total Harmonic Distortion). At 10% THD, the FAN7033MP can deliver above 2W into 4 load. The FAN7033MP has 5 supply input pins. Three among them are used for positive supply and the rest of them is for the ground. Three positive supply input pins : pin3(PVDD2), pin10(PVDD1) and pin11(VDD) must be tied together. To improve the cross-talk between cannels, these pins are not connected internally. Therefore, these pins must be externally connected on the PCB. Pin 8 and the exposed pad are allocated to ground. Thus, the exposed pad must be connected to the ground. The FAN7033MP is provided with differential inputs. These inputs increase the common-mode noise immunity. Furthermore, differential configuration in the input section helps to decrease total harmonic distortion and pop noise that occurs when shutdown is released. When only single input is available, the distortion performance is slightly degraded. To save the standby power consumption, the FAN7033MP provides shutdown function. Putting pin14(SD) to be low, the chip falls into shutdown mode. At this mode, it consumes micro power at the room temperature of 25C and this power consumption is only due to the leakage current of the chip. This leakage current is the strong function of the temperature. Thus at the high ambient temperature, the shutdown current slightly increases. The logic threshold of shutdown pin lies nearby VDD/2. So, the logic threshold level does not follow TTL logic level. Thus, when the users want to control the chip according to the TTL logic level, some kinds of logic-level-changing circuit may be needed.
Operation of the Amplifier
90k
INN
CINN
15k
OUTP AMP1
15k
INP
CINP
15k
OUTN AMP2
15k 90k 90k 90k
VDD/2
Figure 1. Configuration of Power Amplifier Figure 1 shows the configuration of the single channel BTL(Bridge-Tied Load) power amplifier. To make the differential input configuration, the FAN7033MP uses several resistor networks as depicted in figure 1. For the input resistor, 15k is used. This resistor converts the input voltage signal to the current signal. The converted current signal flows to the feedback resistor. For FAN7033MP, the feedback resistance is six times larger than input resistance. Thus, the gain is 12(about 21.6dB). For the 5V supply, the input signal has 0.83Vpeak voltage swing makes 10Vpp output swing. The exact gain formula is given by
OUTP - OUTN = 12 ( INP - INN )
(1)
As shown in equation (1), for the single-ended input case, the gain is also preserved. However, to get the same output swing with the differential input case, the input swing must be double comparing with the differential input swing.
PCB Layout and Supply Regulation
Metal trace resistance between the BTL output and the parasitic resistance of the power supply line both heavily
15
FAN7033MP
affect the output power. In order to obtain the maximum power depicted in the performance characteristics figures, outputs, power, and ground lines need wide metal trace. The parasitic resistance of the power line increases ripple noise and degrades the THD and PSRR performance. To reduce such unwanted effect, a large capacitor must be connected between VDD pin and GND pin as close as possible. To improve power supply regulation performance, use a capacitor with low ESR.
Power Supply Bypassing
Selection of a proper power supply bypassing capacitor is critical to obtaining lower noise as well as higher power supply rejection. Larger capacitors may help to increase immunity to the supply noise. However, considering economical design, attaching 10F electrolytic capacitor or tantalum capacitor with 0.1F ceramic capacitor as close as possible to the VDD pins are enough to get a good supply noise rejection.
Selection of Input Capacitor
The input capacitors CINN and CINP block the DC voltage also low frequency input signal. Thus, these capacitors act as a high pass filter. When there are DC level differences between input source and the amplifier, these capacitors block DC voltage and make easy connection. However, these capacitors limit the low frequency input signal. Thus to cover the full audio frequency range, the values of these are very important. The input impedance and the capacitance of these capacitors stand for the low frequency characteristics and -3dB frequency is
1 f L = ---------------------------2 Zin C
(2)
Where Zin is the input equivalent impedance and C is the capacitance of the input capacitor. For FAN7033MP, the input has several resistors and these resistors determine the input impedance. In the normal condition, (-) input of the amplifier looks like a voltage source since the negative feedback topology makes (-) input virtually be the AC ground. Thus, resistance between the negative input of the amplifier and input pin is 15k. The resistance toward (+) input is the summation of 15k and 90k. Thus total input impedance is
Zin = 15k || ( 15k + 90k ) = 13.125k
(3)
Considering fL=20Hz(the lowest frequency of the audio freqeuncy range), it is possible to get the capacitance value from equation(2) and (3) as follow:
1 Cin = ---------------------------- = 0.606uF 2 Zin f L
(4)
Thus, Cin must be higher than 0.606uF. In the application note, 1uF is chosen by considering input impedance variation during the chip fabrication. When using a capacitor which has the polarity, customers must carefully connect the capacitor. The input DC level of the FAN7033MP is a half of VDD. Thus, if the DC level of a source is higher than VDD/2, the positive lead of the capacitor must be faced toward the source.
Shutdown Mode
In order to reduce power consumption while not in use, the FAN7033MP contains a shutdown pin to externally turnoff bias circuitry. This shutdown feature turns the amplifier off when a logic low is placed on the shutdown pin. The trigger point between a logic low and logic high level is typically half-supply. It is best to switch between ground and supply to provide maximum device performance. By switching the shutdown pin to VDD , the FAN7033MP supply current draw will be minimized in idle mode. In either case, the shutdown pin should be tied to a definite voltages to avoid unwanted state changes. In many appplications, a microcontroller or microprocessor output is used to control the shutdown circuitry which provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-down resistor. When the switch is closed, the shutdown pin is connected to VDD and enables the amplifier. If the switch is open, then the external pull-down resistor will disable the FAN7033MP. This scheme guarantees that the shutdown pin will not float thus preventing unwanted state changes.
16
FAN7033MP
Single-Ended Input
For the case, a source does not provide the fully differential signal, the residual input must be well treated.
90k
INPUT
CINN
15k
OUTP AMP1
15k 15k
FLOATING
15k 90k 90k
OUTN AMP2
90k
VDD/2
Case (A) : Residual Input Pin Floating
90k
INPUT
CINN
15k
OUTP AMP1
15k
CINP
15k
OUTN AMP2
15k 90k 90k 90k
VDD/2
Case (B) : AC Coupling to Ground Case(A) : For this case, input is left alone without any treatment, that is, input pin is floating. Even the pin is floating, the BTL amplifier works and drives load. However, this configuration might cause unwanted noise at the output signal. Furthemore, floated configuration decreases PSRR(Power Supply Rejection Ratio) and increase POP noise. Case(B) : Case(B) is strongly recommended. This configuration increases PSRR and decreases POP noise as well. Of cource, to get the best performance, CINP must be the same value with CINN.
THD+N(Total Harmonic Distortion plus Noise)
THD+N stands for linearity and output noise of the amplifier as well. The FAN7033MP has the circuit for enhancing THD. In spite of that, to get low THD+N, users should follow the recommendation: (1) Use fully differential input configuration : A fully differential input makes low THD at output. Thus, for a singleended input case, THD+N slightly increaes. (2) Do not miss CBYP. CBYP helps to increase PSRR. Thus, using this capacitor, it is possible to increase noise immunity from the supply line. (3) Do not miss CSUP. Voltage fluctuation in supply line increases THD. Thus, such voltage fluctuation must be reduced to get low THD by connecting this capacitor between all VDD pins and the ground as closely as possible.
17
FAN7033MP
Mechanical Dimensions
Package Dimensions in millimeters
14MLP
18
FAN7033MP
Ordering Information
Device FAN7033MP Package 14MLP Operating Temperature -40C ~ +85C
19
FAN7033MP
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 8/20/03 0.0m 001 Stock#DSxxxxxxxx 2003 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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