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 M62383FP
5 V Composite Type D-A Converter
REJ03F0076-0100Z Rev.1.0 Sep.19.2003
Description
The M62383FP is a 5 V composite D-A converter incorporating two modules, with two 8-bit buffer amp output D-A converters and an 8-bit D-A converter for reference voltage adjustment as one module. The D-A outputs can be set simultaneously for each module without address setting. The data configurations comprise 16-bit serial data for the two main D-A circuits and 8-bit serial data for the reference voltage setting D-A. The D-A output buffer amps have full-swing output capability, from power supply voltage to GND.
Features
* * * * Simultaneous dual-output data setting by means of 16-bit serial data (TTL level) Data transfer clock frequency: 10 MHz (max.) D-A converter output settling time: 5 s (typ.) Power-on reset and external reset (L reset) functions (D-A output = 0 V, MON output = VREF x 255/256)
Application
Automatic adjustment of electronic devices
Recommended Operating Conditions
Power supply voltage: 5 V 10%
Pin Connection Diagram (Top View)
GND MONx D/AXx D/AYx VREFx VCC VREFy D/AXy D/AYy MONy GND RESET 1 2 3 4 5 24 23 22 21 20 SCKREFx SDIREFx SLDREFx SCKx SDIx SLDx SCKREFy SDIREFy SLDREFy SCKy SDIy SLDy
M62383FP
6 7 8 9 10 11 12
19 18 17 16 15 14 13
Package: 24P2Q-A
Rev.1.0, Sep.19.2003, page 1 of 9
M62383FP
Block Diagram
VREFx 5
SDIREFx
23
8-bit shift register
8-bit latch
8-bit D-A
2
MONx
SCKREFx 24 SLDREFx 22 SDIx 20 SCKx 21 SLDx 19
8-bit latch
16-bit shift register
8-bit latch
8-bit D-A
3
D-AXx
8-bit D-A
4
D-AYx
Module 1 VCC 6
Reset
12 RESET 11 GND
GND 1 VREFy 7
SDIREFy 17 SCKREFy 18 SLDREFy 16 SDIy 14 SCKy 15 SLDy 13 9 Module 2 D-AYy 8 D-AXy 10 MONy
Rev.1.0, Sep.19.2003, page 2 of 9
M62383FP
Pin Description
Pin No. 1, 11 2 10 3 4 8 9 5 7 6 12 Symbol GND MONx MONy D/Axx D/Axy D/Ayx D/Ayy VREFx VREFy Vcc RESET Function Ground (GND) pin Module 1: Reference voltage D-A output pin Module 2: Reference voltage D-A output pin Module 1: 8-bit D-A output pin (x side) Module 1: 8-bit D-A output pin (y side) Module 2: 8-bit D-A output pin (x side) Module 2: 8-bit D-A output pin (y side) Module 1: Reference voltage input pin Module 2: Reference voltage input pin Power supply (VCC) pin Reset pin When input level is changed from "H" to "L", D-A output becomes 0 V (DA data: 00h), and MON output becomes VREF x 255/256 (MON data: FFh). Even if input level is restored from "L" to "H", output is maintained until next data setting. TTL-based. At rising edge of input signal from "L" to Module 1: Load signal input pin "H", data in 16-bit shift register is loaded Module 2: Load signal input pin into D/A data register. TTL-based. At rising edge of input signal from "L" to "H", data in 8-bit shift register is loaded into D/A data register. TTL-based. TTL-based 16-bit-length serial data TTL-based 8-bit-length serial data
19 13 22 16 20 14 23 17 21 15 18 24
SLDx SLDy SLDREFx SLDREFy SDIx SDIy SDIREFx SDIREFy SCKx SCKy SCKREFx SCKREFy
Module 1: Reference voltage load signal input pin Module 2: Reference voltage load signal input pin Module 1: Serial data input pin Module 2: Serial data input pin Module 1: Reference voltage serial data input pin Module 2: Reference voltage serial data input pin Module 1: Shift clock signal input pin Module 2: Shift clock signal input pin Module 1: Reference voltage shift clock signal input pin Module 2: Reference voltage shift clock signal input pin
TLL Schmitt trigger based serial clock input SDI serial data is sent to 16-bit shift register one bit at a time at each rise. TLL Schmitt trigger based serial clock input SDIREF serial data is sent to 8-bit shift register one bit at a time at each rise.
Absolute Maximum Ratings
(Unless specified otherwise, Ta = 25C)
Item Power supply voltage Digital input voltage Reference voltage input voltage Output voltage Internal permissible loss Operating ambient temperature Storage temperature Symbol VCC VDIN VREF VDAout Pd Topr Tstg Rated Value -0.3 to 7.0 -0.3 to Vcc+0.3 ( 7.0) -0.3 to Vcc+0.3 ( 7.0) -0.3 to Vcc+0.3 ( 7.0) 500 -20 to +85 -55 to +150 Unit V V V V mW C C Conditions DC voltage ("H" level voltage)
Rev.1.0, Sep.19.2003, page 3 of 9
M62383FP
Recommended Operating Conditions
(Unless specified otherwise, VCC = 5 V 10%, VREF = VCC, fSCK = 5 MHz, VIH = VCC, VIL = GND, Ta = 25C)
Specification Values Item Power supply voltage Reference power supply voltage Clock frequency "H" level input voltage "L" level input voltage Clock input hysteresis voltage Clock "L" pulse width Clock "H" pulse width Clock rise time Clock fall time Data setup time Data hold time Load setup time Load hold time Load "H" pulse time Reset "H" pulse time Symbol Vcc VREF fSCK VIH VIL V tSCKL tSCKH tSCKR tSCKF tDCH tCHD tCHL tLDC tLDH tRSTL Min. 4.5 GND 2 GND 0.4 30 30 10 10 10 20 40 20 20 50 0.6 Typ. 5.0 Max. 5.5 Vcc 10 Vcc 0.8 1.0 450 450 100 100 100 200 800 400 400 Unit V V MHz V V V ns ns ns ns ns ns ns ns ns ns Test Conditions VCC voltage or below TTL "H" input level TTL "L" input level TTL Schmitt trigger See timing chart See timing chart See timing chart See timing chart See timing chart See timing chart See timing chart See timing chart See timing chart See timing chart
Timing Chart
tSCKH tSCKR tSCKF
SCK
tSCKL
SDI
tDCH tCHD tCHL tLDH tLDC
SLD
tLDD 0.5LSB VOA = 0.5V, VOR = 0.5V VOA = 4.5V, VOR = 4.5V 0.5LSB
RESET
tRSTL
tLDD
0.5V
Rev.1.0, Sep.19.2003, page 4 of 9
M62383FP
Electrical Characteristics
(Unless specified otherwise, VCC = 5 V 10%, VREF = VCC, fSCK = 5 MHz, VIH = VCC, VIL = GND, Ta = -20C to 85C) (a) Common to analog and digital blocks
Specification Values Item Circuit current Symbol Icc Min. Typ. 6.0 Max. 10 Unit mA Test Conditions
(b) Digital block
Specification Values Item Input leakage current Symbol IILK Min. -10 Typ. Max. 10 Unit A Test Conditions VIN = 0V to 5V
Rev.1.0, Sep.19.2003, page 5 of 9
M62383FP (c) Analog block
Specification Values Item Reference voltage input voltage Reference voltage input current Upper reference voltage output voltage (*1) Lower reference voltage output voltage (*1) Reference voltage output offset voltage (*1) Upper buffer amp D-A output voltage Lower buffer amp D-A output voltage Accuracy: Differential nonlinearity error Accuracy: Nonlinearity error Accuracy: Zero scale error Accuracy: Full-scale error Reference voltage input pin capacitance D-A converter output settling time Symbol VREF IREF VORU VORL VOR Min. GND -1 4.88 GND -100 4.98 Typ. Max. Vcc +1 Vcc 0.10 100 Unit V A V V mV Test Conditions When SDIREF is set to (FF)h, VREF = MON GNDVREFVcc SDIREF = (FF)h, SDI = (FFFF)h, MON output value SDIREF = (00)h, SDI = (FFFF)h, MON output value VREF = 2 to 5V, SDI = (FFFF)h, 255/256VREF-VOR (MON output value) IOA = 0.5mA, SDIREF = (FF)h, SDI = (FFFF)h IOA = 0.5mA, SDIREF = (FF)h, SDI = (0000)h (Monotone increasing capability)
VOAU VOAL SDL SNL SZERO SFULL CREF tLDDA
4.5 0.05 -1.0 -1.0 -2.0 -2.0 +1.0 +1.0 +2.0 +2.0 10 5 10
V V LSB LSB LSB LSB pF S
VREF = 2 to 5 V: Buffer output offset (*2) VREF = 2 to 5 V: Buffer output offset (*2)
Reference voltage output settling time
tLDDR
10
20
S
VOA = 0.54.5V, IOA = 0.1mA, Co = 50pF, SDIREF = (FF)h, Time for output to be absorbed within 0.5 LSB VOA = 0.54.5V, no external load Time for output to be absorbed within 0.5 LSB Vcc = 05V, VOA = 0V, VOR = VREFx255/256 set
Power-on reset voltage (*3)
VRESET
0.8
1.5
3
V
Notes: 1. MON output specification. Equivalent to 5 LSB. 2. D-A output (D-Axx, D-Axy, D-Ayx, D-Ayy) specification. MON output is stipulated by 3 items in *1 above (VORU, VORL, VOR). 3. Reference values
Rev.1.0, Sep.19.2003, page 6 of 9
M62383FP Digital Data Format
SCK
SDI
MSBn * D-A converter serial data is MSB-first data.
LSB
SLD
D-A
SDIx, SDIy MSB D15 D7X D14 D6X D13 D5X D12 D4X D11 D3X D10 D2X D09 D1X D08 D0X D07 D7Y D06 D6Y D05 D5Y D04 D4Y D03 D3Y D02 D2Y D01 D1Y
LSB D00 D0Y
VOA = VOR x
2 xD7 *+2 xD6 *+2 xD5 *+2 xD4 *+2 xD3 *+2 xD2 *+2 xD1 *+2 xD0 * 256
7 6 5 4 3 2 1 0
VOA: D-A output voltage VOR: MON output voltage Dn*: D-A data n = 0 to 7, * = x, y SDIREFx, SDIREF MSB D7 D6 D5 D4 D3 D2 D1 LSB D0
VOA = VREF x
2 xD7+2 xD6+2 xD5+2 xD4+2 xD3+2 xD2+2 xD1+2 xD0 256
7 6 5 4 3 2 1 0
VOR: MON output voltage VREF: Reference voltage
Usage Notes
1. This IC has three pins to which a constant voltage is applied during use (constant-voltage input pins: VCC, VREFx, VREFy). If ripples or spikes are imposed on these pins, D-A conversion accuracy may fall. When using this IC, a capacitor (1 F or higher recommended) must be inserted between the constant-voltage input pins and ground (GND) in order to ensure stable D-A conversion. 2. With regard to the reset function (power-on reset), when the power supply voltage passes the vicinity of 1.5 V at power-on, the D-A output voltage (VOA) becomes 0 V (D-A data: 00h), and the MON output voltage (VOR) becomes VREF x 255/256 (MON data: FFh), and output is maintained until the next data is set. In the event of repeated power supply on/off operations at short intervals, a reset may not be effected because of the simplicity of the circuit.
Rev.1.0, Sep.19.2003, page 7 of 9
M62383FP
Sample Standard Application Circuit
D-Ax* Reference voltage monitoring D-A output xx xy 5V 1 2 3 4 5 24 23 22 21 20 Module 1 D-A data
M62383FP
6 7 D-A output yx yy D-Ay* Reference voltage monitoring 8 9 10 11 12 H: Fixed
19 18 17 16 15 14 13 Module 2 D-A data
Rev.1.0, Sep.19.2003, page 8 of 9
M62383FP
24P2Q-A
JEDEC Code e b2
13
MMP
Weight(g) 0.2 Lead Material Cu Alloy
Plastic 24pin 300mil SSOP
EIAJ Package Code SSOP24-P-300-0.80
24
Package Dimensions
HE
E
L1
L
Rev.1.0, Sep.19.2003, page 9 of 9
F Recommended Mount Pad Symbol
1 12
A D
G
A2
b
A1
e y
c z Detail G Detail F
Z1
e1
A A1 A2 b c D E e HE L L1 z Z1 y b2 e1 I2
Dimension in Millimeters Min Nom Max 2.1 0.2 0.1 0 1.8 0.45 0.35 0.3 0.25 0.2 0.18 10.2 10.1 10.0 5.4 5.3 5.2 0.8 8.1 7.8 7.5 0.8 0.6 0.4 1.25 0.65 0.8 0.1 0 8 0.5 7.62 1.27
I2
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Colophon 1.0


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