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MC3458, MC3358 Dual, Low Power Operational Amplifiers Utilizing the circuit designs perfected for the quad operational amplifiers, these dual operational amplifiers feature: low power drain, a common mode input voltage range extending to ground/VEE, and Single Supply or Split Supply operation. These amplifiers have several distinct advantages over standard operational amplifier types in single supply applications. They can operate at supply voltages as low as 3.0 V or as high as 36 V with quiescent currents about one-fifth of those associated with the MC1741C (on a per amplifier basis). The common mode input range includes the negative supply, thereby eliminating the necessity for external biasing components in many applications. The output voltage range also includes the negative power supply voltage. * Short Circuit Protected Outputs * True Differential Input Stage * Single Supply Operation: 3.0 V to 36 V * Low Input Bias Currents * Internally Compensated * Common Mode Range Extends to Negative Supply * Class AB Output Stage for Minimum Crossover Distortion * Single and Split Supply Operations Available * Similar Performance to the Popular MC1458 http://onsemi.com MARKING DIAGRAMS 8 PDIP-8 P1 SUFFIX CASE 626 1 1 8 SO-8 D SUFFIX CASE 751 1 x A WL, L YY, Y WW, W = 3 or 4 = Assembly Location = Wafer Lot = Year = Work Week 3x58 ALYW MC3x58P1 AWL YYWW 8 8 1 PIN CONNECTIONS Output A Inputs A VEE/Gnd 1 2 3 4 8 7 6 5 VCC Output B Inputs B - + - + (Top View) ORDERING INFORMATION Device MC3358D MC3358DR2 MC3358P1 MC3458D MC3458DR2 MC3458P1 Package SO-8 SO-8 PDIP-8 SO-8 SO-8 PDIP-8 Shipping 98 Units/Rail 2500 Tape & Reel 50 Units/Rail 98 Units/Rail 2500 Tape & Reel 50 Units/Rail (c) Semiconductor Components Industries, LLC, 2001 1 March, 2001 - Rev. 1 Publication Order Number: MC3458/D MC3458, MC3358 Bias Circuitry Common to Both Amplifiers Q27 Q17 Q16 Output Q19 Q20 Q18 VCC Q23 5.0 pF Q1 + Q22 Inputs Q21 Q25 Q5 Q3 Q4 60 k Q24 2.0 k Q9 37k Q6 Q7 Q8 Q10 31 k 40 k Q28 Q15 Q13 Q11 25 Q29 Q2 Q12 Q30 2.4 k VEE (Gnd) Figure 1. Representative Schematic Diagram (1/2 of Circuit Shown) MAXIMUM RATINGS Rating Power Supply Voltages Single Supply Split Supplies Input Differential Voltage Range (Note 1.) Input Common Mode Voltage Range (Note 2.) Junction Temperature Storage Temperature Range Operating Ambient Temperature Range MC3458 MC3358 Symbol VCC VCC, VEE VIDR VICR TJ Tstg TA 0 to +70 -40 to +85 Value 36 18 30 15 150 -55 to +125 Vdc Vdc C C C Unit Vdc 1. Split Power Supplies. 2. For supply voltages less than 18 V, the absolute maximum input voltage is equal to the supply voltage. http://onsemi.com 2 MC3458, MC3358 ELECTRICAL CHARACTERISTICS (For MC3458, VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted.) (For MC3358, VCC = +14 V, VEE = Gnd, TA = 25C, unless otherwise noted.) MC3458 Characteristic Input Offset Voltage TA = Thigh to Tlow (Note 3.) Input Offset Current TA = Thigh to Tlow Large Signal Open Loop Voltage Gain VO = 10 V, RL = 2.0 k, TA = Thigh to Tlow Input Bias Current TA = Thigh to Tlow Output Impedance, f = 20 Hz Input Impedance, f = 20 Hz Output Voltage Range RL = 10 k RL = 2.0 k RL = 2.0 k, TA = Thigh to Tlow Input Common Mode Voltage Range Common Mode Rejection Ratio, RS 10 k Power Supply Current (VO = 0) RL = Individual Output Short Circuit Current (Note 4.) Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Average Temperature Coefficient of Input Offset Current, TA = Thigh to Tlow Average Temperature Coefficient of Input Offset Current, TA = Thigh to Tlow Power Bandwidth AV = 1, RL = 2.0 k, VO = 20 Vpp, THD = 5% Small Signal Bandwidth AV = 1, RL = 10 k, VO = 50 mV Slew Rate AV = 1, VI = -10 V to +10 V Rise Time AV = 1, RL = 10 k, VO = 50 mV Fall Time AV = 1, RL = 10 k, VO = 50 mV Overshoot AV = 1, RL = 10 k, VO = 50 mV Phase Margin AV = 1, RL = 2.0 k, CL = 200 pF Crossover Distortion (Vin = 30 mVpp, Vout = 2.0 Vpp, f = 10 kHz) 3. MC3358: Tlow = -40C, Thigh = +85C MC3458: Tlow = 0C, Thigh = +70C 4. Not to exceed maximum package power dissipation. Symbol VIO IIO AVOL 20 15 IIB zO zI VOR - - - 0.3 12 10 10 +13 -VEE 70 - 10 - - - - - - - - - - - - 200 - -200 - 75 1.0 13.5 13 - +13.5 -VEE 90 1.6 20 30 30 50 10 9.0 1.0 0.6 0.35 0.35 20 60 1.0 - - -500 -800 - - - - - - - 3.7 45 150 150 - - - - - - - - - - 20 15 - - - 0.3 12 10 10 +13 -VEE 70 - 10 - - - - - - - - - - - - 200 - -200 - 75 1.0 12.5 12 - +13.5 -VEE 90 1.6 30 30 - 50 10 9.0 1.0 0.6 0.35 0.35 20 60 1.0 - - -500 -1000 - - - - - - - 3.7 45 150 - - - - - - - - - - - V dB mA mA V/V V/V pA/C V/C kHz MHz V/s s s % Degrees % nA M V Min - - - - Typ 2.0 - 30 - Max 10 12 50 200 Min - - - - MC3358 Typ 2.0 - 30 - Max 8.0 10 75 250 Unit mV nA V/mV VICR CMR ICC, IEE ISC PSRR+ PSRR- IIO/T VIO/T BWp BW SR tTLH tTHL os m - http://onsemi.com 3 MC3458, MC3358 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25C, unless otherwise noted.) MC3458 Characteristic Input Offset Voltage Input Offset Current Input Bias Current Large Signal Open Loop Voltage Gain RL = 2.0 k, Power Supply Rejection Ratio Output Voltage Range (Note 5.) RL = 10 k, VCC = 5.0 V RL = 10 k, 5.0 V VCC 30 V Power Supply Current Channel Separation f = 1.0 kHz to 20 kHz (Input Referenced) Symbol VIO IIO IIB AVOL PSRR VOR 3.3 - ICC CS - - 3.5 VCC -1.7 2.5 -120 - - 7.0 - 3.3 - - - 3.5 VCC -1.7 2.5 -120 - - 4.0 - mA dB Min - - - 20 - Typ 2.0 30 -200 200 - Max 5.0 50 -500 - 150 Min - - - 20 - MC3358 Typ 2.0 - - 200 - Max 10 75 -500 - 150 Unit mV nA nA V/mV V/V Vpp 5. Output will swing to ground with a 10 k pull down resistor. 20 s/DIV Figure 2. Inverter Pulse Response CIRCUIT DESCRIPTION The MC3458/3358 is made using two internally compensated, two-stage operational amplifiers. The first stage of each consists of differential input devices Q24 and Q22 with input buffer transistors Q25 and Q21 and the differential to single ended converter Q3 and Q4. The first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q24 and Q22. Another feature of this input stage is that the input Common Mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single-ended converter. The second stage consists of a standard current source load amplifier stage. The output stage is unique because it allows the output to swing to ground in single supply operation and yet does not exhibit any crossover distortion in split supply operation. This is possible because Class AB operation is utilized. Each amplifier is biased from an internal voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as well as excellent power supply rejection. 5 V/DIV http://onsemi.com 4 MC3458, MC3358 120 A VOL , LARGE SIGNAL OPEN LOOP VOLTAGE GAIN (dB) 100 80 60 40 20 0 -20 1.0 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M AV = 100 0.5 V/DIV VCC = +15 V VEE = -15 V TA = 25C 50 mV/DIV *Note Class A B output stage produces distortion less sinewave. 50 s/DIV Figure 3. Sine Wave Response Figure 4. Open Loop Frequency Response 30 VO, OUTPUT VOLTAGE (Vpp ) 25 20 15 10 5.0 0 TA = 25C + +15 V VO -15 V 10 k VO, OUTPUT VOLTAGE RANGE (V pp) 30 TA = 25C 20 10 -5.0 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 0 0 2.0 4.0 6.0 8.0 10 12 14 16 18 VCC AND (VEE), POWER SUPPLY VOLTAGES (V) 20 Figure 5. Power Bandwidth Figure 6. Output Swing versus Supply Voltage I IB , INPUT BIAS CURRENT (nA) 300 I IB, INPUT BIAS CURRENT (nA) VCC = +15 V VEE = -15 V TA = 25C 170 200 160 100 -75 -55 -35 -15 5.0 25 45 65 85 105 125 150 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 T, TEMPERATURE (C) VCC AND (VEE), POWER SUPPLY VOLTAGES (V) Figure 7. Input Bias Current versus Temperature Figure 8. Input Bias Current versus Supply Voltage http://onsemi.com 5 MC3458, MC3358 VCC VCC 10 k R2 5.0 k 1/2 50 k MC3458 + 10 k R1 VO Vret 10 k VCC MC3458 + 1/2 VO fo = VO = VO = R1 R1 +R2 1 V 2 CC Vref = 1 VCC 2 R C R C 1 2RC fo R C For: = 1.0 kHz = 16 k = 0.01 F Figure 9. Voltage Reference Figure 10. Wien Bridge Oscillator e1 + MC3458 a R1 b R1 - 1/2 MC3458 + 1 R C R - 1/2 1 R C R Vret 1/2 R2 R1 Hysteresis VOH VO VOL R1 (VOL - Vref) +Vref R1 +R2 R1 (VOH - Vref) +Vref R1 +R2 R1 (VOH - VOL) R1 +R2 + R1 MC3458 + eo Vin MC3458 VinL = VinH = Vh = 1/2 VO VinL Vref VinH e2 eo = C (1 +a +b) (e2 -e1) Figure 11. High Impedance Differential Amplifier Figure 12. Comparator with Hysteresis R C1 Vin R2 C MC3458 + Vref Vref R2 R1 Bandpass Output 1/2 R 100 k C 1/2 fo = 1 2RC Vref = 1 V 2 CC R1 = QR 100 k R2 = R1 TBP R3 = TN R2 C1 = 10 C For: fo = 1.0 kHz Q = 10 TBP = 1 TN = 1 Notch Output MC3458 + MC3458 + R3 Vref 1/2 R = 160 k C = 0.001 F R1 = 1.6 M R2 = 1.6 M R3 = 1.6 M Where: TBP = center frequency gain TN = passband notch gain MC3458 + Vref 1/2 C1 Figure 13. Bi-Quad Filter http://onsemi.com 6 MC3458, MC3358 Vref = 1 VCC 2 Vref + Triangle Wave Output MC3458 C Rf f= R1 +RC 4 CRf R1 if, 1/2 R2 300 k R3 75 k R1 100 k Vref + 1/2 MC3458 - Square Wave Output R3 = R2 R1 R2 +R1 Figure 14. Function Generator Vin R1 C C R3 - VCC R2 Vref Given: MC3458 + 1/2 CO Vref = 1 VCC 2 VO CO = 10 C fo = center frequency A(fo) = gain at center frequency Choose value fo, C. Then: R3 = Q fo C R1 = R3 2 A(fo) R2 = R1 R5 4Q2 R1 - R3 Qo fo < 0.1 BW For less than 10% error from operational amplifier where, fo and BW are expressed in Hz. If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 15. Multiple Feedback Bandpass Filter http://onsemi.com 7 MC3458, MC3358 PACKAGE DIMENSIONS PDIP-8 P1 SUFFIX CASE 626-05 ISSUE L NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10_ 0.030 0.040 8 5 -B- 1 4 F NOTE 2 -A- L C -T- SEATING PLANE J N D K M M TA M H G 0.13 (0.005) B M SO-8 D SUFFIX CASE 751-07 ISSUE W -X- A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M -Y- G C -Z- H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S http://onsemi.com 8 MC3458, MC3358 Notes http://onsemi.com 9 MC3458, MC3358 Notes http://onsemi.com 10 MC3458, MC3358 Notes http://onsemi.com 11 MC3458, MC3358 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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