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| CDB4361 Evaluation Board for CS4361 Features Demonstrates recommended layout and grounding arrangements Description The CDB4361 evaluation board is an excellent means for quickly evaluating the CS4361 24-bit, 20-pin, 6channel D/A converter. Evaluation requires an analog signal analyzer, a digital signal source, and a power supply. Analog line-level outputs are provided via RCA phono jacks. The CS8416 digital audio receiver IC provides the system timing necessary to operate the digital-to-analog converter and will accept S/PDIF, and EIAJ-340-compatible audio data. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development. ORDERING INFORMATION CDB4361 Evaluation Board CS8416 receives S/PDIF, & EIAJ-340compatible digital audio Header for External PCM Audio Requires only a digital signal source and power supplies for a complete digital-to-analog converter system Inputs for Clocks and Data CS8416 Digital Audio Interface CS4361 Analog Outputs http://www.cirrus.com Copyright (c) Cirrus Logic, Inc. 2006 (All Rights Reserved) OCTOBER '06 DS672DB2 CDB4361 TABLE OF CONTENTS 1. CS4361 DIGITAL-TO-ANALOG CONVERTER ..................................................................................... 4 2. CS8416 DIGITAL AUDIO RECEIVER .................................................................................................... 4 3. INPUT FOR CLOCKS AND DATA ......................................................................................................... 4 4. POWER SUPPLY CIRCUITRY ............................................................................................................... 4 5. GROUNDING AND POWER SUPPLY DECOUPLING .......................................................................... 4 6. ANALOG OUTPUT FILTERING ............................................................................................................. 5 7. OPTIONAL MUTE CIRCUITRY .............................................................................................................. 5 8. PERFORMANCE PLOTS ....................................................................................................................... 7 9. ERRATA ............................................................................................................................................... 15 10. REVISION HISTORY .......................................................................................................................... 26 LIST OF FIGURES Figure 1.FFT (48 kHz, 0 dB) ....................................................................................................................... 7 Figure 2.FFT (48 kHz, -60 dB) .................................................................................................................... 7 Figure 3.FFT (48 kHz, No Input) ................................................................................................................. 7 Figure 4.FFT (48 kHz Out-of-Band, No Input) ............................................................................................. 7 Figure 5.FFT (48 kHz, -60 dB Wideband) ................................................................................................... 8 Figure 6.FFT (IMD 48 kHz) ......................................................................................................................... 8 Figure 7.48 kHz THD+N vs. Input Freq ....................................................................................................... 8 Figure 8.48 kHz THD+N vs. Level .............................................................................................................. 8 Figure 9.48 kHz, Fade-to-Noise Linearity ................................................................................................... 8 Figure 10.48 kHz, Frequency Response ..................................................................................................... 8 Figure 11.48 kHz, Crosstalk ........................................................................................................................ 9 Figure 12.48 kHz, Impulse Response ......................................................................................................... 9 Figure 13.Dynamic Range 48 kHz .............................................................................................................. 9 Figure 14.FFT (96 kHz, 0 dB) ................................................................................................................... 10 Figure 15.FFT (96 kHz, -60 dB) ................................................................................................................ 10 Figure 16.FFT (96 kHz, No Input) ............................................................................................................. 10 Figure 17.FFT (96 kHz Out-of-Band, No Input) ......................................................................................... 10 Figure 18.FFT (96 kHz, -60 dB Wideband) ............................................................................................... 10 Figure 19.FFT (IMD 96 kHz) ..................................................................................................................... 10 Figure 20.96 kHz, THD+N vs. Input Freq .................................................................................................. 11 Figure 21.96 kHz, THD+N vs. Level ......................................................................................................... 11 Figure 22.96 kHz, Fade-to-Noise Linearity ............................................................................................... 11 Figure 23.96 kHz, Frequency Response ................................................................................................... 11 Figure 24.96 kHz, Crosstalk ...................................................................................................................... 11 Figure 25.96 kHz, Impulse Response ....................................................................................................... 11 Figure 26.Dynamic Range 96 kHz ............................................................................................................ 12 Figure 27.FFT (192 kHz, 0 dB) ................................................................................................................. 12 Figure 28.FFT (192 kHz, -60 dB) .............................................................................................................. 12 Figure 29.FFT (192 kHz, No Input) ........................................................................................................... 13 Figure 30.FFT (192 kHz Out-of-Band, No Input) ....................................................................................... 13 Figure 31.FFT (192 kHz, -60 dB Wideband) ............................................................................................. 13 Figure 32.FFT (IMD 192 kHz) ................................................................................................................... 13 Figure 33.192 kHz, THD+N vs. Input Freq ................................................................................................ 13 Figure 34.192 kHz, THD+N vs. Level ....................................................................................................... 13 Figure 35.192 kHz, Fade-to-Noise Linearity ............................................................................................. 14 Figure 36.192 kHz, Frequency Response ................................................................................................. 14 Figure 37.192 kHz, Crosstalk .................................................................................................................... 14 Figure 38.192 kHz, Impulse Response ..................................................................................................... 14 Figure 39.Dynamic Range 192 kHz .......................................................................................................... 15 2 DS672DB2 CDB4361 Figure 40.System Block Diagram and Signal Flow ................................................................................... 16 Figure 41.CS4361 ..................................................................................................................................... 17 Figure 42.CS8416 S/PDIF Input and Clock Control .................................................................................. 18 Figure 43.PCM Input Header and MUX .................................................................................................... 19 Figure 44.Passive Outputs ........................................................................................................................ 20 Figure 45.Mute Circuitry ............................................................................................................................ 21 Figure 46.Power Supply Connections ....................................................................................................... 22 Figure 47.Silkscreen Top .......................................................................................................................... 23 Figure 48.Top Side .................................................................................................................................... 24 Figure 49.Bottom Side .............................................................................................................................. 25 DS672DB2 3 CDB4361 CDB4361 SYSTEM OVERVIEW The CDB4361 evaluation board is an excellent means of quickly evaluating the CS4361. The CS8416 digital audio interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test equipment. The evaluation board also allows the user to supply external PCM clocks and data through a PCB header for system development. The CDB4361 schematic has been partitioned into six schematics shown in Figures 41 through 46. Each partitioned schematic is represented in the system diagram shown in Figure 40. Notice that the system diagram also includes the interconnections between the partitioned schematics. 1. CS4361 DIGITAL-to-ANALOG CONVERTER A description of the CS4361 is included in the CS4361 datasheet. 2. CS8416 DIGITAL AUDIO RECEIVER The system receives and decodes the standard S/PDIF data format using a CS8416 Digital Audio Receiver, Figure 42. The outputs of the CS8416 include a serial bit clock, serial data, left-right clock, and a 128/256 Fs master clock. The CS8416 data format is selected using switch S3. The operation of the CS8416 and a discussion of the digital audio interface is included in the CS8416 datasheet. The evaluation board has been designed such that the input can be either optical or coaxial, see Figure 42. However, both inputs cannot be driven simultaneously. The bottom switch of S3 sets the output MCLK to LRCK ratio of the CS8416. This switch should be set to 256 (closed) for inputs Fs96 kHz and 128 (open) for Fs64 kHz. The 8416 must be manually reset using RESET (S1) when this switch is changed. 3. INPUT FOR CLOCKS AND DATA The evaluation board has been designed to allow interfacing to external systems via the header J37. Header J37 allows the evaluation board to accept externally generated PCM clocks and data. The schematic for the clock/data input is shown in Figure 43. The top switch of S3 selects the source as either CS8416 (open) or header J37 (closed). Please see the CS4361 datasheet for more information. 4. POWER SUPPLY CIRCUITRY Power is supplied to the evaluation board by two binding posts (GND and +5 V), see Figure 46. VL and VA can be jumpered separately to either the on board +3.3 V regulator or the +5 V binding post. WARNING: Refer to the CS4361 datasheet for maximum allowable voltages levels. Operation outside of this range can cause permanent damage to the device. 5. GROUNDING AND POWER SUPPLY DECOUPLING As with any high-performance converter, the CS4361 requires careful attention to power supply and grounding arrangements to optimize performance. Figure 41 details the connections to the CS4361 and Figures 47, 48, and 49 show the component placement and top and bottom layout. The decoupling capacitors are located as close to the CS4361 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise. 4 DS672DB2 CDB4361 6. ANALOG OUTPUT FILTERING The analog output on the CDB4361 has been designed according to the CS4361 datasheet. This output circuit includes an AC coupling cap and a single pole R and C. An additional load resistance may be added by shunting J23, J24, J38, J39, J42, and J43 to test the CS4361's load-driving capability. See Figure 44 on page 20 for more details. 7. OPTIONAL MUTE CIRCUITRY The CDB4361 contains the optional, recommended mute circuitry for the CS4361. This circuitry is designed to minimize the potential for clicks and pops. In order for this circuitry to operate properly, a negative supply is required. This supply is provided by U18. See Figure 45 on page 21 for more details. CONNECTOR +5 V GND S/PDIF INPUT - J1 S/PDIF INPUT - OPT1 PCM INPUT - J37 AOUT1 - 6 INPUT/OUTPUT Input Input Input Input Input Output + 5 V power SIGNAL PRESENT Ground connection from power supply Digital audio interface input via coax Digital audio interface input via optical Input for master, serial, left/right clocks and serial data RCA line level analog outputs Table 1. System Connections JUMPER / SWITCH J46 J17 J45 J20 PURPOSE Selects source of voltage for the CS4361 VA supply Provides contact points to measure VA current Selects source of voltage for the CS4361 VL supply Provides contact points to measure VL current CS4361 Mode Select POSITION +3.3 V *+5 V +3.3 V *+5 V *I2S LJ RJ16 RJ24 *shunted open *shunted open shunted *open FUNCTION SELECTED Voltage source is a +3.3 V regulator Voltage source is +5 V binding post Measure voltage across these nodes and divide result by 10 to get current in amps Voltage source is a +3.3 V regulator Voltage source is +5 V binding post Measure voltage across these nodes and divide result by 10 to get current in Amps Sets the mode of the CS4361 by placing a shunt across the desired setting Connects the CS4361 MUTEC pin to the mute circuitry Disconnect for VA power-down current measurements When shunted, the mute circuit is active When open, the mute circuit is inactive When shunted, a 3 k AC load is added to the output Leave open for normal operation The CS8416 must be reset if switch S2 is changed J52 J63 J53, J54 J55, J56 J57, J58 J24, J23 J39, J38 J43, J42 S1 S2 Global Mute Enable Mute Enable AC Load Resets CS4361 and CS8416 SDIN Control *All closed All open Connects SDIN1 to SDIN2 and SDIN3 SDIN1, 2, and 3 are discrete DS672DB2 5 CDB4361 JUMPER / SWITCH PURPOSE Sets clock source CS8416 Mode 0 S3 CS8416 Mode 1 Sets MCLK ratio of CS8416 POSITION 1 (top) EXT/8416 2 RX_SF0 3 RX_SF1 4 (bottom) FUNCTION SELECTED Sets clock source for CS4361 (*open = CS8416, closed = J37) Sets CS8416 serial data format (SF1, SF0) 00 = LJ24 *01 = I2S 10 = RJ24 Selects 128x (open) or 256x (*closed) MCLK/LRCK ratio output for CS8416 *Default Factory Settings Table 2. CDB4361 Jumper Settings 6 DS672DB2 CDB4361 8. PERFORMANCE PLOTS The plots in the following section were acheived using an Audio Precision System 2700 and a randomly chosen production CDB4361. In some cases the performance may be limited by the CDB4361. All measurements were taken at room temp using the standard AP filter options (20 Hz to 22 kHz) with default board settings and nominal datasheet voltages applied unless otherwise noted. +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k d B r A +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 1. FFT (48 kHz, 0 dB) Figure 2. FFT (48 kHz, -60 dB) +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20k 40k 60k Hz 80k 100k 120k Figure 3. FFT (48 kHz, No Input) Figure 4. FFT (48 kHz Out-of-Band, No Input) DS672DB2 7 CDB4361 +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k Figure 5. FFT (48 kHz, -60 dB Wideband) Figure 6. FFT (IMD 48 kHz) +0 -10 -20 -30 -40 d B r A -50 -60 A d B r +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -70 -80 -90 -100 -110 20 50 100 200 500 Hz 1k 2k 5k 10k 20k -100 -80 -60 dBFS -40 -20 +0 Figure 7. 48 kHz THD+N vs. Input Freq +40 +35 +30 +25 +20 +15 +10 d B r A +5 +0 -5 -10 -15 -20 -25 -30 -35 -40 -120 -100 -80 -60 dBFS -40 -20 +0 -4 -3 d B r A +1 +0 -1 -2 +2 +4 +3 Figure 8. 48 kHz THD+N vs. Level +5 -5 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 9. 48 kHz, Fade-to-Noise Linearity Figure 10. 48 kHz, Frequency Response 8 DS672DB2 CDB4361 +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k V T TT T T 2 1.75 1.5 1.25 1 750m 500m 250m 0 -250m -500m -750m -1 -1.25 -1.5 -1.75 -2 0 500u 1m 1.5m sec 2m 2.5m 3m Figure 11. 48 kHz, Crosstalk Figure 12. 48 kHz, Impulse Response Figure 13. Dynamic Range 48 kHz DS672DB2 9 CDB4361 +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k d B r A +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 14. FFT (96 kHz, 0 dB) Figure 15. FFT (96 kHz, -60 dB) +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 20k 40k 60k Hz 80k 100k 120k Figure 16. FFT (96 kHz, No Input) Figure 17. FFT (96 kHz Out-of-Band, No Input) +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k Hz 2k 5k 10k 20k 40k +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k Figure 18. FFT (96 kHz, -60 dB Wideband) Figure 19. FFTHz(IMD 96 kHz) 10 DS672DB2 CDB4361 +0 -10 -20 -30 -40 d B r A -50 -60 +0 -10 -20 -30 -40 d B r A -50 -60 -70 -80 -90 -100 50 100 200 500 Hz 1k 2k 5k 10k 20k -70 -80 -90 -100 -110 20 -110 -120 -100 -80 -60 dBFS -40 -20 +0 Figure 20. 96 kHz, THD+N vs. Input Freq Figure 21. 96 kHz, THD+N vs. Level +40 +35 +30 +25 +20 +15 +10 d B r A +5 +0 -5 -10 -15 -20 -25 -30 -35 -40 -120 -100 -80 -60 dBFS -40 -20 +0 +5 +4 +3 +2 +1 +0 -1 -2 -3 -4 -5 20 d B r A 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 22. 96 kHz, Fade-to-Noise Linearity Figure 23. 96 kHz, Frequency Response +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 TT TT T T 2 1.75 1.5 1.25 1 750m 500m 250m V 0 -250m -500m -750m -1 -1.25 -1.5 -1.75 -2 0 250u 500u 750u sec 1m 1.25m 1.5m -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 24. 96 kHz, Crosstalk Figure 25. 96 kHz, Impulse Response DS672DB2 11 CDB4361 Figure 26. Dynamic Range 96 kHz +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k d B r A +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 27. FFT (192 kHz, 0 dB) Figure 28. FFT (192 kHz, -60 dB) 12 DS672DB2 CDB4361 +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20k 40k 60k Hz 80k 100k 120k Figure 29. FFT (192 kHz, No Input) Figure 30. FFT (192 kHz Out-of-Band, No Input) +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 90k +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k Figure 31. FFT (192 kHz, -60 dB Wideband) Figure 32. FFT (IMD 192 kHz) +0 -10 -20 -30 -40 d B r A -50 -60 -70 -80 -90 -100 -110 20 d B r A +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 50 100 200 500 Hz 1k 2k 5k 10k 20k -100 -80 -60 dBFS -40 -20 +0 Figure 33. 192 kHz, THD+N vs. Input Freq Figure 34. 192 kHz, THD+N vs. Level DS672DB2 13 CDB4361 +40 +35 +30 +25 +20 +15 +10 d B r A +5 +0 -5 -10 -15 -20 -25 -30 -35 -40 -120 -100 -80 -60 dBFS -40 -20 +0 -5 20 50 100 200 500 Hz 1k 2k 5k 10k 20k -3 -4 d B r A +2 +1 +0 -1 -2 +4 +3 +5 Figure 35. 192 kHz, Fade-to-Noise Linearity Figure 36. 192 kHz, Frequency Response +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 20 T 2 1.75 1.5 1.25 1 750m 500m 250m V 0 -250m -500m -750m -1 -1.25 -1.5 -1.75 -2 50 100 200 500 Hz 1k 2k 5k 10k 20k 0 200u 400u sec 600u Figure 37. 192 kHz, Crosstalk Figure 38. 192 kHz, Impulse Response 14 DS672DB2 CDB4361 Figure 39. Dynamic Range 192 kHz 9. ERRATA None at this time. DS672DB2 15 Figure 42 on page 18 CS8416 clock setting PCM source select 16 Power Figure 46 on page 22 PCM HEADER Figure 43 on page 19 PCM CLOCKS/DATA Single-Ended Analog Outputs AOUT1-6 PCM mux PCM CLOCKS/DATA PCM CLOCKS/DATA CS4361 Figure 41 on page 17 Figure 44 on page 20 CS8416 S/PDIF Input Mute Circuitry Figure 45 on page 21 Hardware Control Switches Figure 42 on page 18 CDB4361 DS672DB2 Figure 40. System Block Diagram and Signal Flow DS672DB2 CDB4361 Figure 41. CS4361 17 18 CDB4361 DS672DB2 Figure 42. CS8416 S/PDIF Input and Clock Control DS672DB2 CDB4361 Figure 43. PCM Input Header and MUX 19 20 CDB4361 DS672DB2 Figure 44. Passive Outputs DS672DB2 CDB4361 Figure 45. Mute Circuitry 21 22 CDB4361 DS672DB2 Figure 46. Power Supply Connections DS672DB2 CDB4361 Figure 47. Silkscreen Top 23 24 CDB4361 DS672DB2 Figure 48. Top Side DS672DB2 CDB4361 Figure 49. Bottom Side 25 CDB4361 10.REVISION HISTORY Release DB1 DB2 Changes Initial Release Added Performance Plots Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you, go to www.cirrus.com. IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. 26 DS672DB2 |
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