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 PL
IA
Features

Applications

NT
Lead free device (RoHS compliant*) 100 A (2/10 s) per Bellcore GR1089 (Intra-Building) Protects 2 lines ESD protection Low capacitance 8 pF
T1/E1 line cards ISDN U-Interface and S/T Interface xDSL Ethernet - 10/100 Base T
*R
oH
S
CO
M
CDNBS08-PLC03-3.3 Steering Diode/TVS Array Combo
General Information
The markets of portable communications, computing and video equipment are challenging the semiconductor industry to develop increasingly smaller electronic components. Bourns offers Steering Diode/Transient Voltage Suppressor Array combination diodes for surge and ESD protection applications in an 8 Lead Narrow Body SOIC package size format. Bourns Chip Diodes conform to JEDEC standards, are easy to handle on standard pick and place equipment and their flat configuration minimizes roll away. The Bourns(R) device will meet IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5 (Surge) requirements.
1 2 3 4 8 7 6 5
Electrical Characteristics (@ TA = 25 C Unless Otherwise Noted) Parameter Capacitance @ 0 V 1 MHz
1
Symbol Cj(SD) Cj(SD) VWM VBR VF VF ID
Min.
Nom. 20 8
Max. 25 12 3.0
Unit pF pF V V
Capacitance @ 0 V 1 MHz2 Working Peak Voltage Min Breakdown Voltage @ 1 mA Clamping Voltage @ 8/20 s @ IPP = 100 A3, 4 Clamping Voltage @ 8/20 s @ IP = 50 A, Line - Ground Max Leakage Current @ VWM ESD Protection: IEC 61000-4-2 Contact Discharge Air Discharge Peak Pulse Power (tp = 8/20 s)5
3.3 18 11 2
V
A
8 15 PPP 1800
kV kV W
Notes: 1. Measured between I/O pins and ground (pin 1 or 2). 2. Measured between I/O pins (pins 1 to 4). 3. See Pulse Wave Form. For an 8/20 s waveform, apply positive pulse to pin 1 to 8 to pin 2 or 3 (ground). 4. Measured between pin 1 or 8 to pin 2 or 3; pin 1 or 8 to pin 4 or 5. 5. See Peak Pulse Power vs. Pulse Time.
Thermal Characteristics (@ TA = 25 C Unless Otherwise Noted) Parameter Junction Temperature Range Storage Temperature Range Symbol TJ TSTG Min. -55 -55 Nom. +25 +25 Max. +150 +150 Unit C C
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
CDNBS08-PLC03-3.3 Steering Diode/TVS Array Combo
Mechanical Characteristics This is a molded JEDEC Narrow Body SO-8 package with lead free 100 % Sn plating on the lead frame. It weighs approximately 15 mg and has a flammability rating of UL 94V-0. Product Dimensions
A
Recommended Footprint
A B
F H D C
B
C G
E
D
DIMENSIONS = MILLIMETERS (INCHES)
Dimensions
E
A B C D E
1.143 - 1.397 (0.045 - 0.055) 0.635 - 0.889 (0.025 - 0.035) 6.223 Min. (0.245) 3.937 - 4.191 (0.155 - 0.165) 1.016 - 1.27 (0.040 - 0.050)
Dimensions A B C D E F G H
4.80 - 5.00 (0.189 - 0.196) 3.80 - 4.00 (0.150 - 0.157) 5.80 - 6.20 (0.229 - 0.244) 1.35 - 1.75 (0.054 - 0.068) 0.10 - 0.25 (0.004 - 0.008) 0.25 - 0.50 (0.010 - 0.019) 0.40 - 1.250 (0.016 - 0.049) 0.18 - 0.25 (0.007 - 0.009)
How To Order
CD NBS08 - PLC03 - 3.3
Common Code CD = Chip Diode Package NBS08 = Narrow Body SOIC8 Package Model PLC03 = Model Number Minimum Breakdown Voltage 3.3 = 3.3 VBR (Volts)
Typical Part Marking CDNBS08-PLC03-3.3 .......................................................... PBC
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
CDNBS08-PLC03-3.3 Steering Diode/TVS Array Combo
Packaging The surface mount product is packaged in a 12 mm x 8 mm Tape and Reel format per EIA-481 standard.
TOP SIDE VIEW (INTO COMPONENT POCKET)
0.3 0.05 (.01 .002) 2.0 0.05 (.08 .002)
4.0 0.1 (.16 .004) 1.5 0.1/-0 (.06 .004/-0) DIA. 1.75 0.1 (.07 .004)
R
0.3 MAX. (0.01)
12.0 0.3 (.47 .01) 5.5 0.3 (.22 .01) 9.0 0.1 (.354 .004) 8.0 0.3 (.31 .01) R 0.25 TYP. (0.010)
2.1 0.1 (.083 .004)
6.4 0.1 (.252 .004)
ORIENTATION OF COMPONENT IN POCKET BACKSIDE FACING UP
Block Diagram
8 7 6 5
Device Pinout Pin 1 2 3 4 5 6
1 2 3 4
Function I/O 1 GND GND I/O 2 I/O 2 GND GND I/O 1
7 8
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
CDNBS08-PLC03-3.3 Steering Diode/TVS Array Combo
Performance Graphs Peak Pulse Power vs Pulse Time
100 IPP - Peak Pulse Current (% of IPP) PPP - Peak Pulse Current (kW)
Pulse Wave Form
120 100 80 60 40 20 0 td = t|IPP/2 tt Test Waveform Parameters tt = 8 s td = 20 s et
10 1800 W, 8/20 s Waveform 1
0.1 0.01
1
10
100
1,000
10,000
0
5
10
15 t - Time (s)
20
25
30
td - Pulse Duration (s)
Power Derating Curve
100 80 60 40 20 Average Power 0 0 25 50 75 100 125 150 Peak Pulse Power 8/20 s
% of Rated Power
TL - Lead Temperature (C)
Reliable Electronic Solutions
Asia-Pacific: Tel: +886-2 2562-4117 * Fax: +886-2 2562-4116 Europe: Tel: +41-41 768 5555 * Fax: +41-41 768 5510 The Americas: Tel: +1-951 781-5500 * Fax: +1-951 781-5700 www.bourns.com
Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications.
COPYRIGHT(c) 2005, BOURNS, INC. LITHO IN U.S.A., IPA0508 10/05


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