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INTEGRATED CIRCUITS
DATA SHEET
TEA6324T Sound control circuit
Preliminary specification File under Integrated Circuits, IC01 1997 Mar 13
Philips Semiconductors
Preliminary specification
Sound control circuit
FEATURES * Source selector for two stereo and one mono inputs * Interface for noise reduction circuits * Interface for external equalizer * Volume and balance control * Bass control with equalizer filters * Treble control * Mute control at audio signal zero crossing * Fast mute control via I2C-bus * Fast mute control via pin * I2C-bus control for all functions * Power supply with internal power-on reset. QUICK REFERENCE DATA SYMBOL VCC ICC Vo(rms) Gv Gstep(vol) Gbass Gtreble Gstep(treble) (S+N)/N RR100 cs PARAMETER supply voltage supply current maximum output voltage level voltage gain step resolution (volume) bass control treble control step resolution (treble) signal-plus-noise to noise ratio ripple rejection channel separation Vo = 2.0 V; Gv = 0 dB; unweighted Vr(rms) < 200 mV; f = 100 Hz; Gv = 0 dB 250 Hz f 10 kHz; Gv = 0 dB VCC = 8.5 V VCC = 8.5 V; THD 0.1% CONDITIONS MIN. 7.5 - - -86 - -18 -12 - - - 90 GENERAL DESCRIPTION
TEA6324T
The sound control circuit TEA6324T is an I2C-bus controlled stereo preamplifier for car radio hi-fi sound applications.
TYP. 8.5 26 2000 - 1 - - 1.5 105 75 96
MAX. 9.5 - - +20 - +18 +12 - - - -
UNIT V mA mV dB dB dB dB dB dB dB dB
ORDERING INFORMATION TYPE NUMBER TEA6324T PACKAGE NAME SO24 DESCRIPTION plastic small outline package; 24 leads; body width 7.5 mm VERSION SOT137-1
1997 Mar 13
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1997 Mar 13
handbook, full pagewidth
BLOCK DIAGRAM
3.4 k 5.6 nF
Cm 10 nF
Philips Semiconductors
CKVL 220 nF 270 nF 270 nF MUTE 8 7 6 5 4 9
Sound control circuit
100 F
Vref 16 MUTE FUNCTION ZERO CROSS DETECTOR
VCC
23
TEA6324T
GND
2
POWER SUPPLY
47 F
15 VOLUME I LEFT +20 to -31 dB 3 VOLUME II 0 to -55 dB BALANCE OUTPUT LEFT BASS LEFT 18 dB TREBLE LEFT 12 dB
5 x 220 nF
12
input left source LOGIC
11 24 SCL I2C-BUS RECEIVER 1 SDA
3
VOLUME I RIGHT +20 to -31 dB 17 18 19 20 21 BASS RIGHT 18 dB TREBLE RIGHT 12 dB CKVL 220 nF 3.4 k 270 nF 270 nF 5.6 nF
input mono source
10
SOURCE SELECTOR
14
input right source
13 VOLUME II 0 to -55 dB BALANCE OUTPUT RIGHT 22
CKIN
MGK105
Preliminary specification
TEA6324T
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
Sound control circuit
PINNING SYMBOL SDA GND OUTL TL B2L B1L IVL QSL MUTE IMO IBL IAL IAR IBR CAP Vref QSR IVR B1R B2R TR OUTR VCC SCL PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 ground output left treble control capacitor left channel or input from an external equalizer bass control left channel or output to an external equalizer bass control, left channel input volume I, left control part output source selector, left channel mute control input mono source input B left source input A left source input A right source input B right source electronic filtering for supply reference voltage (0.5VCC) output source selector right channel input volume I, right control part bass control right channel bass control right channel or output to an external equalizer treble control capacitor right channel or input from an external equalizer output right supply voltage serial clock input (I2C-bus) DESCRIPTION serial data input/output (I2C-bus)
handbook, halfpage
TEA6324T
SDA 1 GND 2 OUTL 3 TL 4 B2L 5 B1L 6
24 SCL 23 VCC 22 OUTR 21 TR 20 B2R 19 B1R
TEA6324T
IVL 7 QSL 8 MUTE 9 IMO 10 IBL 11 IAL 12
MGK104
18 IVR 17 QSR 16 Vref 15 CAP 14 IBR 13 IAR
Fig.2 Pin configuration.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
FUNCTIONAL DESCRIPTION The source selector selects one of 2 stereo inputs or the mono input. The maximum input signal voltage is Vi(rms) = 2 V. The outputs of the source selector and the inputs of the following volume control parts are available at pins 7 and 8 for the left channel and pins 17 and 18 for the right channel. This offers the possibility of interfacing a noise reduction system. The volume control function is split into two sections: volume I control block and volume II control block. The control range of volume I is between +20 dB and -31 dB in steps of 1 dB. The volume II control range is between 0 dB and -55 dB in steps of 1 dB. The recommended control range to be used is 86 dB (+20 to -66 dB) although in theory, a range of 106 dB (+20 to -86 dB) can be attained. The gain/attenuation setting of the volume I control block is common for both channels. The volume I control block is followed by the bass control block. The frequency response of the bass control (see Fig.3) is provided for each channel by an external filter in combination with internal resistors. The adjustable range is between -18 and +18 dB in steps of 1.8 dB at 46 Hz. The treble control block offers a control range between -12 and +12 dB in steps of 1.5 dB at 15 kHz. The filter characteristic is determined by a single capacitor of 5.6 nF for each channel in combination with internal resistors (see Fig.4). The basic step width of treble control is 3 dB. The intermediate steps are obtained by switching 1.5 dB boost and 1.5 dB attenuation steps. The bass and treble control functions can be switched off via I2C-bus. In this event the internal signal flow is disconnected. The connections B2L and B2R are outputs and TL and TR are inputs for inserting an external equalizer. The last section of the circuit is the volume II block. The balance function uses the same control block. This is achieved by 2 independently controllable attenuators, one for each output. The control range of these attenuators is 55 dB in steps of 1 dB with an additional mute step. The circuit provides 3 mute modes: 1. Zero crossing mode mute via I2C-bus using 2 independent zero crossing detectors (ZCM, see Tables 2 and 8 and Fig.15) 2. Fast mute via MUTE pin (see Fig.9)
TEA6324T
3. Fast mute via I2C-bus either by general mute (GMU, see Tables 2 and 8) or volume II block setting (see Table 4). The mute function is performed immediately if ZCM is cleared (ZCM = 0). If the bit is set (ZCM = 1) the mute is activated after changing the GMU bit. The actual mute switching is delayed until the next zero crossing of the audio frequency signal. Two comparators are built-in to provide independent mute switches to control each of the audio channels (left and right). To avoid a large delay of mute switching when very low frequencies are processed, the maximum delay time is limited to typically 100 ms by an integrated timing circuit and an external capacitor (Cm = 10 nF, see Fig.9). This timing circuit is triggered by reception of a new data word for the switch function which includes the GMU bit. After a discharge and charge period of an external capacitor the muting switch follows the GMU bit, only if no zero crossing was detected during that time. The mute function can also be controlled externally (see Fig.9). If the mute pin is switched to ground all outputs are muted immediately (hardware mute). This mute request overwrites all mute controls via the I2C-bus for the time the pin is held LOW. The hardware mute position is not stored in the TEA6324T. Typically, the turn on/off can be used to avoid AF output. This can be caused by the input signal from preceding stages, which may produce output during a drop of VCC. To avoid this, the mute must be set prior to a VCC drop and can be achieved either by I2C-bus control, or by grounding the MUTE pin. In cases where there is no mute in the application before turn off, a supply voltage drop of more than 1 x VBE will result in a mute during the voltage drop. The power supply should include a VCC buffer capacitor, which provides a discharging time constant. If the input signal does not disappear after turn off the input will become audible after a certain time. A 4.7 k resistor discharges the VCC buffer capacitor, because the internal current of the IC does not discharge it completely. The hardware mute function is ideal for use in Radio Data System (RDS) applications. The zero crossing mute avoids modulation plops. This feature is an advantage for mute during changing presets and/or sources (e.g. traffic announcement during cassette playback).
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Philips Semiconductors
Preliminary specification
Sound control circuit
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC Vn Tamb Tstg Ves Note PARAMETER supply voltage voltage at all pins relative to pin 2 operating ambient temperature storage temperature electrostatic handling note 1 CONDITIONS 0 0 -40 -65 - MIN. 10 VCC +85 +150 -
TEA6324T
MAX. V V C C
UNIT
1. Human body model: C = 100 pF; R = 1.5 k; V 2 kV. Machine model: C = 200 pF; R = 0 ; V 500 V.
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
CHARACTERISTICS VCC = 8.5 V; RS = 600 ; RL = 10 k; CL = 2.5 nF; AC coupled; f = 1 kHz; Tamb = 25 C; gain control Gv = 0 dB; bass linear; treble linear; balance in mid position; unless otherwise specified. SYMBOL VCC ICC VDC Vref Gv(max) Vo(rms) PARAMETER supply voltage supply current internal DC voltage at inputs and outputs internal reference voltage at pin 16 maximum voltage gain output voltage level (RMS value) for Pmax at the power output stage start of clipping THD 0.1%; see Fig.10 THD = 1% RL = 2 k; CL = 10 nF; THD = 1% Vi(rms) fro input sensitivity roll-off frequency Vo = 2000 mV; Gv = 20 dB CKIN = 220 nF; CKVL = 220 nF; Zi = Zi(min) low frequency (-1 dB) low frequency (-3 dB) high frequency (-1 dB) CKIN = 470 nF; CKVL = 100 nF; Zi = Zi(typ) low frequency (-3 dB) cs THD channel separation total harmonic distortion Vi = 2 V; frequency range 250 Hz to 10 kHz frequency range 20 Hz to 12.5 kHz Vi = 100 mV; Gv = 20 dB Vi = 1 V; Gv = 0 dB Vi = 2 V; Gv = 0 dB Vi = 2 V; Gv = -10 dB RR ripple rejection Vr(rms) < 200 mV f = 100 Hz f = 40 Hz to 12.5 kHz (S+N)/N signal-plus-noise to noise ratio unweighted; 20 Hz to 20 kHz RMS; Vo = 2.0 V; see Figs 5 and 6 CCIR468-2 weighted; quasi peak; Vo = 2.0 V Gv = 0 dB Gv = 12 dB Gv = 20 dB - - - 95 88 81 - - - dB dB dB 70 - - 76 66 105 - - - dB dB dB - - - - 0.1 0.05 0.1 0.1 - 0.15 - - % % % % 60 30 17 - - - - - - - Hz Hz Hz Hz - 2300 2000 - 2000 - - 200 - - - - mV mV mV mV RS = 0 ; RL = CONDITIONS MIN. 7.5 - 3.83 - 19 TYP. 8.5 26 4.25 4.25 20 MAX. 9.5 33 4.68 - 21 UNIT V mA V V dB
20000 -
90
96
-
dB
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
SYMBOL Pno(rms)
PARAMETER noise output power (RMS value) only contribution of TEA6324T; power amplifier for 6 W crosstalk between bus inputs and V bus ( p - p ) signal outputs 20 log -------------------------V o ( rms )
CONDITIONS mute position; note 1
MIN. - -
TYP.
MAX. 10
UNIT nW
ct
note 2
-
110
-
dB
Source selector Zi S Vi(rms) Voffset Zo RL CL Gv Zi Zo RL CL RDCL Vi(rms) Vn(o) input impedance input isolation of one selected source to any other input maximum input voltage (RMS value) DC offset voltage at source selector output by selection of any inputs output impedance output load resistance output load capacity voltage gain, source selector f = 1 kHz f = 12.5 kHz THD < 0.5%; VCC = 8.5 V THD < 0.5%; VCC = 7.5 V 25 - - - - - - 10 0 - 35 105 95 2.15 1.8 - 80 - - 0 45 - - - - 10 120 - 2500 - k dB dB V V mV k pF dB
Control part (source selector disconnected; source resistance 600 ) input impedance volume input output impedance output load resistance output load capacity DC load resistance at output to ground maximum input voltage (RMS value) noise output voltage THD < 0.5% CCIR468-2 weighted; quasi peak Gv = 20 dB Gv = 0 dB Gv = -66 dB mute position CRtot Gstep Ga Gt mute total continuous control range recommended control range step resolution step error between any adjoining step attenuator set error gain tracking error mute attenuation Gv = +20 to -50 dB Gv = -51 to -66 dB Gv = +20 to -50 dB see Fig.9 - - - - - - - - - - - 100 110 33 13 10 106 86 1 - - - - 110 220 50 22 - - - - 0.5 2 3 2 - V V V V dB dB dB dB dB dB dB dB 100 - 2 0 4.7 - 150 80 - - - 2.15 200 120 - 10 - - k k nF k V
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
SYMBOL Voffset
PARAMETER DC step offset between any adjoining step DC step offset between any step to mute
CONDITIONS Gv = 0 to -66 dB Gv = 20 to 0 dB Gv = 0 to -66 dB
MIN. - - - 2 -
TYP. 0.2
MAX. 10 15 10
UNIT mV mV mV
Volume I control CRtot(vol)1 continuous volume control range Gv Gstep Gbass Gstep Voffset Gtreble voltage gain step resolution - -31 - 51 - 1 - +20 - dB dB dB
Bass control bass control, maximum boost maximum attenuation step resolution (toggle switching) step error between any adjoining step DC step offset in any bass position Treble control treble control, maximum boost maximum attenuation maximum boost Gstep Voffset step resolution (toggle switching) step error between any adjoining step DC step offset in any treble position Volume II and balance control CRtot(vol)2 continuous attenuation of volume control range Gstep step resolution attenuation set error Mute function (see Fig.9) HARDWARE MUTE Vsw mute switch level (2 x VBE) input level input current VswLOW = 1 V - - -300 - - 0.3 -300 - 9 1.45 - - - - 0.6 -150 2.2 - 1.0 - VCC 0.5 V 53.5 - - 55 1 - 56.5 2 1.5 dB dB dB f = 15 kHz f = 15 kHz f > 15 kHz f = 15 kHz f = 15 kHz 11 11 - - - - 12 12 - 1.5 - - 13 13 15 - 0.5 10 dB dB dB dB dB mV f = 46 Hz f = 46 Hz f = 46 Hz f = 46 Hz 16 16 - - - 18 18 1.8 - - 19 19 - 0.5 25 dB dB dB dB mV
mute active
VswLOW Ii VswHIGH td(mute) Idch Ich VswDEL V A V ms A A V
mute passive: level internally defined
saturation voltage delay until mute passive
ZERO CROSSING MUTE discharge current charge current delay switch level (3 x VBE) 1.2 - -
1997 Mar 13
Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
SYMBOL td V(w) delay time
PARAMETER window for audio signal zero crossing detection
CONDITIONS Cm = 10 nF
MIN. - -
TYP. 100 30
MAX. - 40
UNIT ms mV
Muting at power supply drop VCCdrop supply drop for mute active - V23 - 0.7 - V
Power-on reset when reset is active the GMU-bit (general mute) is set and the I2C-bus receiver is in reset position VCC increasing supply voltage start of reset end of reset decreasing supply voltage start of reset Digital part (I2C-bus pins); note 3 VIH VIL IIH IIL VOL HIGH-level input voltage LOW-level input voltage HIGH-level input current LOW-level input current LOW-level output voltage IL = 3 mA 3 -0.3 -10 -10 - - - - - - 9.5 +1.5 +10 +10 0.4 V V A A V - 5.2 4.2 - 6.5 5.5 2.5 7.2 6.2 V V V
Notes to the characteristics 1. The indicated values for output power assume a 6 W power amplifier at 4 with 20 dB gain and a fixed attenuator of 12 dB in front of it. Signal-to-noise ratios exclude noise contribution of the power amplifier. 2. The transmission contains: total initialization with MAD and subaddress for volume and 8 data words, see also definition of characteristics, clock frequency = 50 kHz, repetition burst rate = 400 Hz, maximum bus signal amplitude = 5 V (p-p). 3. The AC characteristics are in accordance with the I2C-bus specification. This specification, "The I2C-bus and how to use it", can be ordered using the code 9398 393 40011.
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Philips Semiconductors
Preliminary specification
Sound control circuit
I2C-BUS PROTOCOL I2C-bus format S(1) Notes 1. S = START condition. 2. SLAVE ADDRESS (MAD) = 0101 0000. 3. A = acknowledge, generated by the slave. 4. SUBADDRESS (SAD), see Table 1. 5. DATA, see Table 1. 6. P = STOP condition. Table 1 Second byte after MAD MSB FUNCTION Volume Output right Output left No function No function Bass Treble Switch Note 1. Significant subaddress. V OUTR OUTL - - BA TR S BIT 7 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 4 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0 2(1) 0 0 0 0 1 1 1 1 SLAVE ADDRESS(2) A(3) SUBADDRESS(4) A(3) DATA(5)
TEA6324T
A(3)
P(6)
LSB 1(1) 0 0 1 1 0 0 1 1 0(1) 0 1 0 1 0 1 0 1
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Philips Semiconductors
Preliminary specification
Sound control circuit
Table 2 Definition of third byte after MAD and SAD MSB FUNCTION Volume Output right Output left No function No function Bass Treble Switch Notes 1. Zero crossing mode. 2. Volume control. 3. Don't care bits (logic 1 during testing). 4. Output right. 5. Output left. 6. Bass control. 7. Treble control. 8. Mute control for all outputs (general mute). 9. Source selector control. V OUTR OUTL - - BA TR S BIT 7 ZCM(1) X(3) X(3) X(3) X(3) X(3) X(3) GMU(8) 6 1 X(3) X(3) X(3) X(3) X(3) X(3) X(3) 5 V5(2) OUTL5(5) X(3) X(3) X(3) X(3) X(3) 4 V4(2) OUTL4(5) X(3) X(3) BA4(6) TR4(7) X(3) 3 V3(2) OUTL3(5) X(3) X(3) BA3(6) TR3(7) X(3) 2 V2(2) OUTL2(5) X(3) X(3) BA2(6) TR2(7) SC2(9)
TEA6324T
LSB 1 V1(2) OUTL1(5) X(3) X(3) BA1(6) TR1(7) SC1(9) 0 V0(2) OUTL0(5) X(3) X(3) BA0(6) TR0(7) SC0(9)
OUTR5(4) OUTR4(4) OUTR3(4) OUTR2(4) OUTR1(4) OUTR0(4)
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Philips Semiconductors
Preliminary specification
Sound control circuit
Table 3 Volume I setting Gv (dB) +20 +19 +18 +17 +16 +15 +14 +13 +12 +11 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 DATA V5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 V4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 V3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 V2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 V1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
TEA6324T
V0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
Gv (dB) -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 -28 -29 -30 -31 -28 -29 -30 -31 -28 -29 -30 -31 -28 -29 -30 -31
DATA V5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 V4 1 1 1 1 1 1 1 1 1 1 0 0 0 0 V3 1 1 0 0 0 0 0 0 0 0 1 1 1 1 V2 0 0 1 1 1 1 0 0 0 0 1 1 1 1 V1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 V0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Repetition of steps in a range from -28 dB to -31 dB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Preliminary specification
Sound control circuit
Table 4 Volume II setting; note 1 DATA Gv (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 -28 -29 -30 -31 -32 -33 -34 -35 -36 OUTL5 OUTR5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 OUTL4 OUTR4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 OUTL3 OUTR3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 OUTL2 OUTR2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 OUTL1 OUTR1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
TEA6324T
OUTL0 OUTR0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
DATA Gv (dB) -37 -38 -39 -40 -41 -42 -43 -44 -45 -46 -47 -48 -49 -50 -51 -52 -53 -54 -55 Mute Mute Mute Mute Mute Mute Mute Mute Note 1. For a particular range the data is always the same, only the subaddress changes. OUTL5 OUTR5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTL4 OUTR4 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUTL3 OUTR3 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 OUTL2 OUTR2 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 OUTL1 OUTR1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 OUTL0 OUTR0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Preliminary specification
Sound control circuit
Table 5 Bass setting Gbass (dB) +18.0 +16.2 +18.0 +16.2 +18.0 +16.2 +14.4 +12.6 +10.8 +9.0 +7.2 +5.4 +3.6 +1.8 0(1) 0(2) -1.8 -3.6 -5.4 -7.2 -9.0 -10.8 -12.6 -14.4 -16.2 -18.0 -16.2 -18.0 Note 3 Note 3 Note 3 Notes 3 and 4 Notes 1. Recommended data word for step 0 dB. 2. Result of 1.8 dB boost and 1.8 dB attenuation. 3. The last four bass control data words mute the bass response. DATA BA4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BA3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 BA2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 BA1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
TEA6324T
BA0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
4. The last bass control and treble control data words (00000) enable the external equalizer connection.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
Table 6 Treble setting Gtreble (dB) +12.0 +10.5 +12.0 +10.5 +12.0 +10.5 +12.0 +10.5 +9.0 +7.5 +6.0 +4.5 +3.0 +1.5 0(1) 0(2) -1.5 -3.0 -4.5 -6.0 -7.5 -9.0 -10.5 -12.0 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Note 3 Notes 3 and 4 Notes 1. Recommended data word for step 0 dB. 2. Result of 1.5 dB boost and 1.5 dB attenuation. 3. The last eight treble control data words select treble output. DATA TR4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TR3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 TR2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 TR1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
TEA6324T
TR0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
4. The last treble control and bass control data words (00000) enable the external equalizer connection.
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Philips Semiconductors
Preliminary specification
Sound control circuit
Table 7 Selected input DATA FUNCTION SC2 Stereo inputs IAL and IAR Stereo inputs IBL and IBR No function No function Mono input IMO Note 1. X = don't care bits (logic 1 during testing). 1 1 1 1 0 SC1 1 1 0 0 X(1) SC0 1 0 1 0 X(1) Direct mute off Mute off delayed until the next zero crossing Direct mute Mute delayed until the next zero crossing FUNCTION Table 8 Mute mode
TEA6324T
DATA GMU 0 0 1 1 ZCM 0 1 0 1
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
handbook, full pagewidth
20
MED840
Gbass (dB) 10
0
-10
-20 10
10 2
10 3
f (Hz)
10 4
Fig.3 Bass control.
handbook, full pagewidth
15
MED424
Gtreble (dB)
10
5
0
-5
-10
-15 10 2
10 3
10 4
f (Hz)
10 5
Fig.4 Treble control.
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
MED426
handbook, full pagewidth
100
S/N (dB) 90
(1)
(2) (3)
80
70
60
50 10 -4 (1) Vi = 2.0 V. (2) Vi = 0.5 V. (3) Vi = 0.2 V.
10 -3
10 -2
10 -1
1
Po (W)
10
Fig.5 Signal-to-noise ratio; noise weighted: CCIR468-2, quasi peak.
MED427
handbook, full pagewidth
110
S/N (dB)
(1)
100
(2)
90
(3)
80
70
60 10 -4 (1) Unweighted RMS. (2) CCIR468-2 RMS. (3) CCIR468-2 quasi peak.
10 -3
10 -2
10 -1
1
Po (W)
10
Fig.6 Signal-to-noise ratio; Vi = 2 V; Pmax = 6 W.
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
handbook, full pagewidth
200
MHA594
noise (V) 150
100
50
0 -70 Stereo/mono inputs.
-50
-30
-10
10
gain (dB)
30
Fig.7 Noise output voltage; CCIR468-2, quasi peak.
handbook, full pagewidth
-60
MED429
(dB)
-80
-100
-120
-140
20
50
10 2
200
500
10 3
2 x 10 3
5 x 10 3
10 4
2 x 10 4 f (Hz)
Fig.8 Muting.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
handbook, full pagewidth
MUTE (pin 9)
hardware mute switch Ich = -150 A
TEA6324T
Idch = 0.6 A
Cm = 10 nF
U (V) VCC 8.5
td(mute) = 0.5 ms delay until mute passive
I (A)
0
delay switch(1) 2.2 level mute switch(2) 1.45 level
-150
MHA595
100 ms zero crossing mute start end of delay hard mute on hard mute off
t (ms)
(1) Typically 2.2 V; referenced to 3 x VBE. (2) Typically 1.5 V; referenced to 2 x VBE.
Fig.9 Mute function diagram.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
In cases where at the maximum volume position the 20 dB gain is not needed, it is recommended that the maximum boost gain should be used. This coupled with increased attenuation in the last section (volume II), results in a lower noise and offset voltage.
handbook, halfpage
POWER STAGE
TEA6324T
G = 20 dB Vi(min) = 200 mV P(max) = 100 W at 4
MHA596
Vo = 2 V for P(max)
a.
handbook, halfpage
POWER STAGE
TEA6324T
G = 26 dB Vi(min) = 200 mV P(max) = 100 W at 4
MHA597
Vo = 1 V for P(max)
b.
a. Gain volume I = 20 dB (Gv(max)); gain volume II = 0 dB; control range = 55 dB. b. Gain volume I = 20 dB (Gv(max)); gain volume II = -6 dB global setting; control range now 49 dB, previously 55 dB.
Fig.10 Level diagram.
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
handbook, full pagewidth
VP VCC 8.5 V 4.7 k 470 F 23 13 3 11 14 TEA6324T 10 22 12 2 15 16 47 F 100 F
+8.5 V to oscilloscope
inputs
outputs to oscilloscope
5 x 220 nF 5 x 600
2 x 4.7 F 2 x 10 k
MHA598
Fig.11 Turn-on/off power supply circuit diagram.
handbook, full pagewidth
10
MED433
(V) 8
(1) 6
4 (2)
2
0 0 (1) VCC. (2) VO. 1 2 3 4 t (s) 5
Fig.12 Turn-on/off behaviour.
1997 Mar 13
25
Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
3.4 k
handbook, full pagewidth
220 nF
270 nF
270 nF 5.6 nF 5 4 9
10 nF
100 F 16 VCC = 8.5 V 10 k 1000 F VP 0.2 V (RMS) 600 220 nF 0.1 F 2 47 F 15
8
7
6
24 23
SCL SDA 4.7 F
TEA6324T
1
output right output left
VO input A and B left and right and input mono 17 18 19 20 5.6 nF 220 nF 270 nF 270 nF 3.4 k 21
MHA599
Fig.13 Test circuit for power supply ripple rejection (RR).
handbook, full pagewidth
3.4 k 220 nF 270 nF 270 nF 5.6 nF 5 4 9 24 23 2 VP 47 F 15 input A and B right and left input A and B left and right and input mono 17 18 19 20 5.6 nF 220 nF 270 nF 270 nF 3.4 k 21
MHA600
10 nF
100 F 16 VCC = 8.5 V 470 F 0.1 F
8
7
6
SCL SDA
TEA6324T
1
output right output left
4.7 F
Vi
600
220 nF 220 nF
VO
Fig.14 Test circuit for channel separation (cs).
1997 Mar 13
26
Philips Semiconductors
Preliminary specification
Sound control circuit
Selection of input signals by using the zero crossing mute mode The zero cross mute mode provides for a selection of input sources (A and B) for both left and right channels. The following example (see Fig.15), shows a typical selection for the left input source signals IAL and IBL. The initial selection of these channels produces a modulation click. The click is determined by the difference of the signal values at the time of switching. At t1 the maximum possible difference between signals is 7 V (p-p) (see Fig.15) and gives a large click. Using the cross detector no modulation click is audible. With the selection enabled at t1, the microcontroller sets the zero cross bit (ZCM = 1) and then the mute bit (GMU = 1) via the I2C-bus. The output signal follows the input A signal from -4 V, until the next zero crossing occurs and then activates mute.
TEA6324T
After a fixed delay time at t2, the microcontroller sends the bits for input switching and mute inactive. The output signal remains muted until the next signal zero crossing of input B (IBL) occurs, and then follows that signal up to 3 V. With a delay time of 40 ms (t2 - t1), the external capacitor Cm = 3.3 nF. This results with the zero cross function operating at the lowest frequency of 40 Hz determined by the Cm capacitor.
handbook, full pagewidth
V 4 3 2 1 0 -1 -2 -3 -4
(2) (1)
MED436
t1
t2
(3)
t
(1) Input A (IAL). (2) Output. (3) Input B (IBL).
Fig.15 Zero cross function; only one channel shown.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
INTERNAL PIN CONFIGURATIONS Values shown in Figs 16 to 27 are typical DC values; VCC = 8.5 V.
TEA6324T
3 +
4.25 V
1 5V 1.8 k 80
MBE911
MBE912
Fig.16 Pin 1: SDA (I2C-bus data).
Fig.17 Pins 3 and 22: output signals.
5 + 4.25 V 4 4.25 V + 80
2.4 k
MHA601 MHA602
Fig.18 Pins 4 and 21: treble control capacitors.
Fig.19 Pins 5 and 20: bass control capacitor outputs.
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
6 4.25 V 3.52 k +
7 4.25 V +
150 k
4.25 V
MHA603 MHA604
Fig.20 Pins 6 and 19: bass control capacitor inputs.
Fig.21 Pins 7 and 18: input volume 1, control part.
8 + 4.25 V 1.3 k 80 maximum 200 A constant 2.2 V 0.6 A constant 4.5 k + 9 8.5 V
MHA605
MHA606
Fig.22 Pins 8 and 17: output source selector.
Fig.23 Pin 9: mute control.
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Philips Semiconductors
Preliminary specification
Sound control circuit
TEA6324T
+ 8.5 V 4.7 k 300
10 4.25 V +
15
+ 5 k 4.25 V 3.4 k 16 3.4 k
35 k
4.25 V
MHA607 MHA608
Fig.24 Pins 10 to 14: inputs.
Fig.25 Pin 15: filtering for supply; pin 16: reference voltage.
23
apply +8.5 V to this pin
24 5V 1.8 k
MHA609
MHA610
Fig.26 Pin 23: supply voltage.
Fig.27 Pin 24: SCL (I2C-bus clock).
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
PACKAGE OUTLINE SO24: plastic small outline package; 24 leads; body width 7.5 mm
TEA6324T
SOT137-1
D
E
A X
c y HE vMA
Z 24 13
Q A2 A1 pin 1 index Lp L 1 e bp 12 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 15.6 15.2 0.61 0.60 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT137-1 REFERENCES IEC 075E05 JEDEC MS-013AD EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-24
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering
TEA6324T
Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA6324T
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1997 Mar 13
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Philips Semiconductors
Preliminary specification
Sound control circuit
NOTES
TEA6324T
1997 Mar 13
34
Philips Semiconductors
Preliminary specification
Sound control circuit
NOTES
TEA6324T
1997 Mar 13
35
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547027/1200/01/pp36
Date of release: 1997 Mar 13
Document order number:
9397 750 01599

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