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| UC1524A UC2524A UC3524A Advanced Regulating Pulse Width Modulators FEATURES * * * * * * * * Fully Interchangeable with Standard UC1524 Family DESCRIPTION The UC1524A family of regulating PWM ICs has been designed to retain the same highly versatile architecture of the industry standard UC1524 (SG1524) while offering substantial improvements to many of its limitations. The UC1524A Precision Reference Internally is pin compatible with "non-A" models and in most existing applications can be Trimmed to 1% directly interchanged with no effect on power supply performance. Using the High-Performance Current Limit UC1524A, however, frees the designer from many concerns which typically had Function required additional circuitry to solve. Under-Voltage Lockout with Hysteretic Turn-on Start-Up Supply Current Less Than 4mA Output Current to 200mA 60V Output Capability Wide Common-Mode Input Range for both Error and Current Limit Amplifiers PWM Latch Insures Single Pulse per Period Double Pulse Suppression Logic 200ns Shutdown through PWM Latch Guaranteed Frequency Accuracy Thermal Shutdown Protection The UC1524A includes a precise 5V reference trimmed to 1% accuracy, eliminating the need for potentiometer adjustments; an error amplifier with an input range which includes 5V, eliminating the need for a reference divider; a current sense amplifier useful in either the ground or power supply output lines; and a pair of 60V, 200mA uncommitted transistor switches which greatly enhance output versatility. An additional feature of the UC1524A is an under-voltage lockout circuit which disables all the internal circuitry, except the reference, until the input voltage has risen to 8V. This holds standby current low until turn-on, greatly simplifying the design of low power, off-line supplies. The turn-on circuit has approximately 600mV of hysteresis for jitter-free activation. Other product enhancements included in the UC1524A's design include a PWM latch which insures freedom from multiple pulsing within a period, even in noisy environments, logic to eliminate double pulsing on a single output, a 200ns external shutdown capability, and automatic thermal protection from excessive chip temperature. The oscillator circuit of the UC1524A is usable beyond 500kHz and is now easier to synchronize with an external clock pulse. The UC1524A is packaged in a hermetic 16-pin DIP and is rated for operation from -55C to +125C. The UC2524A and 3524A are available in either ceramic or plastic packages and are rated for operation from -25C to +85C and 0C to 70C, respectively. Surface mount devices are also available. * * * * * BLOCK DIAGRAM +5V REFERENCE REGULATOR VIN OSC RT CT COMP INV. INPUT N.I. INPUT CL (+) SENSE CL (-) SENSE 15 U.V. SENSE POWER TO INTERNAL CIRCUITRY T OSC CLOCK RAMP 9 VIN 1 E/A 2 200mV + C/L 5 4 VIN 6V 10k 1k COMP S R 16 12 VREF CA 3 6 7 FLIP FLOP 11 13 EA CB PWM S LATCH 14 10 5.5V 8 GND EB SHUTDOWN UDG-99178 SLUS181A - NOVEMBER 1999 UC1524A UC2524A UC3524A ABSOLUTE MAXIMUM RATINGS Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Collector Supply Voltage (VC) . . . . . . . . . . . . . . . . . . . . . . . 60V Output Current (each Output). . . . . . . . . . . . . . . . . . . . . 200mA Maximum Forced Voltage (Pin 9, 10) . . . . . . . . . . . . . -3 to +5V Maximum Forced Current (Pin 9, 10) . . . . . . . . . . . . . . . 10mA Reference Output Current . . . . . . . . . . . . . . . . . . . . . . . . 50mA Oscillator Charging Current . . . . . . . . . . . . . . . . . . . . . . . . 5mA Power Dissipation at TA = +25C. . . . . . . . . . . . . . . . . 1000mW Power Dissipation at TC = +25C . . . . . . . . . . . . . . . . 2000mW Operating Temperature Range . . . . . . . . . . . . -55C to +125C Storage Temperature Range . . . . . . . . . . . . . . -65C to +150C Lead Temperature, (Soldering, 10 seconds) . . . . . . . . . +300C Note: Consult packaging section of Databook for thermal limitations and considerations of package. CONNECTION DIAGRAMS PLCC-20, LCC-20 (TOP VIEW) Q or L Package PACKAGE PIN FUNCTION FUNCTION PIN DIL-16, SOIC-16 (TOP VIEW) J or N Package, DW Package N/C Inv. Input Non-Inv. Input OSC/SYNC C.L. (+) sense N/C C.L. (-) sense RT CT Ground N/C Compensation Shutdown Emitter A Collector A N/C Collector B Emitter B +VIN +5V VREF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = -55C to +125C for the UC1524A, -25 to +85C for the UC2524A, and 0C to + 70C for the UC3524A; VIN = VC = 20V, TA = TJ. UC1524A / UC2524A PARAMETER Turn-on Characteristics Input Voltage Turn-on Threshold Turn-on Current Operating Current Turn-on Hysteresis* Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability* Short Circuit Current Output Noise Voltage* Long Term Stability* TJ = 25C Over Operating Range VIN = 10 to 40V IL = 0 to 20 mA Over Operating Range* VREF = 0, 25C TJ 125C 10Hz f 10kHz, TJ =25C TJ =125C, 1000 Hrs. 4.95 4.9 10 20 20 80 40 20 50 5.00 5.05 5.1 20 25 25 100 4.90 4.85 10 20 20 80 40 20 50 5.00 5.10 5.15 30 35 35 100 V V mV mV mV mA Vrms mV VIN = 6V VIN = 8 to 40V Operating Range after Turn-on 8 6.5 7.5 2.5 5 0.5 40 8.5 4 10 8 6.5 7.5 2.5 5 0.5 40 8.5 4 10 V V mA mA V TEST CONDITIONS MIN TYP MAX MIN UC3524A TYP MAX UNITS * These parameters are guaranteed by design but not 100% tested in production. 2 UC1524A UC2524A UC3524A ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = -55C to +125C for the UC1524A, -25 to +85C for the UC2524A, and 0C to + 70C for the UC3524A; VIN = VC = 20V, TA = TJ. UC1524A / UC2524A PARAMETER TEST CONDITIONS MIN 41 40.2 1 500 3 0.29 3.3 TJ = 25C 0.7 3.5 0.5 3.5 0.8 -1.0 0.5 1 .05 70 70 5.0 VO= 1 to 4V, RL 10M TJ = 25C, AV = 0dB TJ = 25C, 30k RL 1M VCOMP = 0.5V VCOMP = 3.8V TJ = 25C, E/A Set for Maximum Output Over Operating Temperature Range Input Bias Current Common Mode Rejection Ratio V(pin 5) = -0.3V to + 5.5V Power Supply Rejection Ratio Output Swing (Note 1) Open-Loop Voltage Gain Delay Time* Output Section (Each Output) Collector Emitter Voltage Collector Leakage Current IC = 100A VCE = 50V 60 80 .1 20 60 80 .1 20 V A VIN = 10 to 40V Minimum Total Range VO = 1 to 4V, RL 10M Pin 4 to Pin 9, VIN = 300mV 50 50 5.0 70 80 300 45 190 180 -1 60 60 0.5 200 210 220 -10 50 50 5.0 70 80 300 72 1 1.7 80 3 2.3 0 45 180 170 -1 60 60 0.5 200 220 230 -10 80 80 0.5 VIN = 10 to 40V 5 5 1 70 70 5.0 64 1 1.7 80 3 2.3 0 1.0 3.7 0.9 TYP 43 MAX 45 45.9 2 140 500 3 0.3 3.3 0.7 3.5 0.5 3.5 0.8 -1.0 2 1 0.5 80 80 0.5 10 10 1 1.0 3.7 0.9 MIN 39 38.2 1 Oscillator Section (Unless otherwise specified, RT = 2700, CT = 0.01 mfd) Initial Accuracy Temperature Stability* Minimum Frequency Maximum Frequency Output Amplitude* Output Pulse Width* Ramp Peak Ramp Valley Ramp Valley T.C. Error Amplifier Section (Unless otherwise specified, VCM = 2.5V) Input Offset Voltage Input Bias Current Input Offset Current Common Mode Rejection Ratio VCM = 1.5 to 5.5V Power Supply Rejection Ratio Output Swing (Note 1) Open Loop Voltage Gain Gain-Bandwidth* DC Transconductance* Minimum Duty Cycle Maximum Duty Cycle Input Offset Voltage mV A A dB dB V dB MHz mS % % mV mV A dB dB V dB ns TJ = 25C Over Operating Range Over Operating Temperature Range RT = 150k, CT = 0.1mfd RT = 2.0k, CT = 470pF 43 47 47.9 2 120 kHz kHz % Hz kHz V s V V mV/C UC3524A TYP MAX UNITS P.W.M. Comparator (RT = 2k, CT = 0.01mfd) Current Limit Amplifier (Unless otherwise specified, Pin 5 = 0V) * These parameters are guaranteed by design but not 100% tested in production. DC transconductance (gM) relates to DC open-loop voltage gain according to the following equation: AV = gMRL where RL is the resistance from pin 9 to the common mode voltage. The minimum gM specification is used to calculate minimum AV when the error amplifier output is loaded. Note 1: Min Limit applies to output high level, max limit applies to output low level. 3 UC1524A UC2524A UC3524A ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = -55C to +125C for the UC1524A, -25 to +85C for the UC2524A, and 0C to + 70C for the UC3524A; VIN = VC = 20V. TA = TJ. PARAMETER TEST CONDITIONS UC1524A / UC2524A MIN TYP MAX .2 1 18 120 25 300 200 .7 165 .4 2.2 17 400 200 MIN UC3524A UNITS TYP MAX .2 1 18 120 25 300 200 .7 165 .4 2.2 400 200 V V V ns ns ns ns V V C Output Section ( cont.) (Each Output) Saturation Voltage IC = 20mA IC = 200mA 17 Emitter Output Voltage IE = 50mA Rise Time* TJ = 25C, R = 2k Fall Time* TJ = 25C, R = 2k Comparator Delay* TJ = 25C, Pin 9 to output Shutdown Delay* TJ = 25C, Pin 10 to output 0.6 Shutdown Threshold TJ = 25C, RC = 2k S/D Threshold Over Temp. Over Operating Temperature Range 0.4 Thermal Shutdown* * These parameters are guaranteed by design but not 100% tested in production. 1.0 1.2 0.6 0.4 1.0 1.0 OPEN-LOOP CIRCUIT 4 UC1524A UC2524A UC3524A Supply Current vs Voltage Error Amplifier Voltage Gain and Phase vs Frequency Pulse Width Modulator Transfer Function Oscillator Frequency vs Timing Components Output Dead Time vs Timing Capacitor Value Output Saturation Voltage 5 UC1524A UC2524A UC3524A Current Limit Amplifier Delay Shutdown Delay From PWM Comparator - Pin 9 Turn-Off Delay From Shutdown - Pin 10 UNITRODE CORPORATION 7 CONTINENTAL BLVD. * MERRIMACK, NH 03054 TEL. (603) 424-2410 * FAX (603) 424-3460 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 2000, Texas Instruments Incorporated |
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