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Ordering number : ENA0287
Monolithic Digital IC
LB11693H
Overview
3-Phase Brushless Motor Driver for 24V Fan Motors
The LB11693H reduces motor noise by imparting a slope to the output current when switching the phase to which power is applied. This motor driver includes an automatic recovery constraint protection circuit and is optimal for driving 24V fan motors.
Functions
* Soft phase switching + direct PWM drive * PWM control based on both a DC voltage input (the CTL voltage) and a pulse input * Provides a 5 V regulator output * One Hall-effect sensor FG output * Integrating amplifier * Automatic recovery constraint protection circuit (on/off = 1/14), RD output * Current limiter circuit * LVSD circuit * Thermal protection circuit
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Supply voltage range Output current Allowable power dissipation 1 Allowable power dissipation 2 Operating temperature Storage temperature Symbol VCC max IO max Pd max1 Pd max2 Topr Tstg T 500mS Independent IC When mounted on a circuit board * Conditions Ratings 30 1.8 0.9 2.1 -30 to +100 -55 to +150 Unit V A W W C C
*: On the specified circuit board (114.3mmx76.1mmx1.6mm, glass epoxy)
Allowable Operating Ranges at Ta = 25C
Parameter Supply voltage rang Constant voltage output current RD output current FG output current Symbol VCC IREG IRD IFG Conditions Ratings 9.5 to 28 0 to -30 0 to 10 0 to 10 Unit V mA mA mA
Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein.
92706 / 21306 MS OT 20051228-S00001 No.A0287-1/24
LB11693H
Electrical Characteristics at Ta = 25C, VCC = VM = 24V
Parameter Current drain 1 Current drain 2 Output Block Output saturation voltage 1 Output saturation voltage 2 Output leakage current High side diode forward voltage 1 High side diode forward voltage 2 5V Constant Voltage Output Output voltage Voltage regulation Load regulation Hall amplifier Input bias current Differential input voltage range Common-mode input voltage range Input offset voltage CSD Pin High-level output voltage Low-level output voltage External capacitor charge current External capacitor charge current Charge/discharge current ratio VOH(CSD) VOL(CSD) ICSD1 ICSD2 RCSD Charge current/discharge current 2.75 0.85 -3.3 0.09 3.0 1.0 -2.4 0.17 14 3.25 1.15 -1.4 0.23 V V A A Times VIOH Design target value -20 20 mV IB(HA) VHIN VICM Sine wave input Differential input 50mVp-p 50 1.5 2 10 350 VREG-1.0 A mVp-p V VREG VREG1 VREG2 IO = -5mA VCC = 9.5 to 28V IO = -5 to -20mA 4.7 5.0 30 20 5.3 100 100 V mV mV VD2 ID = 1.5A 1.9 2.5 V VOsat1 VOsat2 IOleak VD1 ID = 0.7A 1.25 IO = 0.7A, VO (SINK) + VO (SOURCE) IO = 1.5A, VO (SINK) + VO (SOURCE) 1.5 2.2 2.05 2.9 100 1.65 V V A V Symbol ICC1 ICC2 When STOP Conditions min Ratings typ 10 4.0 max 13.5 5.5 mA mA Unit
Undervoltage Protection Circuit (LVS pin) Operating voltage Release voltage Hysteresis Current Limiter Circuit (RF pin) Limiter voltage Thermal Shutdown Operation Thermal shutdown operating voltage Hysteresis CTL Amplifier Input offset voltage Input bias current Common-mode input voltage range High-level output voltage Low-level output voltage Open-loop gain VOH(CTL) VOL(CTL) G(CTL) ITOC = -0.2mA ITOC = 0.2mA f(CTL) = 1kHz 45 VREG-1.2 VREG-0.8 0.8 51 1.05 V V dB Continued on next page. VIO(CTL) IB(CTL) VICM -10 -1 0 10 1 VREG-1.7 mV A V TSD Design target value (junction temperature) 40 C TSD Design target value (junction temperature) 150 170 C VRF VCC-VM 0.45 0.5 0.55 V VSDL VSDH VSD 3.6 4.1 0.35 3.8 4.3 0.5 4.0 4.5 0.65 V V V
No.A0287-2/24
LB11693H
Continued from preceding page. Parameter PWM Oscillator Circuit High-level output voltage Low-level output voltage Amplitude External capacitor charge current Oscillator frequency TOC pin Input voltage 1 Input voltage 2 Input voltage 1L Input voltage 2L Input voltage 1H Input voltage 2H RD pin Low-level output voltage Output leakage current FG pin Low-level output voltage Output leakage current FGFIL Pin Charge current Discharge current FG Amplifier Schmitt Block (IN1) Amplifier gain Hysteresis S/S Pin High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current PWMIN Pin Input frequency range High-level input voltage range Low-level input voltage range Input open voltage Hysteresis High-level input current Low-level input current F/R Pin High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current VIH(FR) VIL(FR) VIO(FR) VIS(FR) IIH(FR) IIL(FR) VFR = VREG VFR = 0V 2.0 0 VREG-0.5 0.16 -10 -165 0.25 0 -115 VREG 1.0 VREG 0.34 10 V V V V A A f(PI) VIH(PI) VIL(PI) VIO(PI) VIS(PI) IIH(PI) IIL(PI) VPWMIN = VREG VPWMIN = 0V -170 2.0 0 2.6 0.16 2.9 0.25 100 -130 50 VREG 1.0 3.2 0.34 130 kHz V V V V A A VIH(SS) VIL(SS) VIO(SS) VIS(SS) IIH(SS) IIL(SS) VS/S = VREG VS/S = 0V -170 2.0 0 2.6 0.16 2.9 0.25 100 -130 VREG 1.0 3.2 0.34 130 V V V V A A G(FG) VIS(FG) Design target value. Design target value. Input equivalent 7 8 Times mV IFGFIL1 IFGFIL2 -7 3 -5 5 -3 7 A A VOL(FG) IL(FG) IFG = 5mA VFG = 28V 0.1 0.3 10 V A VOL(RD) IL(RD) IRD = 5mA VRD = 28V 0.1 0.3 10 V A VTOC1 VTOC2 VTOC1L VTOC2L VTOC1H VTOC2H Output duty: 100% Output duty: 0% Design target value. 100% when VREG = 4.7V Design target value. 0% when VREG = 4.7V Design target value. 100% when VREG = 5.3V Design target value. 0% when VREG = 5.3V 1.21 1.33 1.45 V 3.08 3.20 3.30 V 1.07 1.17 1.27 V 2.72 1.07 2.72 3.0 1.3 2.80 3.30 1.45 2.90 V V V VOH(PWM) VOL(PWM) V(PWM) ICHG f(PWM) VPWM = 2.1V C = 2200pF 2.75 1.1 1.5 -125 15.5 3.0 1.3 1.7 -90 19.5 3.25 1.4 2.0 -70 27.0 V V Vp-p A kHz Symbol Conditions min Ratings typ max Unit
No.A0287-3/24
LB11693H
Package Dimensions
unit : mm 3251
17.8 (6.2) 36 19
(4.9) 7.9 10.5
(0.5)
1
0.8
2.0
0.3
18 0.25
(2.25)
2.7
SANYO : HSOP36R(375mil)
Pin Assignment
Truth Table
Source Sink 1 2 3 4 5 6 OUT2 OUT1 OUT3 OUT1 OUT3 OUT2 OUT1 OUT2 OUT1 OUT3 OUT2 OUT3 F/R = 'L' IN1 H H H L L L IN2 L L H H H L IN3 H L L L H H IN1 L L L H H H F/R = 'H' IN2 H H L L L H IN3 L H H H L L
0.1
2.45max
0.65
No.A0287-4/24
LB11693H
Pin Function
Pin No. 34 36 2 4 7 9 Symbol OUT1 OUT2 OUT3 GND2 VD VM Motor drive output system ground Low side output transistor drive current supply Motor drive output power supply and output current detection. Connect a resistor (Rf) between this pin and VCC. The output current is limited to a value determined by the equation IOUT = VRF/Rf. Motor drive output Description Equivalent circuit
8 10
VCC VREG
Power supply (Systems other than the motor drive output) 5V regulator output (control circuit power supply). Connect a capacitor (about 0.1F) between this pin and ground for stabilization.
11
LVS
Undervoltage protection voltage detection. Connect this pin to VREG if the VREG level is to be detected. If the VCC level is to be detected, insert a zener diode in series to set the detection level.
12
FGFIL
FG filter. Normally, this IC will be used with this pin open. Connect a capacitor between this pin and ground if noise on the FG signal becomes a problem.
Continued on next page.
No.A0287-5/24
LB11693H
Continued from preceding page. Pin No. 14 Symbol FC Description Control loop frequency characteristics correction. Connect a capacitor between this pin and ground. Equivalent circuit
15
CSD
Constraint protection circuit operating time setting.
16
FG
Hall input 1FG output. (This is an open-collector output.)
17
RD
Motor constrained state detection output (This is an open-collector output.) When the motor is constrained: high, when the motor is turning: low.
18
PWMIN
PWM pulse input. When low the output will be on and when high the outputs will be off. If this pin is used to control this IC, connect EI- to ground and connect EI+ to TOC.
Continued on next page.
No.A0287-6/24
LB11693H
Continued from preceding page. Pin No. 20 Symbol S/S Description Start/stop control. Low: start, high or open: stop. Equivalent circuit
21 22
EI+ EI-
CTL amplifier noninverting input CTL amplifier inverting input
23
TOC
PWM waveform comparator (CTL amplifier output)
25
PWM
PWM oscillator frequency setting. Connect a capacitor between this pin and ground. A frequency of about 20kHz can be set by using a 2200pF capacitor.
Continued on next page.
No.A0287-7/24
LB11693H
Continued from preceding page. Pin No. 26 28 27 30 29 32 31 Symbol GND1 IN1+ IN1IN2+ IN2IN3+ IN3output system) Hall effect sensor inputs High when IN+ > IN-, low for the reverse state. Signal inputs with an amplitude (differential) of at least 50mVp-p are desirable for the Hall inputs. If noise is a problem, connect capacitors between the IN+ and IN- inputs. Description Ground (For circuits other than the motor drive Equivalent circuit
33
F/R
Forward/reverse control Low: forward, high or open: reverse.
1,3 5,6 13,1 9 24,3 5
NC
No connection. The NC pins may be used for wiring connections.
FRAME
Frame connection The FRAME pin is connected internally to the IC surface metal parts. Both must be used in the electrically open state.
No.A0287-8/24
LB11693H
Block Diagram
No.A0287-9/24
LB11693H
LB11693H Overview
1. Output Drive Circuit The LB11693H reduces motor vibration and noise by switching the output current smoothly when switching phases. Since the Hall input waveform is used for the change in (slope of) the output current during phase switching, if the slope of the Hall input waveform is too steep, the change in the output current during phase switching will also be too steep and the effectiveness of this technique at lowering vibration and noise effect will be reduced. Thus the slope of the Hall input waveform requires attention during application design. Low side output transistor PWM switching is used for motor speed control. The drive output is adjusted by changing the duty. The diodes between the outputs and VM used for the regenerative current when the PWM signal is in the off state are built in. If the slope (amplitude) of the Hall input waveform is large, and if used with a high current, the parasitic diodes between the outputs and ground will operate due to the low side kickback during phase switching. If problems such as disruption of the waveforms occur, connect either rectifying diodes or Schottky diodes between the outputs and ground. 2. Power Supply Stabilization Since the LB11693H uses a control method based on PWM switching, the power supply lines are susceptible to disruption. Electrolytic capacitors with an adequate capacitance for stabilization must be connected between VCC and ground. If diodes are inserted in the power supply lines to prevent destruction of the equipment if the power supply is connected in reverse, the power supply lines will be particularly susceptible to disruption. In this case, even larger capacitors must be used. The connected electrolytic capacitors must be located as close as possible to the IC pins (VCC, VM, and GND2). If the electrolytic capacitors cannot be attached close to the pins due to problems with the heat sink or other issues, ceramic capacitors of about 0.1F must be attached close to the pins. 3. VREG Pin At the same time as being the 5V regulator output, the VREG pin is also the power supply for the IC internal control circuits. Therefore, a capacitor of at least 0.1F must be connected between the VREG pin and ground to stabilize the control circuit power supply. The ground side of the connected capacitor must be connected to the GND1 pin with as short a line as possible. 4. FC Pin The capacitor connected to the FC pin is required to correct the control loop's frequency characteristics. (It should be about 0.1F.) 5. VD Pin The VD pin supplies the low side output transistor drive current (a maximum of about 0.1A). The IC internal power consumption is suppressed by connecting a resistor between the VCC and VD pins and dividing power consumption due to the low side output transistor drive current with that resistor. Although the IC internal power consumption due to the drive current can be reduced by lowering the VD pin voltage, a voltage of at least 4 V must be assured at the VD pin. Use a resistor in the range from about 50 (0.5W) to about 100 (1W) between the VCC and VD pins when the LB11693H is used with VCC = 24V. 6. Hall Input Signals Signal inputs with an amplitude (differential) of at least 50mVp-p are required for the Hall inputs. If the output waveforms are disrupted by noise, capacitors must be connected between the Hall input pins (the + and - sides). 7. Current Limiter Circuit The current limiter circuit limits the peak value of the output current to a current determined by the equation I = VRF/Rf (where VRF = 0.5V (typical), Rf = current detection resistor value). When the limiter operates, it suppresses the current by PWM control of the low side output transistor at the PWM frequency determined by the external capacitor connected to the PWM pin, in particular, by reducing the on duty.
No.A0287-10/24
LB11693H
8. Forward/Reverse Switching The LB11693H was designed assuming that forward/reverse switching would not be performed while the motor is operating. We recommend that the F/R pin be held fixed at either the low (forward) or high (reverse) level when the motor is turning. Although it will be pulled up to the high level by an internal pull-up resistor (about 40k) when left open, this must be strengthened by an external resistor if fluctuations are large. If the direction is switched while the motor is turning, large currents will flow due to the braking operation. The LB11693H's current limiter circuit, however, cannot limit this braking current. Therefore, forward/reverse switching during motor rotation is only possible if the braking current is limited to a value under IOmax (1.8A) by the motor coil resistance or other circuit or phenomenon. Furthermore, since through current will flow in the high and low side transistors at the instant the switch occurs with switching that only uses the F/R pin, applications must provide a drive off period for switching directions. A drive off period must be provided by either setting the IC to the stopped state with the S/S pin or setting the PWM signal to the 0% duty state with the TOC and PWMIN pins, and the F/R pin must only be switched during that period to prevent through current. 9. Power Saving Circuit This IC can be set to a power saving state in which current consumption is reduced by setting it to the stopped state with the S/S pin. The bias current to most of the circuits in the IC is cut off in this power saving state. Note, however, that the 5V regulator output is still provided in the power saving state. 10. Notes on the PWM Frequency The PWM frequency is determined by the capacitance (F) of the capacitor connected to the PWM pin. fPWM 1/(23400xC) A frequency in the range 15 to 25kHz is desirable for the PWM frequency. The ground side of the connected capacitor must be connected to the GND1 pin by as short a line as possible. 11. Control Methods The output duty can be controlled by either of the following methods. * Comparison of the TOC pin voltage with the PWM oscillator waveform This method determines the low side output transistor duty according to the result of comparing the TOC pin voltage with the PWM oscillator waveform. The PWM duty will be 0% when the TOC pin voltage is under about 1.3 V and will be 100% when that voltage is over about 3.0V. Since the TOC pin is the output of the CTL amplifier, a control voltage cannot be directly input to the TOC pin. Accordingly, the CTL amplifier is normally used as a full feedback amplifier (by connecting the EI- pin to the TOC pin) and inputting a DC voltage to the EI pin (here the TOC voltage will be equal to the EI+ pin voltage). When the EI+ pin voltage increases, the output duty will increase as well. Since the motor will be driven if the EI+ pin is in the open state, a pull-down resistor should be connected to the EI+ pin in applications where this is not desirable. A low level must be input to the PWMIN pin (or it must be connected to ground) if the TOC pin voltage control system is used. * PWMIN pulse input A 15 to 25kHz frequency pulse signal can be input to the PWMIN pin and the low side output transistor duty can be controlled based on the duty of that input signal. When the PWMIN pin is low, the output will be on, and when high, the output will be off. When the PWMIN pin is open, the input will go to the high level and the output will be off. If PWMIN pin control is used, the EI- pin must be connected to ground and the EI+ pin must be connected to the TOC pin.
No.A0287-11/24
LB11693H
12. Undervoltage Protection Circuit The undervoltage protection circuit turns off the low side output transistor if the LVS pin voltage falls below the circuit's operating voltage (about 3.8V). This operating voltage is the detection level for a 5V system. The detection level can be increased by connecting a zener diode in series with the LVS pin to apply a level shift to the detection level. The current flowing into the LVS pin during detection is about 65A. To suppress variations in the zener voltage, it is necessary to stabilize the rise of the zener diode voltage by increasing the current that flows in the zener diode. If this is necessary, insert a resistor between the LVS pin and ground. When the LCS pin is open, it will be pulled to the ground level by the built-in pull-down resistor and the output will be turned off. Thus if the undervoltage protection circuit is not used, a voltage in excess of the release voltage (about 4.3V) must be applied to the LVS pin. Note that the maximum rating for the LVS pin voltage is 30V. 13. Motor Constraint Protection Circuit When motor motion is constrained, the external capacitor connected to the CSD pin will be alternately charged (up to about 3.0V) with a constant current of about 2.4A and discharged with a constant current of about 0.17A (to about 1.0V). Thus the CSD pin voltage will have a sawtooth waveform. The motor constraint protection circuit turns the motor (the low side output transistor) on or off repeatedly based on this sawtooth waveform. Motor drive will be on during the period the CSD pin external capacitor is being charged from about 1.0V to about 3.0V and will be off when it is being discharged from about 3.0V to about 1.0V. The drive on/off operation protects the IC and the motor when the motor is physically constrained from moving. If a 0.47F capacitor is connected to the CSD pin, the IC will iterate an on/off cycle in which drive is on for about 0.4 seconds and off for about 5.5 seconds. While the motor is turning, the CSD pin voltage will be held at a certain voltage (that depends on the motor speed) by (a) a CSD pin external capacitor discharge operation based on about 10s discharge pulses generated internally in the IC when the Hall input IN1 switches (that is, on rising and falling edges on the FG output) and (b) a charge operation on that capacitor by a constant current of about 2.4A. Since the Hall input IN1 does not switch when the motor is physically constrained, the discharge pulses are not generated and the CSD pin external capacitor will be charged to about 3.0V by the constant current of about 2.4A. The motor constraint protection circuit operates when the capacitor reaches about 3.0V. The constraint protection operation will be released when the motor constraint is released. If the motor speed is extremely low, the CSD pin voltage during that motor rotation will be held at a comparatively high voltage, and if that voltage reaches about 3.0V, the constraint protection function will operate. Since the constraint protection function will operate if the Hall input IN1 frequency falls below about 10Hz, caution is required when using the motor constraint protection circuit with motors that will operate at low speeds. Connect the CSD pin to ground if the motor constraint protection circuit is not used.
No.A0287-12/24
LB11693H
Test Circuits ICC1, ICC2
Set the switch SW on when measuring ICC 1. Set the switch SW off when measuring ICC 2.
VOsat1 , VOsat2
Input the logic states shown in the table so that the output transistor for the corresponding phase is on. After setting the switch SW to position 1 for source transistor measurement or to position 2 for sink transistor measurement, proceed to the measurement itself. VOsat = VO SOURCE + VO SINK The figure shows the circuit used for measuring OUT3. Use similar circuits for measurement of the other phases.
No.A0287-13/24
LB11693H
IOleak
After setting the logic state so that the high and low side output transistors for the corresponding phase are in the off state, proceed to the measurement itself. Set the switch SW to position 1 for source transistor leakage measurement, and to position for sink transistor leakage measurement.
The figure shows the circuit used for measuring OUT3. Use similar circuits for measurement of the other phases.
VD1, VD2(EX, OUT1)
Input the logic states shown in the table so that the output transistor for the corresponding phase is off. Set IO to 0.7A when measuring VD1. Set IO to 1.5A when measuring VD2. The figure shows the circuit used for measuring OUT1. Use similar circuits for measurement of the other phases.
No.A0287-14/24
LB11693H
VREG, VREG1, VREG2
IB(HA)
The figure shows the circuit used for measuring IN3. Use similar circuits for measurement of the input pins for the other phases.
No.A0287-15/24
LB11693H
VOH(CSD), VOL(CSD)
ICSD1, ICSD2
Change VIN from 0.8V to 2.0V when measuring ICSD1. Change VIN from 3.3V to 2.0V when measuring ICSD2.
No.A0287-16/24
LB11693H
VSDL, VSDH, VSD
VRF
After manipulating the logic and setting values such that VO is less than 2V when VCC = VM, proceed to the measurement itself.
No.A0287-17/24
LB11693H
VIO(CTL), IB(CTL), VOH(CTL), VOL(CTL)
Refer to the figure below.
Set the switch SW to the 2 position when measuring VOH(CTL). Set the switch SW to the 1 position when measuring VOL(CTL).
VOH(PWM), VOL(PWM), V(PWM), ICHG(PWM)
Record the IPWM current when VPWM is changed from 1.0 to 2.1V as ICHG.
No.A0287-18/24
LB11693H
f(PWM)
VOL(RD), IL(RD)
After power is first applied, set VIN to the ground level. Set the switch SW to position 1 and measure VOL (RD). Then set VIN to 3.3V. Set the switch SW to position 2 and measure IL(RD).
No.A0287-19/24
LB11693H
VOL(FG), IL(FG)
After power is first applied, set VIN1 to 3V and VIN2 to 2V. Set the switch SW to position 1 and measure VOL(FG). Then set VIN1 to 2V and VIN2 to 3V. Set the switch SW to position 2 and measure IL(FG).
IFGFIL1, IFGFIL2
When measuring IFGFIL1, set VIN1 = 3V, VIN2 = 2V, and VFGIL from 0.5 to 2.0V. When measuring IFGFIL2, set VIN1 = 2V, VIN2 = 3V, and VFGIL from 3.5 to 2.0V.
No.A0287-20/24
LB11693H
VIH(S/S), VIL(S/S), VIO(S/S), VIS(S/S), IIH(S/S), IIL(S/S)
After manipulating the logic and setting values such that VO is less than 2V when VS/S = 0V, proceed to the measurement itself.
VIH(S/S) VIL(S/S)
IC operation is OK as long as the output voltage changes when VS/S is between 1.0 and 2.0V.
No.A0287-21/24
LB11693H
VIH(PI), VIL(PI), VIO(PI), VIS(PI), IIH(PI), IIL(PI)
After manipulating the logic and setting values such that VO is less than 2V when VPI = 0V, proceed to the measurement itself.
VIH(PI) VIL(PI)
IC operation is OK as long as the output voltage changes when VPI is between 1.0 and 2.0V.
No.A0287-22/24
LB11693H
VIH(FR), VIL(FR), VIO(FR), VIS(FR), IIH(FR), IIL(FR)
After manipulating the logic and setting values such that VO is less than 2V when VFR = 0V, proceed to the measurement itself.
VIH(FR) VIL(FR)
IC operation is OK as long as the output voltage changes when VFR is between 1.0 and 2.0V.
No.A0287-23/24
LB11693H
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of February, 2006. Specifications and information herein are subject to change without notice. PS No.A0287-24/24

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