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 SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
* * * *
3-State Buffer-Type Outputs Drive Bus-Lines Directly Bus-Structured Pinout Provide Extra Bus Driving Latches Necessary for Wider Address/Data Paths or Buses with Parity Buffered Control Inputs to Reduce DC Loading
* *
Power-Up High-Impedance State Package Options Include Plastic Small Outline Packages, Both Plastic and Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs Dependable Texas Instruments Quality and Reliability
*
description
These 10-bit latches feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type. The 'ALS841 and 'AS841 have noninverting data (D) inputs. The 'ALS842 and 'AS842 have inverting D inputs.
SN54ALS841, SN54AS841 . . . JT PACKAGE SN74ALS841, SN74AS841 . . . DW OR NT PACKAGE (TOP VIEW) SN54ALS841, SN54AS841 . . . FK PACKAGE SN74ALS841, SN74AS841 . . . FN PACKAGE (TOP VIEW)
12
13
SN54ALS842, SN54AS842 . . . JT PACKAGE SN74ALS842, SN74AS842 . . . DW OR NT PACKAGE (TOP VIEW)
SN54ALS842, SN54AS842 . . . FK PACKAGE SN74ALS842, SN74AS842 . . . FN PACKAGE (TOP VIEW)
12
13
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
9D 10D GND NC C 10Q 9Q
Copyright (c) 1986, Texas Instruments Incorporated 5BASIC
OC 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D GND
1 2 3 4 5 6 7 8 9 10 11
24 23 22 21 20 19 18 17 16 15 14
VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q C
2D 1D OC NC VCC 1Q 2Q 3D 4D 5D NC 6D 7D 8D
5 6 7 8 9 10 4 3 2 1 28 27 26 25 24 23 22 21 20 11 19 12 13 14 15 16 17 18
9D 10D GND NC C 10Q 9Q 3Q 4Q 5Q NC 6Q 7Q 8Q
OC 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D GND
1 2 3 4 5 6 7 8 9 10 11
24 23 22 21 20 19 18 17 16 15 14
VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q C
2D 1D OC NC VCC 1Q 2Q 3D 4D 5D NC 6D 7D 8D
5 6 7 8 9 10 4 3 2 1 28 27 26 25 24 23 22 21 20 11 19 12 13 14 15 16 17 18
3Q 4Q 5Q NC 6Q 7Q 8Q
1
SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
description (continued)
A buffered output control (OC) input can be used to place the ten outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pullup components. The output control does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are off. The - 1 versions of the SN74ALS841 and SN74ALS842 parts are identical to the standard versions except that the recommended maximum IOL is increased to 48 mA. There are no - 1 versions of the SN54ALS841 and SN54ALS842. The SN54ALS841, SN54AS841, SN54ALS842, and SN54AS842 are characterized for operation over the full military temperature range of - 55C to 125C. The SN74ALS841, SN74AS841, SN74ALS842, and SN74AS842 are characterized for operation from 0C to 70C. Function Tables
'ALS841, 'AS841 INPUTS OC C L H L H L L H X D H L X X OUTPUT Q H L Q0 Z 'ALS842, 'AS842 INPUTS OC C L H L H L L H X D H L X X OUTPUT Q L H Q0 Z
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ALS841, SN54AS841, SN74ALS841, SN74AS841 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
'ALS841, 'AS841 logic symbol
OC C 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D 1 13 2 3 4 5 6 7 8 9 10 11 EN C1 1D 23 22 21 20 19 18 17 16 15 14 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q
'ALS841, 'AS841 logic diagram (positive logic)
OC C 1 13 C1 1D 2 1D C1 2D 3 1D C1 3D 4 1D C1 4D 5 1D C1 5D 6 1D C1 6D 7 1D C1 7D 8 1D C1 8D 9 1D C1 9D 10 1D C1 10D 11 1D 23 1Q
22
2Q
21
3Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and EC Publication 617-12.
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
9Q
14
10Q
Pin numbers shown are for DW, JT, and NT packages.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
'ALS842, 'AS842 logic symbol
OC C 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D 1 13 2 3 4 5 6 7 8 9 10 11 EN C1 1D 23 22 21 20 19 18 17 16 15 14 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q
'ALS842, 'AS842 logic diagram (positive logic)
OC C 1 13 C1 1D 2 1D C1 2D 3 1D C1 3D 4 1D C1 4D 5 1D C1 5D 6 1D C1 6D 7 1D C1 7D 8 1D C1 8D 9 1D C1 9D 10 1D C1 10D 11 1D 23 1Q
22
2Q
21
3Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
9Q
14
10Q
Pin numbers shown are for DW, JT, and NT packages.
absolute maximum ratings over operating free-air temperature range unless otherwise noted
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range: SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 . . . . . . - 55C to 125C SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 . . . . . . . . . . 0C to 70C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ALS841, SN74ALS841 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
recommended operating conditions
SN54ALS841 MIN VCC VIH VIL IOH IOL tw tsu Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level Low level output current Pulse duration, C high Setup time, data before C 25 16 4.5 2 0.7 -1 12 20 10 5 0 70 NOM 5 MAX 5.5 SN74ALS841 MIN 4.5 2 0.8 - 2.6 24 48 NOM 5 MAX 5.5 UNIT V V V mA mA ns ns ns C
th Hold time,, data after C 7 TA Operating free-air temperature - 55 125 The 48-mA limit applies only to the - 1 versions and only if VCC is maintained between 4.75 V and 5.25 V.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.75 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V II = - 18 mA IOH = - 0.4 mA IOH = - 1 mA IOH = - 2.6 mA IOL = 12 mA IOL = 24 mA IOL = 48 mA (-1 versions) VO = 2. 7 V VO = 0.4 V VI = 7 V VO = 2.7 V VI = 0 .4 V VO = 2.25 V Outputs high Outputs low Outputs disabled - 30 19 38 23 MIN SN54ALS841 TYP MAX - 1.2 VCC - 2 2.4 VCC - 2 3.3 2.4 0.25 0.4 3.2 0.25 0.35 0.35 20 - 20 0.1 20 - 0.1 - 112 30 62 40 - 30 19 38 23 0.4 0.5 0.5 20 - 20 0.1 20 - 0.1 - 112 30 62 40 mA A A mA A mA mA V V MIN SN74ALS841 TYP MAX - 1.2 UNIT V
VOL IOZH IOZL II IIH IIL IO ICC
All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
5
SN54ALS841, SN74ALS841 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
'ALS841 switching characteristics (see Note 1)
VCC = 5 V, CL = 50 pF, R1 = 500 , PARAMETER FROM (INPUT) TO (OUTPUT) R2 = 500 , TA = 25C ALS841 MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ D C Q Q Q Q TYP 8.5 8.5 14 17 7.5 7.5 6 7 MAX 11 11 18 23 10 10 8 9 VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN54ALS841 SN74ALS841 MIN 2 2 7 8 2 2 2 2 MAX 15 15 25 30 14 14 12 14 MIN 2 2 7 8 2 2 2 2 MAX 13 13 21 26 12 12 10 12 ns ns ns ns UNIT
OC OC
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ALS842, SN74ALS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
recommended operating conditions
SN54ALS842 MIN VCC VIH VIL IOH IOL tw tsu Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level Low level output current Pulse duration, C high Setup time, data before C 25 16 4.5 2 0.7 -1 12 20 10 5 0 70 NOM 5 MAX 5.5 SN74ALS842 MIN 4.5 2 0.8 - 2.6 24 48 NOM 5 MAX 5.5 UNIT V V V mA mA ns ns ns C
th Hold time,, data after C 7 TA Operating free-air temperature - 55 125 The 48-mA limit applies only to the - 1 versions and only if VCC is maintained between 4.75 V and 5.25 V.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.75 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V II = - 18 mA IOH = - 0.4 mA IOH = - 1 mA IOH = - 2.6 mA IOL = 12 mA IOL = 24 mA IOL = 48 mA (- 1 versions) VO = 2. 7 V VO = 0.4 V VI = 7 V VO = 2.7 V VI = 0.4 V VO = 2.25 V Outputs high Outputs low Outputs disabled - 30 20 48 27 MIN SN54ALS842 TYP MAX - 1.2 VCC - 2 2.4 VCC - 2 3.3 2.4 0.25 0.4 3.2 0.25 0.35 0.35 20 - 20 0.1 20 - 0.1 - 112 35 74 44 - 30 20 48 27 0.4 0.5 0.5 20 - 20 0.1 20 - 0.1 - 112 35 74 44 mA A A mA A mA mA V V MIN SN74ALS842 TYP MAX - 1.2 UNIT V
VOL IOZH IOZL II IIH IIL IO ICC
All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
7
SN54ALS842, SN74ALS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
'ALS842 switching characteristics (see Note 1)
VCC = 5 V, CL = 50 pF, R1 = 500 , PARAMETER FROM (INPUT) TO (OUTPUT) R2 = 500 , TA = 25C 'ALS842 MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ D C Q Q Q Q TYP 11 8 17 13 8 8 6 7 MAX 15 11 23 18 10 11 8 9 VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN54ALS842 SN74ALS842 MIN 4 3 8 6 2 2 1 2 MAX 22 17 31 24 14 14 12 14 MIN 4 3 8 6 2 2 1 2 MAX 18 13 27 20 12 12 10 12 ns ns ns ns UNIT
OC OC
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54AS841, SN54AS842, SN74AS841, SN54AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
recommended operating conditions
SN54AS841 SN54AS842 MIN VCC VIH VIL IOH IOL tw tsu th TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Pulse duration, C high Setup time, data before C Hold time,, data after C Operating free-air temperature 5 3.5 3.5 - 55 125 4.5 2 0.8 - 24 32 4 2.5 2.5 0 70 NOM 5 MAX 5.5 SN74AS841 SN74AS842 MIN 4.5 2 0.8 - 24 48 NOM 5 MAX 5.5 V V V mA mA ns ns ns C UNIT
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54AS841 PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, 'AS841 ICC 'AS842 VCC = 5 5 V 5.5 II = - 18 mA IOH = - 2 mA IOH = - 15 mA IOH = - 24 mA IOL = 32 mA IOL = 48 mA VO= 2. 7 V VO = 0.4 V VI = 7 V VO = 2.7 V VI = 0 .4 V VO = 2.25 V Outputs high Outputs low Outputs disabled Outputs high Outputs low Outputs disabled - 30 36 58 56 38 60 58 SN54AS842 MIN TYP MAX - 1.2 VCC - 2 2.4 2 0.25 0.5 0.35 50 - 50 0.1 20 - 0.5 - 112 60 94 92 62 97 95 - 30 36 58 56 38 60 58 0.5 50 - 50 0.1 20 - 0.5 - 112 60 94 92 62 97 mA 3.2 VCC - 2 2.4 2 V A A mA A mA mA 3.2 SN74AS841 MIN SN74AS842 TYP MAX - 1.2 UNIT V V
VOL IOZH IOZL II IIH IIL IO
95 All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
9
SN54AS841, SN54AS842, SN74AS841, SN54AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B - D2910, DECEMBER 1983 - REVISED MAY 1986
'AS841 switching characteristics (see Note 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , PARAMETER FROM (INPUT) TO (OUTPUT) R2 = 500 , TA = MIN to MAX SN54AS841 SN74AS841 MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ D C Q Q Q Q 1 1 2 2 2 2 1 1 MAX 8.5 10 13 13 13.5 15 10 10 MIN 1 1 2 2 2 2 1 1 MAX 6.5 9 12 12 10.5 13.5 8 8 ns ns ns ns UNIT
OC OC
'AS842 switching characteristics (see Note 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, PARAMETER FROM (INPUT) R1 = 500 , TO (OUTPUT) R2 = 500 , TA = MIN to MAX SN54AS842 SN74AS842 MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ D C Q Q Q Q 1 1 2 2 2 2 1 1 MAX 11 10 13 13 14.5 15 10 10 MIN 1 1 2 2 2 2 1 1 MAX 8.5 9 12 12 12 12.5 8 8 ns ns ns ns UNIT
OC OC
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
10
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1998, Texas Instruments Incorporated


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