View SCDS010I_1000450.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

SN74CBT16233 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS010I - MAY 1995 - REVISED MAY 2000
D D D
5- Switch Connection Between Two Ports TTL-Compatible Input Levels Package Options Include Plastic Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV), and Shrink Small-Outline (DL) Packages
DGG, DGV, OR DL PACKAGE (TOP VIEW)
description
The SN74CBT16233 is a 16-bit 1-of-2 FET multiplexer/demultiplexer used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single path. This device can be used for memory interleaving, where two different banks of memory need to be addressed simultaneously. The device can be used as two 8-bit to 16-bit multiplexers or as one 16-bit to 32-bit multiplexer. Two select (SEL1 and SEL2) inputs control the data flow. When the TEST inputs are asserted, the A port is connected to both the B1 and the B2 ports. SEL1, SEL2, and the TEST inputs can be driven with a 5-V CMOS, a 5-V TTL, or a low-voltage TTL driver. This device is designed so it does not have through current when switching directions. The SN74CBT16233 is characterized operation from -40C to 85C. for
1A 2B1 2B2 3A 4B1 4B2 5A 6B1 6B2 7A 8B1 8B2 GND VCC 9A 10B1 10B2 11A 12B1 12B2 13A 14B1 14B2 15A 16B1 16B2 TEST1 TEST2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1B1 1B2 2A 3B1 3B2 4A 5B1 5B2 6A 7B1 7B2 8A GND VCC 9B1 9B2 10A 11B1 11B2 12A 13B1 13B2 14A 15B1 15B2 16A SEL1 SEL2
FUNCTION TABLE (each multiplexer/demultiplexer) INPUTS SEL L H X TEST L L H FUNCTION A = B1 A = B2 A = B1 and A = B2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
1
SN74CBT16233 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS010I - MAY 1995 - REVISED MAY 2000
logic diagram (positive logic)
1A 1 56 1B1 55 1B2 9A 15 42 9B1 41 9B2
8A
45
11
8B1
16A
31
25
16B1
12 8B2
26 16B2
SEL1
30
SEL2
29
TEST1
27
TEST2
28
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN VCC VIH VIL TA Supply voltage High-level control input voltage Low-level control input voltage Operating free-air temperature 0 4.75 2 0.8 70 MAX 5.25 UNIT V V V C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN74CBT16233 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS010I - MAY 1995 - REVISED MAY 2000
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK II ICC ICC Ci Cio(OFF) ron VCC = 4.75 V, VCC = 0, VCC = 5.25 V, VCC = 5.25 V, Control inputs Control inputs VCC = 5.5 V, VI = 3 V or 0 VO = 3 V or 0 VCC = 4.75 V VI = 0 II = 64 mA II = 30 mA TEST CONDITIONS II = -18 mA VI = 5.25 V VI = 5.25 V or GND IO = 0, One input at 3.4 V, VI = VCC or GND Other inputs at VCC or GND 4.5 4 5 5 7 7 MIN TYP MAX -1.2 10 1 3 2.5 UNIT V A A A mA pF pF
VI = 2.4 V, II = 15 mA 7 12 All typical values are at VCC = 5 V, TA = 25C. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER tpd tpd ten tdis FROM (INPUT) A or B SEL TEST or SEL TO (OUTPUT) B or A A B 1.6 1.3 MIN MAX 0.25 5.3 5.2 UNIT ns ns ns
TEST or SEL B 1 5.3 ns The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN74CBT16233 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS010I - MAY 1995 - REVISED MAY 2000
PARAMETER MEASUREMENT INFORMATION
7V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 Output Control (low-level enabling) tPZL Output Waveform 1 S1 at 7 V (see Note B) tPZH VOH Output 1.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) TEST tpd tPLZ/tPZL tPHZ/tPZH S1 Open 7V Open
3V 1.5 V 1.5 V 0V tPLZ 3.5 V 1.5 V tPHZ VOH VOH - 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOL + 0.3 V VOL
LOAD CIRCUIT
3V Input 1.5 V 1.5 V 0V tPLH tPHL
1.5 V
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 2000, Texas Instruments Incorporated

▲Up To Search▲

Price & Availability of SCDS010I

	To Download SCDS010I Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .