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SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
D D D D D D D D
Members of the Texas Instruments WidebusTM Family State-of-the-Art EPIC-BTM BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25C Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout High-Drive Outputs (-32-mA IOH, 64-mA IOL) Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
SN54ABT16470 . . . WD PACKAGE SN74ABT16470 . . . DGG OR DL PACKAGE (TOP VIEW)
description
The 'ABT16470 are 16-bit registered transceivers that contain two sets of D-type flip-flops for temporary storage of data flowing in either direction. The 'ABT16470 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate clock (CLKAB or CLKBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. To avoid false clocking of the flip-flops, clock enable (CLKEN) should not be switched from high to low while CLK is high.
1OEAB 1CLKAB 1CLKENAB GND 1A1 1A2 VCC 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2CLKENAB 2CLKAB 2OEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1CLKBA 1CLKENBA GND 1B1 1B2 VCC 1B3 1B4 1B5 GND 1B6 1B7 1B8 2B1 2B2 2B3 GND 2B4 2B5 2B6 VCC 2B7 2B8 GND 2CLKENBA 2CLKBA 2OEBA
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16470 is characterized for operation over the full military temperature range of -55C to 125C. The SN74ABT16470 is characterized for operation from -40C to 85C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus and EPIC-B are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Copyright (c) 1997, Texas Instruments Incorporated
* DALLAS, TEXAS 75265
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SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
FUNCTION TABLE INPUTS CLKENAB H X L L L CLKAB X X L OEAB X H L L L A X X X L H OUTPUT B Z Z B0 L
H A-to-B data flow is shown: B-to-A flow is similar but uses CLKENBA, CLKBA, and OEBA. Output level before the indicated steady-state input conditions were established
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POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
logic symbol
1OEBA 1CLKENBA 1CLKBA 1OEAB 1CLKENAB 1CLKAB 2OEBA 2CLKENBA 2CLKBA 2OEAB 2CLKENAB 2CLKAB 56 54 55 1 3 2 29 31 30 28 26 27 1EN3 G1 1C5 2EN4 G2 2C6 7EN9 G7 7C11 8EN10 G8 8C12 1 6D 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 6 8 9 10 12 13 14 15 12D 2A2 2A3 2A4 2A5 2A6 2A7 2A8 16 17 19 20 21 23 24 1 1 11D 10 41 40 38 37 36 34 33 2B2 2B3 2B4 2B5 2B6 2B7 2B8 1 52
1A1
5
5D 4
1B1
51 49 48 47 45 44 43 42
1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
logic diagram (positive logic)
1OEBA 1CLKENBA 1CLKBA 1OEAB 1CLKENAB 1CLKAB 1A1 5 56 54 55 1 3 2 C1 1D 52 1B1
C1 1D
To Seven Other Channels
2OEBA 2CLKENBA 2CLKBA 2OEAB 2CLKENAB 2CLKAB 2A1
29 31 30 28 26 27 C1 15 1D 42 2B1
C1 1D
To Seven Other Channels
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POST OFFICE BOX 655303
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SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . -0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT16470 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT16470 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81C/W DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51.
recommended operating conditions (see Note 3)
SN54ABT16470 MIN VCC VIH VIL VI IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Outputs enabled -55 0 4.5 2 0.8 VCC -24 48 10 125 -40 0 MAX 5.5 SN74ABT16470 MIN 4.5 2 0.8 VCC -32 64 10 85 MAX 5.5 UNIT V V V V mA mA ns/V C
TA Operating free-air temperature NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
5
SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, VCC = 5 V, VCC = 4 5 V 4.5 VOL Vhys II IOZH IOZL Ioff ICEX IO ICC A or B ports Control inputs A or B ports VCC = 5 5 V 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 0, VCC = 5.5 V, VO = 5.5 V VCC = 5.5 V, VCC = 5.5 V, IO = 0, VI = VCC or GND VI = VCC or GND VO = 2.7 V VO = 0.5 V VI or VO 4.5 V Outputs high VO = 2.5 V Outputs high Outputs low Outputs disabled -50 -100 VCC = 4 5 V 4.5 II = -18 mA IOH = -3 mA IOH = -3 mA IOH = -24 mA IOH = -32 mA IOL = 48 mA IOL = 64 mA 100 1 100 50 -50 100 50 -200 2 35 2 0.5 3 8.5 -50 50 -200 2 35 2 0.5 -50 1 100 50 -50 1 100 50 -50 100 50 -200 2 35 2 0.5 mA pF pF mA MIN 2.5 3 2 2* 0.55 0.55* 0.55 0.55 TA = 25C TYP MAX -1.2 2.5 3 2 2 V mV A A A A A mA SN54ABT16470 MIN MAX -1.2 2.5 3 V SN74ABT16470 MIN MAX -1.2 UNIT V
VOH
ICC Ci Cio Control inputs A or B ports
VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V
* On products compliant to MIL-PRF-38535, this parameter does not apply. All typical values are at VCC = 5 V. The parameters IOZH and IOZL include the input leakage current. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1)
VCC = 5 V, , TA = 25C MIN fclock tw# tsu th Clock frequency Pulse duration, CLKAB or CLKBA high or low Setup time, data before CLKAB or CLKBA 0 3.3 4 1 MAX 150 SN54ABT16470 MIN 0 3.3 4 1 MAX 150 SN74ABT16470 MIN 0 3.3 4 1 MAX 150 MHz ns ns ns UNIT
Hold time, data after CLKAB or CLKBA # This parameter is characterized, but not production tested.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
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POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25C MIN 150 CLK A or B A or B A or B A or B A or B 1.4 1.3 1 1.2 1.9 1.6 1 1.2 1.7 1.5 3.1 3.2 3.1 3.6 3.7 3.3 3.4 3.9 3.9 3.6 4.8 4.6 4.3 5.8 4.9 4.8 4.6 6 5.2 5.3 TYP MAX SN54ABT16470 MIN 150 1.4 1.3 1 1.2 1.9 1.6 1 1.2 1.7 1.5 5.1 5.1 5 6.9 6 5.4 5.8 7.3 6.2 5.5 MAX SN74ABT16470 MIN 150 1.4 1.3 1 1.2 1.9 1.6 1 1.2 1.7 1.5 4.9 4.9 4.9 6.8 5.5 5.3 5.7 7.2 5.8 5.4 MAX MHz ns ns ns ns ns UNIT
OE OE CLKEN CLKEN
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
7
SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SCBS085E - FEBRUARY 1991 - REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
500 S1 7V Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 7V Open
From Output Under Test CL = 50 pF (see Note A)
LOAD CIRCUIT tw 3V Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION
3V Timing Input 1.5 V 0V tsu Data Input 1.5 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V Output Control tPZL Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) tPZH 1.5 V VOH - 0.3 V VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING tPLZ 1.5 V tPHZ 3.5 V VOL + 0.3 V VOL 1.5 V 1.5 V 0V th 3V 1.5 V 0V
3V Input tPLH Output tPHL 1.5 V 1.5 V 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL tPLH VOH Output 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright (c) 1998, Texas Instruments Incorporated

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