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74ACT11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C - JULY 1987 - REVISED APRIL 1996
D D D D D
Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125C Package Options Include Plastic Small-Outline Packages (D), Plastic Shrink Small-Outline Packages (DB), Plastic Thin Shrink Small-Outline Packages (PW), and Standard Plastic 300-mil DIPs (N)
D, DB, N, OR PW PACKAGE (TOP VIEW)
1A 1Y 2Y GND GND 3Y 4Y 4B
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
1B 2A 2B VCC VCC 3A 3B 4A
description
This device contains four independent 2-input OR gates. It performs the Boolean function Y = A + B or Y
+ A * B in positive logic.
The 74ACT11032 is characterized for operation from -40C to 85C.
FUNCTION TABLE (each gate) INPUTS A H X L B X H L OUTPUT Y H H L
logic symbol
1A 1B 2A 2B 3A 3B 4A 4B 1 16 15 14 11 10 9 8 7 4Y 6 3Y 3 2Y
logic diagram (positive logic)
2 1A 1Y 1B 2A 2B 3A 3B 4A 4B 4Y 3Y 2Y 1Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
1
74ACT11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C - JULY 1987 - REVISED APRIL 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 6V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Maximum power dissipation at TA = 55C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . . 1.3 W DB package . . . . . . . . . . . . . . . . . . 0.55 W N package . . . . . . . . . . . . . . . . . . . . 1.1 W PW package . . . . . . . . . . . . . . . . . . . 0.5 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.
recommended operating conditions
MIN VCC VIH VIL VI VO IOH IOL TA Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature 0 -40 0 0 4.5 2 0.8 VCC VCC - 24 24 10 85 MAX 5.5 UNIT V V V V V mA mA ns/ V C
Dt/Dv
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
74ACT11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C - JULY 1987 - REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER IOH = -50 mA 50 VOH IOH = -24 mA 24 IOH = -75 mA IOL = 50 mA VOL IOL = 24 mA IOL = 75 mA VI = VCC or GND VI = VCC or GND, IO = 0 One input at 3.4 V, Other inputs at GND or VCC TEST CONDITIONS VCC 4.5 V 5.5 V 4.5 V 5.5 V 5.5 V 4.5 V 5.5 V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 0.1 4 0.9 0.1 0.1 0.36 0.36 MIN 4.4 5.4 3.94 4.94 TA = 25C TYP MAX MIN 4.4 5.4 3.8 4.8 3.85 0.1 0.1 0.44 0.44 1.65 1 40 1 V V MAX UNIT
II ICC
mA mA
mA pF
DICC
Ci VI = VCC or GND 5V 3.5 Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
switching characteristics over recommended ranges of supply voltage and free-air temperature (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL FROM (INPUT) A or B TO (OUTPUT) Y MIN 1.5 1.5 TA = 25C TYP MAX 6.2 4.9 8.1 7.4 MIN 1.5 1.5 MAX 9 8 UNIT ns
operating characteristics, VCC = 5 V, TA = 25C
PARAMETER Cpd Power dissipation capacitance per gate TEST CONDITIONS CL = 50 pF, f = 1 MHz TYP 29 UNIT pF
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
74ACT11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS008C - JULY 1987 - REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
From Output Under Test CL = 50 pF (see Note A) 500 Output 50% VCC Input (see Note B) tPLH 3V 1.5 V 1.5 V 0V tPHL VOH 50% VCC VOL
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
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Copyright (c) 1998, Texas Instruments Incorporated

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