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LM2415 Monolithic Triple 5.5 ns CRT Driver
December 1998
LM2415 Monolithic Triple 5.5 ns CRT Driver
General Description
The LM2415 is an integrated high voltage CRT driver circuit designed for use in color monitor applications. The IC contains three high input impedance, wide band amplifiers which directly drive the RGB cathodes of a CRT. Each channel has its gain internally set to -14 and can drive CRT capacitive loads as well as resistive loads present in other applications, limited only by the package's power dissipation. The IC is packaged in an industry standard 11-lead TO-220 molded plastic power package. See Thermal Considerations section. n Well matched with LM1279 and LM1282 video preamps n 0V to 5V input range n Stable with 0 pF-20 pF capacitive loads and inductive peaking networks n Convenient TO-220 staggered lead package style n Standard LM240X Family Pinout which is designed for easy PCB layout
Applications
n 1280 x 1024 Displays up to 75 Hz Refresh n Pixel clock frequencies up to 135 MHz n Monitors using video blanking
Features
n Dissipates approximately 45% less power than the LM2405
Schematic and Connection Diagrams
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Note: Tab is at GND
Top View
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FIGURE 1. Simplified Schematic Diagram (One Channel)
(c) 1998 National Semiconductor Corporation
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Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage, (VCC) Bias Voltage, (VBB) Input Voltage, (VIN) Storage Temperature Range, (TSTG) +90V +16V 0V to 6V -65C to +150C
Lead Temperature (Soldering, <10 sec.) ESD Tolerance, Human Body Model Machine Model
300C 2 kV 250V
Operating Ranges (Note 2)
VCC +60V to +85V +8V to +15V VBB +0V to +5V VIN +15V to +75V VOUT Case Temperature -20C to +100C Do not operate the part without a heat sink.
Electrical Characteristics
(See Figure 2 for Test Circuit) Unless otherwise noted: VCC = +80V, VBB = +12V, CL = 8 pF, TC = 50C DC Tests: VIN = +2.8 VDC AC Tests: Output = 40 VPP (25V to 65V) at 1 MHz. Symbol ICC IBB VOUT AV AV LE tR tF OS Parameter Supply Current Bias Current DC Output Voltage DC Voltage Gain Gain Matching Linearity Error Rise Time Fall Time Overshoot Condition Per Channel, No Input Signal, No Output Load All Three Channels No AC Input Signal, VIN = 1.35V No AC Input Signal (Note 4), No AC Input Signal (Notes 4, 5), No AC Input Signal (Note 6), 10% to 90% (Note 6), 90% to 10% (Note 6) 62 -12 LM2415 Min Typ 13 14 65 -14 1.0 8 5.5 6.0 5 68 -16 dB % ns ns % Max Units mA mA VDC
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may change when the device is not operated under the listed test conditions. Note 3: All voltages are measured with respect to GND, unless otherwise specified. Note 4: Calculated value from Voltage Gain test on each channel. Note 5: Linearity Error is the variation in dc gain from VIN = 1.0V to VIN = 4.5V. Note 6: Input from signal generator: tr, tf < 1 ns.
AC Test Circuit
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Note: 8 pF load includes parasitic capacitance.
FIGURE 2. Test Circuit (One Channel)
Figure 2 shows a typical test circuit for evaluation of the LM2415. This circuit is designed to allow testing of the LM2415 in a 50 environment without the use of an expensive FET probe. The two 2490 resistors at the output form a 200:1 voltage divider when connected to a 50 load.
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Typical Performance Characteristics
(25V-65V), Test Circuit - Figure 2 unless otherwise specified)
(VCC = +80 VDC, VBB = +12 VDC, CL = 8 pF, VOUT = 40VPP
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FIGURE 3. VOUT vs VIN
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FIGURE 6. Power Dissipation vs Frequency
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FIGURE 4. Speed vs Temperature
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FIGURE 7. Speed vs Offset
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FIGURE 5. LM2415 Pulse Response
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FIGURE 8. Speed vs Load Capacitance
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Theory of Operation
The LM2415 is a high voltage monolithic three channel CRT driver suitable for high resolution display applications. The LM2415 operates with 80V and 12V power supplies. The part is housed in the industry standard 11-lead TO-220 molded plastic power package. The circuit diagram of the LM2415 is shown in Figure 1. The PNP emitter follower, Q5, provides input buffering. Q1 and Q2 form a fixed gain cascode amplifier with resistors R1 and R2 setting the gain at -14. Emitter followers Q3 and Q4 isolate the high output impedance of the cascode stage from the capacitance of the CRT cathode which decreases the sensitivity of the device to load capacitance. Q6 provides biasing to the output emitter follower stage to reduce crossover distortion at low signal levels.
POWER SUPPLY BYPASS Since the LM2415 is a wide bandwidth amplifier, proper power supply bypassing is critical for optimum performance. Improper power supply bypassing can result in large overshoot, ringing or oscillation. A 0.1 F capacitor should be connected from the supply pin, VCC, to ground, as close to the supply and ground pins as is practical. Additionally, a 10 F to 100 F electrolytic capacitor should be connected from the supply pin to ground. The electrolytic capacitor should also be placed reasonably close to the LM2415's supply and ground pins. A 0.1 F capacitor should be connected from the bias pin, VBB, to ground, as close as is practical to the part. ARC PROTECTION During normal CRT operation, internal arcing may occasionally occur. Spark gaps, in the range of 200V, connected from the CRT cathodes to CRT ground will limit the maximum voltage, but to a value that is much higher than allowable on the LM2415. This fast, high voltage, high energy pulse can damage the LM2415 output stage. The application circuit shown in Figure 9 is designed to help clamp the voltage at the output of the LM2415 to a safe level. The clamp diodes, D1 and D2, should have a fast transient response, high peak current rating, low series impedance and low shunt capacitance. FDH400 or equivalent diodes are recommended. Do not use 1N4148 diodes for the clamp diodes. D1 and D2 should have short, low impedance connections to VCC and ground respectively. The cathode of D1 should be located very close to a separately decoupled bypass capacitor (C3 in Figure 9). The ground connection of D2 and the decoupling capacitor should be very close to the LM2415 ground. This will significantly reduce the high frequency voltage transients that the LM2415 would be subjected to during an arcover condition. Resistor R2 limits the arcover current that is seen by the diodes while R1 limits the current into the LM2415 as well as the voltage stress at the outputs of the device. R2 should be a 1/2W solid carbon type resistor. R1 can be a 1/4W metal or carbon film type resistor. Having large value resistors for R1 and R2 would be desirable, but this has the effect of increasing rise and fall times. Inductor L1 is critical to reduce the initial high frequency voltage levels that the LM2415 would be subjected to. The inductor will not only help protect the device but it will also help minimize rise and fall times as well as minimize EMI. For proper arc protection, it is important to not omit any of the arc protection components shown in Figure 9.
Figure 2 shows a typical test circuit for evaluation of the LM2415. This circuit is designed to allow testing of the LM2415 in a 50 environment without the use of an expensive FET probe. In this test circuit, two low inductance resistors in series totaling 4.98 k form a 200:1 wideband, low capacitance probe when connected to a 50 coaxial cable and a 50 load (such as a 50 oscilloscope input). The input signal from the generator is ac coupled to the base of Q5.
Application Hints
INTRODUCTION National Semiconductor (NSC) is committed to provide application information that assists our customers in obtaining the best performance possible from our products. The following information is provided in order to support this commitment. The reader should be aware that the optimization of performance was done using a specific printed circuit board designed at NSC. Variations in performance can be realized due to physical changes in the printed circuit board and the application. Therefore, the designer should know that component value changes may be required in order to optimize performance in a given application. The values shown in this document can be used as a starting point for evaluation purposes. When working with high bandwidth circuits, good layout practices are also critical to achieving maximum performance. IMPORTANT INFORMATION The LM2415 performance is targeted for the SXGA (1280 x 1024, 75 Hz refresh) resolution market. The application circuits shown in this document to optimize performance and to protect against damage from CRT arc-over are designed specifically for the LM2415. If another member of the LM240X family is used, please refer to its datasheet.
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Application Hints
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FIGURE 9. One Channel of the LM2415 with the Recommended Application Circuit OPTIMIZING TRANSIENT RESPONSE Referring to Figure 9, there are three components (R1, R2 and L1) that can be adjusted to optimize the transient response of the application circuit. Increasing the values of R1 and R2 will slow the circuit down while decreasing overshoot. Increasing the value of L1 will speed up the circuit as well as increase overshoot. It is very important to use inductors with very high self-resonant frequencies, preferably above 300 MHz. Ferrite core inductors from J.W. Miller Magnetics (part # 78FR39K) were used for optimizing the performance of the device in the NSC application board. The values shown in Figure 9 can be used as a good starting point for the evaluation of the LM2415. The NSC demo board also has a position open to add a resistor in parallel with L1. This resistor can be used to help control overshoot. Using variable resistors for R1 and the parallel resistor will simplify finding the values needed for optimum performance in a given application. Once the optimum values are determined the variable resistors can be replaced with fixed values. EFFECT OF LOAD CAPACITANCE needed to determine the heat sink requirement for the application. The designer should note that if the load capacitance is increased the AC component of the total power dissipation will also increase. The LM2415 case temperature must be maintained below 100C. If the maximum expected ambient temperature is 70C and the maximum power dissipation is 8.7W (from Figure 6, 72.5 MHz bandwidth) then a maximum heat sink thermal resistance can be calculated:
This example assumes a capacitive load of 8 pF and no resistive load. TYPICAL APPLICATION A typical application of the LM2415 is shown in Figure 10. Used in conjunction with an LM1279, a complete video channel from monitor input to CRT cathode can be achieved. Performance is ideal for 1280 x 1024 resolution displays with pixel clock frequencies up to 135 MHz. Figure 10 is the schematic for the NSC demonstration board that can be used to evaluate the LM1279/2415 combination in a monitor. PC BOARD LAYOUT CONSIDERATIONS For optimum performance, an adequate ground plane, isolation between channels, good supply bypassing and minimizing unwanted feedback are necessary. Also, the length of the signal traces from the preamplifier to the LM2415 and from the LM2415 to the CRT cathode should be as short as possible. The following references are recommended: Ott, Henry W., "Noise Reduction Techniques in Electronic Systems", John Wiley & Sons, New York, 1976. "Video Amplifier Design for Computer Monitors", National Semiconductor Application Note 1013. Pease, Robert A., "Troubleshooting Analog Circuits", Butterworth-Heinemann, 1991. Because of its high small signal bandwidth, the part may oscillate in a monitor if feedback occurs around the video channel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be shielded, and input circuit wiring should be spaced as far as possible from output circuit wiring.
Figure 8 shows the effect of increased load capacitance on the speed of the device. This demonstrates the importance of knowing the load capacitance in the application.
EFFECT OF OFFSET
Figure 7 shows the variation in rise and fall times when the output offset of the device is varied from 40 VDC to 50 VDC. The rise time shows a maximum variation relative to the center data point (45 VDC) of about 13%. The fall time shows a maximum variation of about 3% relative to the center data point.
THERMAL CONSIDERATIONS
Figure 4 shows the performance of the LM2415 in the test circuit shown in Figure 2 as a function of case temperature. The figure shows that the rise time of the LM2415 increases by approximately 12% as the case temperature increases from 50C to 100C. This corresponds to a speed degradation of 2.4% for every 10C rise in case temperature. There is a negligible change in fall time vs. temperature in the test circuit. Figure 6 shows the maximum power dissipation of the LM2415 vs Frequency when all three channels of the device are driving an 8 pF load with a 40 Vp-p alternating one pixel on, one pixel off signal. The graph assumes a 72% active time (device operating at the specified frequency) which is typical in a monitor application. The other 28% of the time the device is assumed to be sitting at the black level (65V in this case). This graph gives the designer the information
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Application Hints
NSC Demonstration Board
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Figure 11 shows routing and component placement on the NSC LM1279/240X demonstration board. The schematic of the board is shown in Figure 10. This board provides a good example of a layout that can be used as a guide for future layouts. Note the location of the following components: * C55 -- VCC bypass capacitor, located very close to pin 6 and ground pins * C43, C44 -- VBB bypass capacitors, located close to pin 10 and ground * C53-C55 -- VCC bypass capacitors, near LM2415 and VCC clamp diodes. Very important for arc protection. The routing of the LM2415 outputs to the CRT is very critical to achieving optimum performance. Figure 12 shows the routing and component placement from pin 1 of the LM2415
to the blue cathode. Note that the components are placed so that they almost line up from the output pin of the LM2415 to the blue cathode pin of the CRT connector. This is done to minimize the length of the video path between these two components. Note also that D14, D15, R29 and D13 are placed to minimize the size of the video nodes that they are attached to. This minimizes parasitic capacitance in the video path and also enhances the effectiveness of the protection diodes. The anode of protection diode D14 is connected directly to a section of the the ground plane that has a short and direct path to the LM2415 ground pins. The cathode of D15 is connected to VCC very close to decoupling capacitor C55 (see Figure 12) which is connected to the same section of the ground plane as D14. The diode placement and routing is very important for minimizing the voltage stress on the LM2415 during an arc over event. Lastly, notice that S3 is placed very close to the blue cathode and is tied directly to CRT ground.
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Application Hints
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FIGURE 10. LM1279/240X Demonstration Board Schematic
Application Hints
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FIGURE 11. LM1279/240X Demo Board Layout
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Application Hints
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FIGURE 12. Trace Routing and Component Placement for Blue Channel Output
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LM2415 Monolithic Triple 5.5 ns CRT Driver
Physical Dimensions
inches (millimeters) unless otherwise noted
NS Package Number TA11B
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